blob: fd14c3a1e1493ba3c26601c152f1d2af5c911e05 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030024
25#include <linux/log2.h>
26
27/* slightly larger than one large A-MPDU */
28#define HTT_RX_RING_SIZE_MIN 128
29
30/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
31#define HTT_RX_RING_SIZE_MAX 2048
32
33#define HTT_RX_AVG_FRM_BYTES 1000
34
35/* ms, very conservative */
36#define HTT_RX_HOST_LATENCY_MAX_MS 20
37
38/* ms, conservative */
39#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
40
41/* when under memory pressure rx ring refill may fail and needs a retry */
42#define HTT_RX_RING_REFILL_RETRY_MS 50
43
Michal Kaziorf6dc2092013-09-26 10:12:22 +030044
45static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020046static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030047
Kalle Valo5e3dd152013-06-12 20:52:10 +030048static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
49{
50 int size;
51
52 /*
53 * It is expected that the host CPU will typically be able to
54 * service the rx indication from one A-MPDU before the rx
55 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
56 * later. However, the rx ring should be sized very conservatively,
57 * to accomodate the worst reasonable delay before the host CPU
58 * services a rx indication interrupt.
59 *
60 * The rx ring need not be kept full of empty buffers. In theory,
61 * the htt host SW can dynamically track the low-water mark in the
62 * rx ring, and dynamically adjust the level to which the rx ring
63 * is filled with empty buffers, to dynamically meet the desired
64 * low-water mark.
65 *
66 * In contrast, it's difficult to resize the rx ring itself, once
67 * it's in use. Thus, the ring itself should be sized very
68 * conservatively, while the degree to which the ring is filled
69 * with empty buffers should be sized moderately conservatively.
70 */
71
72 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
73 size =
74 htt->max_throughput_mbps +
75 1000 /
76 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
77
78 if (size < HTT_RX_RING_SIZE_MIN)
79 size = HTT_RX_RING_SIZE_MIN;
80
81 if (size > HTT_RX_RING_SIZE_MAX)
82 size = HTT_RX_RING_SIZE_MAX;
83
84 size = roundup_pow_of_two(size);
85
86 return size;
87}
88
89static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
90{
91 int size;
92
93 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
94 size =
95 htt->max_throughput_mbps *
96 1000 /
97 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
98
99 /*
100 * Make sure the fill level is at least 1 less than the ring size.
101 * Leaving 1 element empty allows the SW to easily distinguish
102 * between a full ring vs. an empty ring.
103 */
104 if (size >= htt->rx_ring.size)
105 size = htt->rx_ring.size - 1;
106
107 return size;
108}
109
110static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
111{
112 struct sk_buff *skb;
113 struct ath10k_skb_cb *cb;
114 int i;
115
116 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
117 skb = htt->rx_ring.netbufs_ring[i];
118 cb = ATH10K_SKB_CB(skb);
119 dma_unmap_single(htt->ar->dev, cb->paddr,
120 skb->len + skb_tailroom(skb),
121 DMA_FROM_DEVICE);
122 dev_kfree_skb_any(skb);
123 }
124
125 htt->rx_ring.fill_cnt = 0;
126}
127
128static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
129{
130 struct htt_rx_desc *rx_desc;
131 struct sk_buff *skb;
132 dma_addr_t paddr;
133 int ret = 0, idx;
134
135 idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
136 while (num > 0) {
137 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
138 if (!skb) {
139 ret = -ENOMEM;
140 goto fail;
141 }
142
143 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
144 skb_pull(skb,
145 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
146 skb->data);
147
148 /* Clear rx_desc attention word before posting to Rx ring */
149 rx_desc = (struct htt_rx_desc *)skb->data;
150 rx_desc->attention.flags = __cpu_to_le32(0);
151
152 paddr = dma_map_single(htt->ar->dev, skb->data,
153 skb->len + skb_tailroom(skb),
154 DMA_FROM_DEVICE);
155
156 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
157 dev_kfree_skb_any(skb);
158 ret = -ENOMEM;
159 goto fail;
160 }
161
162 ATH10K_SKB_CB(skb)->paddr = paddr;
163 htt->rx_ring.netbufs_ring[idx] = skb;
164 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
165 htt->rx_ring.fill_cnt++;
166
167 num--;
168 idx++;
169 idx &= htt->rx_ring.size_mask;
170 }
171
172fail:
173 *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
174 return ret;
175}
176
177static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
178{
179 lockdep_assert_held(&htt->rx_ring.lock);
180 return __ath10k_htt_rx_ring_fill_n(htt, num);
181}
182
183static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
184{
Michal Kazior6e712d42013-09-24 10:18:36 +0200185 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300186
Michal Kazior6e712d42013-09-24 10:18:36 +0200187 /* Refilling the whole RX ring buffer proves to be a bad idea. The
188 * reason is RX may take up significant amount of CPU cycles and starve
189 * other tasks, e.g. TX on an ethernet device while acting as a bridge
190 * with ath10k wlan interface. This ended up with very poor performance
191 * once CPU the host system was overwhelmed with RX on ath10k.
192 *
193 * By limiting the number of refills the replenishing occurs
194 * progressively. This in turns makes use of the fact tasklets are
195 * processed in FIFO order. This means actual RX processing can starve
196 * out refilling. If there's not enough buffers on RX ring FW will not
197 * report RX until it is refilled with enough buffers. This
198 * automatically balances load wrt to CPU power.
199 *
200 * This probably comes at a cost of lower maximum throughput but
201 * improves the avarage and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300202 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200203 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
204 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
205 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300206 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
207 if (ret == -ENOMEM) {
208 /*
209 * Failed to fill it to the desired level -
210 * we'll start a timer and try again next time.
211 * As long as enough buffers are left in the ring for
212 * another A-MPDU rx, no special recovery is needed.
213 */
214 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
215 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200216 } else if (num_deficit > 0) {
217 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300218 }
219 spin_unlock_bh(&htt->rx_ring.lock);
220}
221
222static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
223{
224 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
225 ath10k_htt_rx_msdu_buff_replenish(htt);
226}
227
Kalle Valo5e3dd152013-06-12 20:52:10 +0300228void ath10k_htt_rx_detach(struct ath10k_htt *htt)
229{
230 int sw_rd_idx = htt->rx_ring.sw_rd_idx.msdu_payld;
231
232 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200233 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200234 tasklet_kill(&htt->txrx_compl_task);
235
236 skb_queue_purge(&htt->tx_compl_q);
237 skb_queue_purge(&htt->rx_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300238
239 while (sw_rd_idx != __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr))) {
240 struct sk_buff *skb =
241 htt->rx_ring.netbufs_ring[sw_rd_idx];
242 struct ath10k_skb_cb *cb = ATH10K_SKB_CB(skb);
243
244 dma_unmap_single(htt->ar->dev, cb->paddr,
245 skb->len + skb_tailroom(skb),
246 DMA_FROM_DEVICE);
247 dev_kfree_skb_any(htt->rx_ring.netbufs_ring[sw_rd_idx]);
248 sw_rd_idx++;
249 sw_rd_idx &= htt->rx_ring.size_mask;
250 }
251
252 dma_free_coherent(htt->ar->dev,
253 (htt->rx_ring.size *
254 sizeof(htt->rx_ring.paddrs_ring)),
255 htt->rx_ring.paddrs_ring,
256 htt->rx_ring.base_paddr);
257
258 dma_free_coherent(htt->ar->dev,
259 sizeof(*htt->rx_ring.alloc_idx.vaddr),
260 htt->rx_ring.alloc_idx.vaddr,
261 htt->rx_ring.alloc_idx.paddr);
262
263 kfree(htt->rx_ring.netbufs_ring);
264}
265
266static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
267{
268 int idx;
269 struct sk_buff *msdu;
270
Michal Kazior45967082014-02-27 18:50:05 +0200271 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300272
Michal Kazior8d60ee82014-02-27 18:50:05 +0200273 if (htt->rx_ring.fill_cnt == 0) {
274 ath10k_warn("tried to pop sk_buff from an empty rx ring\n");
275 return NULL;
276 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300277
278 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
279 msdu = htt->rx_ring.netbufs_ring[idx];
280
281 idx++;
282 idx &= htt->rx_ring.size_mask;
283 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
284 htt->rx_ring.fill_cnt--;
285
Kalle Valo5e3dd152013-06-12 20:52:10 +0300286 return msdu;
287}
288
289static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
290{
291 struct sk_buff *next;
292
293 while (skb) {
294 next = skb->next;
295 dev_kfree_skb_any(skb);
296 skb = next;
297 }
298}
299
300static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
301 u8 **fw_desc, int *fw_desc_len,
302 struct sk_buff **head_msdu,
303 struct sk_buff **tail_msdu)
304{
305 int msdu_len, msdu_chaining = 0;
306 struct sk_buff *msdu;
307 struct htt_rx_desc *rx_desc;
308
Michal Kazior45967082014-02-27 18:50:05 +0200309 lockdep_assert_held(&htt->rx_ring.lock);
310
Kalle Valo5e3dd152013-06-12 20:52:10 +0300311 if (htt->rx_confused) {
312 ath10k_warn("htt is confused. refusing rx\n");
313 return 0;
314 }
315
316 msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
317 while (msdu) {
318 int last_msdu, msdu_len_invalid, msdu_chained;
319
320 dma_unmap_single(htt->ar->dev,
321 ATH10K_SKB_CB(msdu)->paddr,
322 msdu->len + skb_tailroom(msdu),
323 DMA_FROM_DEVICE);
324
Ben Greear75fb2f92014-02-05 13:58:34 -0800325 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300326 msdu->data, msdu->len + skb_tailroom(msdu));
327
328 rx_desc = (struct htt_rx_desc *)msdu->data;
329
330 /* FIXME: we must report msdu payload since this is what caller
331 * expects now */
332 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
333 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
334
335 /*
336 * Sanity check - confirm the HW is finished filling in the
337 * rx data.
338 * If the HW and SW are working correctly, then it's guaranteed
339 * that the HW's MAC DMA is done before this point in the SW.
340 * To prevent the case that we handle a stale Rx descriptor,
341 * just assert for now until we have a way to recover.
342 */
343 if (!(__le32_to_cpu(rx_desc->attention.flags)
344 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
345 ath10k_htt_rx_free_msdu_chain(*head_msdu);
346 *head_msdu = NULL;
347 msdu = NULL;
348 ath10k_err("htt rx stopped. cannot recover\n");
349 htt->rx_confused = true;
350 break;
351 }
352
353 /*
354 * Copy the FW rx descriptor for this MSDU from the rx
355 * indication message into the MSDU's netbuf. HL uses the
356 * same rx indication message definition as LL, and simply
357 * appends new info (fields from the HW rx desc, and the
358 * MSDU payload itself). So, the offset into the rx
359 * indication message only has to account for the standard
360 * offset of the per-MSDU FW rx desc info within the
361 * message, and how many bytes of the per-MSDU FW rx desc
362 * info have already been consumed. (And the endianness of
363 * the host, since for a big-endian host, the rx ind
364 * message contents, including the per-MSDU rx desc bytes,
365 * were byteswapped during upload.)
366 */
367 if (*fw_desc_len > 0) {
368 rx_desc->fw_desc.info0 = **fw_desc;
369 /*
370 * The target is expected to only provide the basic
371 * per-MSDU rx descriptors. Just to be sure, verify
372 * that the target has not attached extension data
373 * (e.g. LRO flow ID).
374 */
375
376 /* or more, if there's extension data */
377 (*fw_desc)++;
378 (*fw_desc_len)--;
379 } else {
380 /*
381 * When an oversized AMSDU happened, FW will lost
382 * some of MSDU status - in this case, the FW
383 * descriptors provided will be less than the
384 * actual MSDUs inside this MPDU. Mark the FW
385 * descriptors so that it will still deliver to
386 * upper stack, if no CRC error for this MPDU.
387 *
388 * FIX THIS - the FW descriptors are actually for
389 * MSDUs in the end of this A-MSDU instead of the
390 * beginning.
391 */
392 rx_desc->fw_desc.info0 = 0;
393 }
394
395 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
396 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
397 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
398 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
399 RX_MSDU_START_INFO0_MSDU_LENGTH);
400 msdu_chained = rx_desc->frag_info.ring2_more_count;
Ben Greearbfa35362014-03-03 14:07:09 -0800401 msdu_chaining = msdu_chained;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300402
403 if (msdu_len_invalid)
404 msdu_len = 0;
405
406 skb_trim(msdu, 0);
407 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
408 msdu_len -= msdu->len;
409
410 /* FIXME: Do chained buffers include htt_rx_desc or not? */
411 while (msdu_chained--) {
412 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
413
414 dma_unmap_single(htt->ar->dev,
415 ATH10K_SKB_CB(next)->paddr,
416 next->len + skb_tailroom(next),
417 DMA_FROM_DEVICE);
418
Ben Greear75fb2f92014-02-05 13:58:34 -0800419 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL,
420 "htt rx chained: ", next->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300421 next->len + skb_tailroom(next));
422
423 skb_trim(next, 0);
424 skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
425 msdu_len -= next->len;
426
427 msdu->next = next;
428 msdu = next;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300429 }
430
Kalle Valo5e3dd152013-06-12 20:52:10 +0300431 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
432 RX_MSDU_END_INFO0_LAST_MSDU;
433
434 if (last_msdu) {
435 msdu->next = NULL;
436 break;
437 } else {
438 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
439 msdu->next = next;
440 msdu = next;
441 }
442 }
443 *tail_msdu = msdu;
444
445 /*
446 * Don't refill the ring yet.
447 *
448 * First, the elements popped here are still in use - it is not
449 * safe to overwrite them until the matching call to
450 * mpdu_desc_list_next. Second, for efficiency it is preferable to
451 * refill the rx ring with 1 PPDU's worth of rx buffers (something
452 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
453 * (something like 3 buffers). Consequently, we'll rely on the txrx
454 * SW to tell us when it is done pulling all the PPDU's rx buffers
455 * out of the rx ring, and then refill it just once.
456 */
457
458 return msdu_chaining;
459}
460
Michal Kazior6e712d42013-09-24 10:18:36 +0200461static void ath10k_htt_rx_replenish_task(unsigned long ptr)
462{
463 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
464 ath10k_htt_rx_msdu_buff_replenish(htt);
465}
466
Kalle Valo5e3dd152013-06-12 20:52:10 +0300467int ath10k_htt_rx_attach(struct ath10k_htt *htt)
468{
469 dma_addr_t paddr;
470 void *vaddr;
471 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
472
473 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
474 if (!is_power_of_2(htt->rx_ring.size)) {
475 ath10k_warn("htt rx ring size is not power of 2\n");
476 return -EINVAL;
477 }
478
479 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
480
481 /*
482 * Set the initial value for the level to which the rx ring
483 * should be filled, based on the max throughput and the
484 * worst likely latency for the host to fill the rx ring
485 * with new buffers. In theory, this fill level can be
486 * dynamically adjusted from the initial value set here, to
487 * reflect the actual host latency rather than a
488 * conservative assumption about the host latency.
489 */
490 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
491
492 htt->rx_ring.netbufs_ring =
493 kmalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
494 GFP_KERNEL);
495 if (!htt->rx_ring.netbufs_ring)
496 goto err_netbuf;
497
498 vaddr = dma_alloc_coherent(htt->ar->dev,
499 (htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring)),
500 &paddr, GFP_DMA);
501 if (!vaddr)
502 goto err_dma_ring;
503
504 htt->rx_ring.paddrs_ring = vaddr;
505 htt->rx_ring.base_paddr = paddr;
506
507 vaddr = dma_alloc_coherent(htt->ar->dev,
508 sizeof(*htt->rx_ring.alloc_idx.vaddr),
509 &paddr, GFP_DMA);
510 if (!vaddr)
511 goto err_dma_idx;
512
513 htt->rx_ring.alloc_idx.vaddr = vaddr;
514 htt->rx_ring.alloc_idx.paddr = paddr;
515 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
516 *htt->rx_ring.alloc_idx.vaddr = 0;
517
518 /* Initialize the Rx refill retry timer */
519 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
520
521 spin_lock_init(&htt->rx_ring.lock);
522
523 htt->rx_ring.fill_cnt = 0;
524 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
525 goto err_fill_ring;
526
Michal Kazior6e712d42013-09-24 10:18:36 +0200527 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
528 (unsigned long)htt);
529
Michal Kazior6c5151a2014-02-27 18:50:04 +0200530 skb_queue_head_init(&htt->tx_compl_q);
531 skb_queue_head_init(&htt->rx_compl_q);
532
533 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
534 (unsigned long)htt);
535
Kalle Valoaad0b652013-09-08 17:56:02 +0300536 ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300537 htt->rx_ring.size, htt->rx_ring.fill_level);
538 return 0;
539
540err_fill_ring:
541 ath10k_htt_rx_ring_free(htt);
542 dma_free_coherent(htt->ar->dev,
543 sizeof(*htt->rx_ring.alloc_idx.vaddr),
544 htt->rx_ring.alloc_idx.vaddr,
545 htt->rx_ring.alloc_idx.paddr);
546err_dma_idx:
547 dma_free_coherent(htt->ar->dev,
548 (htt->rx_ring.size *
549 sizeof(htt->rx_ring.paddrs_ring)),
550 htt->rx_ring.paddrs_ring,
551 htt->rx_ring.base_paddr);
552err_dma_ring:
553 kfree(htt->rx_ring.netbufs_ring);
554err_netbuf:
555 return -ENOMEM;
556}
557
558static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
559{
560 switch (type) {
561 case HTT_RX_MPDU_ENCRYPT_WEP40:
562 case HTT_RX_MPDU_ENCRYPT_WEP104:
563 return 4;
564 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
565 case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
566 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
567 case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
568 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
569 return 8;
570 case HTT_RX_MPDU_ENCRYPT_NONE:
571 return 0;
572 }
573
574 ath10k_warn("unknown encryption type %d\n", type);
575 return 0;
576}
577
578static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
579{
580 switch (type) {
581 case HTT_RX_MPDU_ENCRYPT_NONE:
582 case HTT_RX_MPDU_ENCRYPT_WEP40:
583 case HTT_RX_MPDU_ENCRYPT_WEP104:
584 case HTT_RX_MPDU_ENCRYPT_WEP128:
585 case HTT_RX_MPDU_ENCRYPT_WAPI:
586 return 0;
587 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
588 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
589 return 4;
590 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
591 return 8;
592 }
593
594 ath10k_warn("unknown encryption type %d\n", type);
595 return 0;
596}
597
598/* Applies for first msdu in chain, before altering it. */
599static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
600{
601 struct htt_rx_desc *rxd;
602 enum rx_msdu_decap_format fmt;
603
604 rxd = (void *)skb->data - sizeof(*rxd);
605 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
606 RX_MSDU_START_INFO1_DECAP_FORMAT);
607
608 if (fmt == RX_MSDU_DECAP_RAW)
609 return (void *)skb->data;
610 else
611 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
612}
613
614/* This function only applies for first msdu in an msdu chain */
615static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
616{
617 if (ieee80211_is_data_qos(hdr->frame_control)) {
618 u8 *qc = ieee80211_get_qos_ctl(hdr);
619 if (qc[0] & 0x80)
620 return true;
621 }
622 return false;
623}
624
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300625struct rfc1042_hdr {
626 u8 llc_dsap;
627 u8 llc_ssap;
628 u8 llc_ctrl;
629 u8 snap_oui[3];
630 __be16 snap_type;
631} __packed;
632
633struct amsdu_subframe_hdr {
634 u8 dst[ETH_ALEN];
635 u8 src[ETH_ALEN];
636 __be16 len;
637} __packed;
638
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100639static const u8 rx_legacy_rate_idx[] = {
640 3, /* 0x00 - 11Mbps */
641 2, /* 0x01 - 5.5Mbps */
642 1, /* 0x02 - 2Mbps */
643 0, /* 0x03 - 1Mbps */
644 3, /* 0x04 - 11Mbps */
645 2, /* 0x05 - 5.5Mbps */
646 1, /* 0x06 - 2Mbps */
647 0, /* 0x07 - 1Mbps */
648 10, /* 0x08 - 48Mbps */
649 8, /* 0x09 - 24Mbps */
650 6, /* 0x0A - 12Mbps */
651 4, /* 0x0B - 6Mbps */
652 11, /* 0x0C - 54Mbps */
653 9, /* 0x0D - 36Mbps */
654 7, /* 0x0E - 18Mbps */
655 5, /* 0x0F - 9Mbps */
656};
657
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100658static void ath10k_htt_rx_h_rates(struct ath10k *ar, struct htt_rx_info *info,
659 enum ieee80211_band band,
660 struct ieee80211_rx_status *status)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100661{
662 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
663 u8 info0 = info->rate.info0;
664 u32 info1 = info->rate.info1;
665 u32 info2 = info->rate.info2;
666 u8 preamble = 0;
667
668 /* Check if valid fields */
669 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
670 return;
671
672 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
673
674 switch (preamble) {
675 case HTT_RX_LEGACY:
676 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
677 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
678 rate_idx = 0;
679
680 if (rate < 0x08 || rate > 0x0F)
681 break;
682
683 switch (band) {
684 case IEEE80211_BAND_2GHZ:
685 if (cck)
686 rate &= ~BIT(3);
687 rate_idx = rx_legacy_rate_idx[rate];
688 break;
689 case IEEE80211_BAND_5GHZ:
690 rate_idx = rx_legacy_rate_idx[rate];
691 /* We are using same rate table registering
692 HW - ath10k_rates[]. In case of 5GHz skip
693 CCK rates, so -4 here */
694 rate_idx -= 4;
695 break;
696 default:
697 break;
698 }
699
700 status->rate_idx = rate_idx;
701 break;
702 case HTT_RX_HT:
703 case HTT_RX_HT_WITH_TXBF:
704 /* HT-SIG - Table 20-11 in info1 and info2 */
705 mcs = info1 & 0x1F;
706 nss = mcs >> 3;
707 bw = (info1 >> 7) & 1;
708 sgi = (info2 >> 7) & 1;
709
710 status->rate_idx = mcs;
711 status->flag |= RX_FLAG_HT;
712 if (sgi)
713 status->flag |= RX_FLAG_SHORT_GI;
714 if (bw)
715 status->flag |= RX_FLAG_40MHZ;
716 break;
717 case HTT_RX_VHT:
718 case HTT_RX_VHT_WITH_TXBF:
719 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
720 TODO check this */
721 mcs = (info2 >> 4) & 0x0F;
722 nss = ((info1 >> 10) & 0x07) + 1;
723 bw = info1 & 3;
724 sgi = info2 & 1;
725
726 status->rate_idx = mcs;
727 status->vht_nss = nss;
728
729 if (sgi)
730 status->flag |= RX_FLAG_SHORT_GI;
731
732 switch (bw) {
733 /* 20MHZ */
734 case 0:
735 break;
736 /* 40MHZ */
737 case 1:
738 status->flag |= RX_FLAG_40MHZ;
739 break;
740 /* 80MHZ */
741 case 2:
742 status->vht_flag |= RX_VHT_FLAG_80MHZ;
743 }
744
745 status->flag |= RX_FLAG_VHT;
746 break;
747 default:
748 break;
749 }
750}
751
752static void ath10k_process_rx(struct ath10k *ar, struct htt_rx_info *info)
753{
754 struct ieee80211_rx_status *status;
755 struct ieee80211_channel *ch;
756 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)info->skb->data;
757
758 status = IEEE80211_SKB_RXCB(info->skb);
759 memset(status, 0, sizeof(*status));
760
761 if (info->encrypt_type != HTT_RX_MPDU_ENCRYPT_NONE) {
762 status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_IV_STRIPPED |
763 RX_FLAG_MMIC_STRIPPED;
764 hdr->frame_control = __cpu_to_le16(
765 __le16_to_cpu(hdr->frame_control) &
766 ~IEEE80211_FCTL_PROTECTED);
767 }
768
769 if (info->mic_err)
770 status->flag |= RX_FLAG_MMIC_ERROR;
771
772 if (info->fcs_err)
773 status->flag |= RX_FLAG_FAILED_FCS_CRC;
774
775 if (info->amsdu_more)
776 status->flag |= RX_FLAG_AMSDU_MORE;
777
778 status->signal = info->signal;
779
780 spin_lock_bh(&ar->data_lock);
781 ch = ar->scan_channel;
782 if (!ch)
783 ch = ar->rx_channel;
784 spin_unlock_bh(&ar->data_lock);
785
786 if (!ch) {
787 ath10k_warn("no channel configured; ignoring frame!\n");
788 dev_kfree_skb_any(info->skb);
789 return;
790 }
791
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100792 ath10k_htt_rx_h_rates(ar, info, ch->band, status);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100793 status->band = ch->band;
794 status->freq = ch->center_freq;
795
796 if (info->rate.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
797 /* TSF available only in 32-bit */
798 status->mactime = info->tsf & 0xffffffff;
799 status->flag |= RX_FLAG_MACTIME_END;
800 }
801
802 ath10k_dbg(ATH10K_DBG_DATA,
803 "rx skb %p len %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i\n",
804 info->skb,
805 info->skb->len,
806 status->flag == 0 ? "legacy" : "",
807 status->flag & RX_FLAG_HT ? "ht" : "",
808 status->flag & RX_FLAG_VHT ? "vht" : "",
809 status->flag & RX_FLAG_40MHZ ? "40" : "",
810 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
811 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
812 status->rate_idx,
813 status->vht_nss,
814 status->freq,
815 status->band, status->flag, info->fcs_err);
816 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
817 info->skb->data, info->skb->len);
818
819 ieee80211_rx(ar->hw, info->skb);
820}
821
Michal Kaziord960c362014-02-25 09:29:57 +0200822static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
823{
824 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
825 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
826}
827
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300828static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
829 struct htt_rx_info *info)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300830{
831 struct htt_rx_desc *rxd;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300832 struct sk_buff *first;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300833 struct sk_buff *skb = info->skb;
834 enum rx_msdu_decap_format fmt;
835 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300836 struct ieee80211_hdr *hdr;
Michal Kazior784f69d2013-09-26 10:12:23 +0300837 u8 hdr_buf[64], addr[ETH_ALEN], *qos;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300838 unsigned int hdr_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300839
840 rxd = (void *)skb->data - sizeof(*rxd);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300841 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
842 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
843
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300844 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
845 hdr_len = ieee80211_hdrlen(hdr->frame_control);
846 memcpy(hdr_buf, hdr, hdr_len);
847 hdr = (struct ieee80211_hdr *)hdr_buf;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300848
Kalle Valo5e3dd152013-06-12 20:52:10 +0300849 first = skb;
850 while (skb) {
851 void *decap_hdr;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300852 int len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300853
854 rxd = (void *)skb->data - sizeof(*rxd);
855 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300856 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300857 decap_hdr = (void *)rxd->rx_hdr_status;
858
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300859 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
860
861 /* First frame in an A-MSDU chain has more decapped data. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300862 if (skb == first) {
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300863 len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
864 len += round_up(ath10k_htt_rx_crypto_param_len(enctype),
865 4);
866 decap_hdr += len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300867 }
868
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300869 switch (fmt) {
870 case RX_MSDU_DECAP_RAW:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300871 /* remove trailing FCS */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300872 skb_trim(skb, skb->len - FCS_LEN);
873 break;
874 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +0300875 /* pull decapped header and copy DA */
876 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200877 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +0300878 memcpy(addr, ieee80211_get_DA(hdr), ETH_ALEN);
879 skb_pull(skb, hdr_len);
880
881 /* push original 802.11 header */
882 hdr = (struct ieee80211_hdr *)hdr_buf;
883 hdr_len = ieee80211_hdrlen(hdr->frame_control);
884 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
885
886 /* original A-MSDU header has the bit set but we're
887 * not including A-MSDU subframe header */
888 hdr = (struct ieee80211_hdr *)skb->data;
889 qos = ieee80211_get_qos_ctl(hdr);
890 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
891
892 /* original 802.11 header has a different DA */
893 memcpy(ieee80211_get_DA(hdr), addr, ETH_ALEN);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300894 break;
895 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300896 /* strip ethernet header and insert decapped 802.11
897 * header, amsdu subframe header and rfc1042 header */
898
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300899 len = 0;
900 len += sizeof(struct rfc1042_hdr);
901 len += sizeof(struct amsdu_subframe_hdr);
Michal Kaziordfa95b52013-08-13 07:59:37 +0200902
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300903 skb_pull(skb, sizeof(struct ethhdr));
904 memcpy(skb_push(skb, len), decap_hdr, len);
905 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
906 break;
907 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300908 /* insert decapped 802.11 header making a singly
909 * A-MSDU */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300910 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
911 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300912 }
913
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300914 info->skb = skb;
915 info->encrypt_type = enctype;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300916 skb = skb->next;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300917 info->skb->next = NULL;
918
Kalle Valo652de352013-11-13 15:23:30 +0200919 if (skb)
920 info->amsdu_more = true;
921
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300922 ath10k_process_rx(htt->ar, info);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300923 }
924
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300925 /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
926 * monitor interface active for sniffing purposes. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300927}
928
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300929static void ath10k_htt_rx_msdu(struct ath10k_htt *htt, struct htt_rx_info *info)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300930{
931 struct sk_buff *skb = info->skb;
932 struct htt_rx_desc *rxd;
933 struct ieee80211_hdr *hdr;
934 enum rx_msdu_decap_format fmt;
935 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300936 int hdr_len;
937 void *rfc1042;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300938
939 /* This shouldn't happen. If it does than it may be a FW bug. */
940 if (skb->next) {
Ben Greear75fb2f92014-02-05 13:58:34 -0800941 ath10k_warn("htt rx received chained non A-MSDU frame\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300942 ath10k_htt_rx_free_msdu_chain(skb->next);
943 skb->next = NULL;
944 }
945
946 rxd = (void *)skb->data - sizeof(*rxd);
947 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
948 RX_MSDU_START_INFO1_DECAP_FORMAT);
949 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
950 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300951 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
952 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300953
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300954 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
955
Kalle Valo5e3dd152013-06-12 20:52:10 +0300956 switch (fmt) {
957 case RX_MSDU_DECAP_RAW:
958 /* remove trailing FCS */
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300959 skb_trim(skb, skb->len - FCS_LEN);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300960 break;
961 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +0300962 /* Pull decapped header */
963 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200964 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +0300965 skb_pull(skb, hdr_len);
966
967 /* Push original header */
968 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
969 hdr_len = ieee80211_hdrlen(hdr->frame_control);
970 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300971 break;
972 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300973 /* strip ethernet header and insert decapped 802.11 header and
974 * rfc1042 header */
975
976 rfc1042 = hdr;
977 rfc1042 += roundup(hdr_len, 4);
978 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
979
980 skb_pull(skb, sizeof(struct ethhdr));
981 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
982 rfc1042, sizeof(struct rfc1042_hdr));
983 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300984 break;
985 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300986 /* remove A-MSDU subframe header and insert
987 * decapped 802.11 header. rfc1042 header is already there */
988
989 skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
990 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300991 break;
992 }
993
Kalle Valo5e3dd152013-06-12 20:52:10 +0300994 info->skb = skb;
995 info->encrypt_type = enctype;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300996
997 ath10k_process_rx(htt->ar, info);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300998}
999
1000static bool ath10k_htt_rx_has_decrypt_err(struct sk_buff *skb)
1001{
1002 struct htt_rx_desc *rxd;
1003 u32 flags;
1004
1005 rxd = (void *)skb->data - sizeof(*rxd);
1006 flags = __le32_to_cpu(rxd->attention.flags);
1007
1008 if (flags & RX_ATTENTION_FLAGS_DECRYPT_ERR)
1009 return true;
1010
1011 return false;
1012}
1013
1014static bool ath10k_htt_rx_has_fcs_err(struct sk_buff *skb)
1015{
1016 struct htt_rx_desc *rxd;
1017 u32 flags;
1018
1019 rxd = (void *)skb->data - sizeof(*rxd);
1020 flags = __le32_to_cpu(rxd->attention.flags);
1021
1022 if (flags & RX_ATTENTION_FLAGS_FCS_ERR)
1023 return true;
1024
1025 return false;
1026}
1027
Janusz Dziedzic22569402013-12-13 13:44:16 +01001028static bool ath10k_htt_rx_has_mic_err(struct sk_buff *skb)
1029{
1030 struct htt_rx_desc *rxd;
1031 u32 flags;
1032
1033 rxd = (void *)skb->data - sizeof(*rxd);
1034 flags = __le32_to_cpu(rxd->attention.flags);
1035
1036 if (flags & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
1037 return true;
1038
1039 return false;
1040}
1041
Janusz Dziedzica80ddb02014-02-25 07:56:39 +01001042static bool ath10k_htt_rx_is_mgmt(struct sk_buff *skb)
1043{
1044 struct htt_rx_desc *rxd;
1045 u32 flags;
1046
1047 rxd = (void *)skb->data - sizeof(*rxd);
1048 flags = __le32_to_cpu(rxd->attention.flags);
1049
1050 if (flags & RX_ATTENTION_FLAGS_MGMT_TYPE)
1051 return true;
1052
1053 return false;
1054}
1055
Michal Kazior605f81a2013-07-31 10:47:56 +02001056static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1057{
1058 struct htt_rx_desc *rxd;
1059 u32 flags, info;
1060 bool is_ip4, is_ip6;
1061 bool is_tcp, is_udp;
1062 bool ip_csum_ok, tcpudp_csum_ok;
1063
1064 rxd = (void *)skb->data - sizeof(*rxd);
1065 flags = __le32_to_cpu(rxd->attention.flags);
1066 info = __le32_to_cpu(rxd->msdu_start.info1);
1067
1068 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1069 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1070 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1071 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1072 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1073 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1074
1075 if (!is_ip4 && !is_ip6)
1076 return CHECKSUM_NONE;
1077 if (!is_tcp && !is_udp)
1078 return CHECKSUM_NONE;
1079 if (!ip_csum_ok)
1080 return CHECKSUM_NONE;
1081 if (!tcpudp_csum_ok)
1082 return CHECKSUM_NONE;
1083
1084 return CHECKSUM_UNNECESSARY;
1085}
1086
Ben Greearbfa35362014-03-03 14:07:09 -08001087static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
1088{
1089 struct sk_buff *next = msdu_head->next;
1090 struct sk_buff *to_free = next;
1091 int space;
1092 int total_len = 0;
1093
1094 /* TODO: Might could optimize this by using
1095 * skb_try_coalesce or similar method to
1096 * decrease copying, or maybe get mac80211 to
1097 * provide a way to just receive a list of
1098 * skb?
1099 */
1100
1101 msdu_head->next = NULL;
1102
1103 /* Allocate total length all at once. */
1104 while (next) {
1105 total_len += next->len;
1106 next = next->next;
1107 }
1108
1109 space = total_len - skb_tailroom(msdu_head);
1110 if ((space > 0) &&
1111 (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
1112 /* TODO: bump some rx-oom error stat */
1113 /* put it back together so we can free the
1114 * whole list at once.
1115 */
1116 msdu_head->next = to_free;
1117 return -1;
1118 }
1119
1120 /* Walk list again, copying contents into
1121 * msdu_head
1122 */
1123 next = to_free;
1124 while (next) {
1125 skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
1126 next->len);
1127 next = next->next;
1128 }
1129
1130 /* If here, we have consolidated skb. Free the
1131 * fragments and pass the main skb on up the
1132 * stack.
1133 */
1134 ath10k_htt_rx_free_msdu_chain(to_free);
1135 return 0;
1136}
1137
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001138static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
1139 struct sk_buff *head,
1140 struct htt_rx_info *info)
1141{
1142 enum htt_rx_mpdu_status status = info->status;
1143
1144 if (!head) {
1145 ath10k_warn("htt rx no data!\n");
1146 return false;
1147 }
1148
1149 if (head->len == 0) {
1150 ath10k_dbg(ATH10K_DBG_HTT,
1151 "htt rx dropping due to zero-len\n");
1152 return false;
1153 }
1154
1155 if (ath10k_htt_rx_has_decrypt_err(head)) {
1156 ath10k_dbg(ATH10K_DBG_HTT,
1157 "htt rx dropping due to decrypt-err\n");
1158 return false;
1159 }
1160
1161 /* Skip mgmt frames while we handle this in WMI */
1162 if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
1163 ath10k_htt_rx_is_mgmt(head)) {
1164 ath10k_dbg(ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
1165 return false;
1166 }
1167
1168 if (status != HTT_RX_IND_MPDU_STATUS_OK &&
1169 status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
1170 status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
1171 !htt->ar->monitor_enabled) {
1172 ath10k_dbg(ATH10K_DBG_HTT,
1173 "htt rx ignoring frame w/ status %d\n",
1174 status);
1175 return false;
1176 }
1177
1178 if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
1179 ath10k_dbg(ATH10K_DBG_HTT,
1180 "htt rx CAC running\n");
1181 return false;
1182 }
1183
1184 return true;
1185}
1186
Kalle Valo5e3dd152013-06-12 20:52:10 +03001187static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1188 struct htt_rx_indication *rx)
1189{
1190 struct htt_rx_info info;
1191 struct htt_rx_indication_mpdu_range *mpdu_ranges;
1192 struct ieee80211_hdr *hdr;
1193 int num_mpdu_ranges;
1194 int fw_desc_len;
1195 u8 *fw_desc;
1196 int i, j;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001197
Michal Kazior45967082014-02-27 18:50:05 +02001198 lockdep_assert_held(&htt->rx_ring.lock);
1199
Kalle Valo5e3dd152013-06-12 20:52:10 +03001200 memset(&info, 0, sizeof(info));
1201
1202 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1203 fw_desc = (u8 *)&rx->fw_desc;
1204
1205 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1206 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1207 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1208
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001209 /* Fill this once, while this is per-ppdu */
1210 info.signal = ATH10K_DEFAULT_NOISE_FLOOR;
1211 info.signal += rx->ppdu.combined_rssi;
1212
1213 info.rate.info0 = rx->ppdu.info0;
1214 info.rate.info1 = __le32_to_cpu(rx->ppdu.info1);
1215 info.rate.info2 = __le32_to_cpu(rx->ppdu.info2);
1216 info.tsf = __le32_to_cpu(rx->ppdu.tsf);
1217
Kalle Valo5e3dd152013-06-12 20:52:10 +03001218 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
1219 rx, sizeof(*rx) +
1220 (sizeof(struct htt_rx_indication_mpdu_range) *
1221 num_mpdu_ranges));
1222
1223 for (i = 0; i < num_mpdu_ranges; i++) {
1224 info.status = mpdu_ranges[i].mpdu_range_status;
1225
1226 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
1227 struct sk_buff *msdu_head, *msdu_tail;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001228 int msdu_chaining;
1229
1230 msdu_head = NULL;
1231 msdu_tail = NULL;
1232 msdu_chaining = ath10k_htt_rx_amsdu_pop(htt,
1233 &fw_desc,
1234 &fw_desc_len,
1235 &msdu_head,
1236 &msdu_tail);
1237
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001238 if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
1239 &info)) {
Marek Puzyniake8a50f82013-11-20 09:59:47 +02001240 ath10k_htt_rx_free_msdu_chain(msdu_head);
1241 continue;
1242 }
1243
Ben Greearbfa35362014-03-03 14:07:09 -08001244 if (msdu_chaining &&
1245 (ath10k_unchain_msdu(msdu_head) < 0)) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001246 ath10k_htt_rx_free_msdu_chain(msdu_head);
1247 continue;
1248 }
1249
1250 info.skb = msdu_head;
1251 info.fcs_err = ath10k_htt_rx_has_fcs_err(msdu_head);
Janusz Dziedzic22569402013-12-13 13:44:16 +01001252 info.mic_err = ath10k_htt_rx_has_mic_err(msdu_head);
Ben Greearc6b56b02014-02-05 13:58:33 -08001253
1254 if (info.fcs_err)
1255 ath10k_dbg(ATH10K_DBG_HTT,
1256 "htt rx has FCS err\n");
1257
1258 if (info.mic_err)
1259 ath10k_dbg(ATH10K_DBG_HTT,
1260 "htt rx has MIC err\n");
1261
Kalle Valo5e3dd152013-06-12 20:52:10 +03001262 hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
1263
1264 if (ath10k_htt_rx_hdr_is_amsdu(hdr))
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001265 ath10k_htt_rx_amsdu(htt, &info);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001266 else
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001267 ath10k_htt_rx_msdu(htt, &info);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001268 }
1269 }
1270
Michal Kazior6e712d42013-09-24 10:18:36 +02001271 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001272}
1273
1274static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
1275 struct htt_rx_fragment_indication *frag)
1276{
1277 struct sk_buff *msdu_head, *msdu_tail;
1278 struct htt_rx_desc *rxd;
1279 enum rx_msdu_decap_format fmt;
1280 struct htt_rx_info info = {};
1281 struct ieee80211_hdr *hdr;
1282 int msdu_chaining;
1283 bool tkip_mic_err;
1284 bool decrypt_err;
1285 u8 *fw_desc;
1286 int fw_desc_len, hdrlen, paramlen;
1287 int trim;
1288
1289 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1290 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1291
1292 msdu_head = NULL;
1293 msdu_tail = NULL;
Michal Kazior45967082014-02-27 18:50:05 +02001294
1295 spin_lock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001296 msdu_chaining = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
1297 &msdu_head, &msdu_tail);
Michal Kazior45967082014-02-27 18:50:05 +02001298 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001299
1300 ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
1301
1302 if (!msdu_head) {
1303 ath10k_warn("htt rx frag no data\n");
1304 return;
1305 }
1306
1307 if (msdu_chaining || msdu_head != msdu_tail) {
1308 ath10k_warn("aggregation with fragmentation?!\n");
1309 ath10k_htt_rx_free_msdu_chain(msdu_head);
1310 return;
1311 }
1312
1313 /* FIXME: implement signal strength */
1314
1315 hdr = (struct ieee80211_hdr *)msdu_head->data;
1316 rxd = (void *)msdu_head->data - sizeof(*rxd);
1317 tkip_mic_err = !!(__le32_to_cpu(rxd->attention.flags) &
1318 RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1319 decrypt_err = !!(__le32_to_cpu(rxd->attention.flags) &
1320 RX_ATTENTION_FLAGS_DECRYPT_ERR);
1321 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
1322 RX_MSDU_START_INFO1_DECAP_FORMAT);
1323
1324 if (fmt != RX_MSDU_DECAP_RAW) {
1325 ath10k_warn("we dont support non-raw fragmented rx yet\n");
1326 dev_kfree_skb_any(msdu_head);
1327 goto end;
1328 }
1329
1330 info.skb = msdu_head;
1331 info.status = HTT_RX_IND_MPDU_STATUS_OK;
1332 info.encrypt_type = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1333 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kazior605f81a2013-07-31 10:47:56 +02001334 info.skb->ip_summed = ath10k_htt_rx_get_csum_state(info.skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001335
1336 if (tkip_mic_err) {
1337 ath10k_warn("tkip mic error\n");
1338 info.status = HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR;
1339 }
1340
1341 if (decrypt_err) {
1342 ath10k_warn("decryption err in fragmented rx\n");
1343 dev_kfree_skb_any(info.skb);
1344 goto end;
1345 }
1346
1347 if (info.encrypt_type != HTT_RX_MPDU_ENCRYPT_NONE) {
1348 hdrlen = ieee80211_hdrlen(hdr->frame_control);
1349 paramlen = ath10k_htt_rx_crypto_param_len(info.encrypt_type);
1350
1351 /* It is more efficient to move the header than the payload */
1352 memmove((void *)info.skb->data + paramlen,
1353 (void *)info.skb->data,
1354 hdrlen);
1355 skb_pull(info.skb, paramlen);
1356 hdr = (struct ieee80211_hdr *)info.skb->data;
1357 }
1358
1359 /* remove trailing FCS */
1360 trim = 4;
1361
1362 /* remove crypto trailer */
1363 trim += ath10k_htt_rx_crypto_tail_len(info.encrypt_type);
1364
1365 /* last fragment of TKIP frags has MIC */
1366 if (!ieee80211_has_morefrags(hdr->frame_control) &&
1367 info.encrypt_type == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1368 trim += 8;
1369
1370 if (trim > info.skb->len) {
1371 ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
1372 dev_kfree_skb_any(info.skb);
1373 goto end;
1374 }
1375
1376 skb_trim(info.skb, info.skb->len - trim);
1377
Ben Greear75fb2f92014-02-05 13:58:34 -08001378 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001379 info.skb->data, info.skb->len);
1380 ath10k_process_rx(htt->ar, &info);
1381
1382end:
1383 if (fw_desc_len > 0) {
1384 ath10k_dbg(ATH10K_DBG_HTT,
1385 "expecting more fragmented rx in one indication %d\n",
1386 fw_desc_len);
1387 }
1388}
1389
Michal Kazior6c5151a2014-02-27 18:50:04 +02001390static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1391 struct sk_buff *skb)
1392{
1393 struct ath10k_htt *htt = &ar->htt;
1394 struct htt_resp *resp = (struct htt_resp *)skb->data;
1395 struct htt_tx_done tx_done = {};
1396 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1397 __le16 msdu_id;
1398 int i;
1399
Michal Kazior45967082014-02-27 18:50:05 +02001400 lockdep_assert_held(&htt->tx_lock);
1401
Michal Kazior6c5151a2014-02-27 18:50:04 +02001402 switch (status) {
1403 case HTT_DATA_TX_STATUS_NO_ACK:
1404 tx_done.no_ack = true;
1405 break;
1406 case HTT_DATA_TX_STATUS_OK:
1407 break;
1408 case HTT_DATA_TX_STATUS_DISCARD:
1409 case HTT_DATA_TX_STATUS_POSTPONE:
1410 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1411 tx_done.discard = true;
1412 break;
1413 default:
1414 ath10k_warn("unhandled tx completion status %d\n", status);
1415 tx_done.discard = true;
1416 break;
1417 }
1418
1419 ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
1420 resp->data_tx_completion.num_msdus);
1421
1422 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1423 msdu_id = resp->data_tx_completion.msdus[i];
1424 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1425 ath10k_txrx_tx_unref(htt, &tx_done);
1426 }
1427}
1428
Kalle Valo5e3dd152013-06-12 20:52:10 +03001429void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1430{
Michal Kazioredb82362013-07-05 16:15:14 +03001431 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001432 struct htt_resp *resp = (struct htt_resp *)skb->data;
1433
1434 /* confirm alignment */
1435 if (!IS_ALIGNED((unsigned long)skb->data, 4))
1436 ath10k_warn("unaligned htt message, expect trouble\n");
1437
Ben Greear75fb2f92014-02-05 13:58:34 -08001438 ath10k_dbg(ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001439 resp->hdr.msg_type);
1440 switch (resp->hdr.msg_type) {
1441 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1442 htt->target_version_major = resp->ver_resp.major;
1443 htt->target_version_minor = resp->ver_resp.minor;
1444 complete(&htt->target_version_received);
1445 break;
1446 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001447 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001448 spin_lock_bh(&htt->rx_ring.lock);
1449 __skb_queue_tail(&htt->rx_compl_q, skb);
1450 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001451 tasklet_schedule(&htt->txrx_compl_task);
1452 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001453 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1454 struct htt_peer_map_event ev = {
1455 .vdev_id = resp->peer_map.vdev_id,
1456 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1457 };
1458 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1459 ath10k_peer_map_event(htt, &ev);
1460 break;
1461 }
1462 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1463 struct htt_peer_unmap_event ev = {
1464 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1465 };
1466 ath10k_peer_unmap_event(htt, &ev);
1467 break;
1468 }
1469 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1470 struct htt_tx_done tx_done = {};
1471 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1472
1473 tx_done.msdu_id =
1474 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1475
1476 switch (status) {
1477 case HTT_MGMT_TX_STATUS_OK:
1478 break;
1479 case HTT_MGMT_TX_STATUS_RETRY:
1480 tx_done.no_ack = true;
1481 break;
1482 case HTT_MGMT_TX_STATUS_DROP:
1483 tx_done.discard = true;
1484 break;
1485 }
1486
Michal Kazior6c5151a2014-02-27 18:50:04 +02001487 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001488 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001489 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001490 break;
1491 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001492 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1493 spin_lock_bh(&htt->tx_lock);
1494 __skb_queue_tail(&htt->tx_compl_q, skb);
1495 spin_unlock_bh(&htt->tx_lock);
1496 tasklet_schedule(&htt->txrx_compl_task);
1497 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001498 case HTT_T2H_MSG_TYPE_SEC_IND: {
1499 struct ath10k *ar = htt->ar;
1500 struct htt_security_indication *ev = &resp->security_indication;
1501
1502 ath10k_dbg(ATH10K_DBG_HTT,
1503 "sec ind peer_id %d unicast %d type %d\n",
1504 __le16_to_cpu(ev->peer_id),
1505 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1506 MS(ev->flags, HTT_SECURITY_TYPE));
1507 complete(&ar->install_key_done);
1508 break;
1509 }
1510 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
1511 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1512 skb->data, skb->len);
1513 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1514 break;
1515 }
1516 case HTT_T2H_MSG_TYPE_TEST:
1517 /* FIX THIS */
1518 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001519 case HTT_T2H_MSG_TYPE_STATS_CONF:
Kalle Valoa9bf0502013-09-03 11:43:55 +03001520 trace_ath10k_htt_stats(skb->data, skb->len);
1521 break;
1522 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Kalle Valo5e3dd152013-06-12 20:52:10 +03001523 case HTT_T2H_MSG_TYPE_RX_ADDBA:
1524 case HTT_T2H_MSG_TYPE_RX_DELBA:
1525 case HTT_T2H_MSG_TYPE_RX_FLUSH:
1526 default:
1527 ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
1528 resp->hdr.msg_type);
1529 ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
1530 skb->data, skb->len);
1531 break;
1532 };
1533
1534 /* Free the indication buffer */
1535 dev_kfree_skb_any(skb);
1536}
Michal Kazior6c5151a2014-02-27 18:50:04 +02001537
1538static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1539{
1540 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1541 struct htt_resp *resp;
1542 struct sk_buff *skb;
1543
Michal Kazior45967082014-02-27 18:50:05 +02001544 spin_lock_bh(&htt->tx_lock);
1545 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001546 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1547 dev_kfree_skb_any(skb);
1548 }
Michal Kazior45967082014-02-27 18:50:05 +02001549 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001550
Michal Kazior45967082014-02-27 18:50:05 +02001551 spin_lock_bh(&htt->rx_ring.lock);
1552 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001553 resp = (struct htt_resp *)skb->data;
1554 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1555 dev_kfree_skb_any(skb);
1556 }
Michal Kazior45967082014-02-27 18:50:05 +02001557 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001558}