Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms of the GNU General Public License as published by the Free |
| 6 | * Software Foundation; either version 2 of the License, or (at your option) |
| 7 | * any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program; if not, write to the Free Software Foundation, Inc., 59 |
| 16 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 17 | * |
| 18 | * The full GNU General Public License is included in this distribution in the |
| 19 | * file called COPYING. |
| 20 | */ |
| 21 | #ifndef IOATDMA_H |
| 22 | #define IOATDMA_H |
| 23 | |
| 24 | #include <linux/dmaengine.h> |
| 25 | #include "ioatdma_hw.h" |
| 26 | #include <linux/init.h> |
| 27 | #include <linux/dmapool.h> |
| 28 | #include <linux/cache.h> |
David S. Miller | 57c651f | 2006-05-23 17:39:49 -0700 | [diff] [blame] | 29 | #include <linux/pci_ids.h> |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 30 | |
Shannon Nelson | 5149fd0 | 2007-10-18 03:07:13 -0700 | [diff] [blame] | 31 | #define IOAT_DMA_VERSION "1.26" |
| 32 | |
Shannon Nelson | 3e03745 | 2007-10-16 01:27:40 -0700 | [diff] [blame] | 33 | enum ioat_interrupt { |
| 34 | none = 0, |
| 35 | msix_multi_vector = 1, |
| 36 | msix_single_vector = 2, |
| 37 | msi = 3, |
| 38 | intx = 4, |
| 39 | }; |
| 40 | |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 41 | #define IOAT_LOW_COMPLETION_MASK 0xffffffc0 |
| 42 | |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 43 | /** |
Shannon Nelson | 8ab8956 | 2007-10-16 01:27:39 -0700 | [diff] [blame] | 44 | * struct ioatdma_device - internal representation of a IOAT device |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 45 | * @pdev: PCI-Express device |
| 46 | * @reg_base: MMIO register space base address |
| 47 | * @dma_pool: for allocating DMA descriptors |
| 48 | * @common: embedded struct dma_device |
Shannon Nelson | 8ab8956 | 2007-10-16 01:27:39 -0700 | [diff] [blame] | 49 | * @version: version of ioatdma device |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 50 | */ |
| 51 | |
Shannon Nelson | 8ab8956 | 2007-10-16 01:27:39 -0700 | [diff] [blame] | 52 | struct ioatdma_device { |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 53 | struct pci_dev *pdev; |
Al Viro | 47b1653 | 2006-10-10 22:45:47 +0100 | [diff] [blame] | 54 | void __iomem *reg_base; |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 55 | struct pci_pool *dma_pool; |
| 56 | struct pci_pool *completion_pool; |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 57 | struct dma_device common; |
Shannon Nelson | 8ab8956 | 2007-10-16 01:27:39 -0700 | [diff] [blame] | 58 | u8 version; |
Shannon Nelson | 3e03745 | 2007-10-16 01:27:40 -0700 | [diff] [blame] | 59 | enum ioat_interrupt irq_mode; |
| 60 | struct msix_entry msix_entries[4]; |
| 61 | struct ioat_dma_chan *idx[4]; |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 62 | }; |
| 63 | |
| 64 | /** |
| 65 | * struct ioat_dma_chan - internal representation of a DMA channel |
| 66 | * @device: |
| 67 | * @reg_base: |
| 68 | * @sw_in_use: |
| 69 | * @completion: |
| 70 | * @completion_low: |
| 71 | * @completion_high: |
| 72 | * @completed_cookie: last cookie seen completed on cleanup |
| 73 | * @cookie: value of last cookie given to client |
| 74 | * @last_completion: |
| 75 | * @xfercap: |
| 76 | * @desc_lock: |
| 77 | * @free_desc: |
| 78 | * @used_desc: |
| 79 | * @resource: |
| 80 | * @device_node: |
| 81 | */ |
| 82 | |
| 83 | struct ioat_dma_chan { |
| 84 | |
Al Viro | 47b1653 | 2006-10-10 22:45:47 +0100 | [diff] [blame] | 85 | void __iomem *reg_base; |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 86 | |
| 87 | dma_cookie_t completed_cookie; |
| 88 | unsigned long last_completion; |
| 89 | |
| 90 | u32 xfercap; /* XFERCAP register value expanded out */ |
| 91 | |
| 92 | spinlock_t cleanup_lock; |
| 93 | spinlock_t desc_lock; |
| 94 | struct list_head free_desc; |
| 95 | struct list_head used_desc; |
| 96 | |
| 97 | int pending; |
| 98 | |
Shannon Nelson | 8ab8956 | 2007-10-16 01:27:39 -0700 | [diff] [blame] | 99 | struct ioatdma_device *device; |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 100 | struct dma_chan common; |
| 101 | |
| 102 | dma_addr_t completion_addr; |
| 103 | union { |
| 104 | u64 full; /* HW completion writeback */ |
| 105 | struct { |
| 106 | u32 low; |
| 107 | u32 high; |
| 108 | }; |
| 109 | } *completion_virt; |
Shannon Nelson | 3e03745 | 2007-10-16 01:27:40 -0700 | [diff] [blame] | 110 | struct tasklet_struct cleanup_task; |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 111 | }; |
| 112 | |
| 113 | /* wrapper around hardware descriptor format + additional software fields */ |
| 114 | |
| 115 | /** |
| 116 | * struct ioat_desc_sw - wrapper around hardware descriptor |
| 117 | * @hw: hardware DMA descriptor |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 118 | * @node: this descriptor will either be on the free list, |
| 119 | * or attached to a transaction list (async_tx.tx_list) |
| 120 | * @tx_cnt: number of descriptors required to complete the transaction |
| 121 | * @async_tx: the generic software descriptor for all engines |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 122 | */ |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 123 | struct ioat_desc_sw { |
| 124 | struct ioat_dma_descriptor *hw; |
| 125 | struct list_head node; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 126 | int tx_cnt; |
Shannon Nelson | 7f2b291 | 2007-10-18 03:07:14 -0700 | [diff] [blame] | 127 | size_t len; |
| 128 | dma_addr_t src; |
| 129 | dma_addr_t dst; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 130 | struct dma_async_tx_descriptor async_tx; |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 131 | }; |
| 132 | |
Shannon Nelson | 8ab8956 | 2007-10-16 01:27:39 -0700 | [diff] [blame] | 133 | #if defined(CONFIG_INTEL_IOATDMA) || defined(CONFIG_INTEL_IOATDMA_MODULE) |
| 134 | struct ioatdma_device *ioat_dma_probe(struct pci_dev *pdev, |
| 135 | void __iomem *iobase); |
| 136 | void ioat_dma_remove(struct ioatdma_device *device); |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 137 | struct dca_provider *ioat_dca_init(struct pci_dev *pdev, |
| 138 | void __iomem *iobase); |
Shannon Nelson | 8ab8956 | 2007-10-16 01:27:39 -0700 | [diff] [blame] | 139 | #else |
| 140 | #define ioat_dma_probe(pdev, iobase) NULL |
| 141 | #define ioat_dma_remove(device) do { } while (0) |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 142 | #define ioat_dca_init(pdev, iobase) NULL |
Shannon Nelson | 8ab8956 | 2007-10-16 01:27:39 -0700 | [diff] [blame] | 143 | #endif |
| 144 | |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 145 | #endif /* IOATDMA_H */ |