Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 1 | # CONFIG_LOCALVERSION_AUTO is not set |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 2 | CONFIG_SYSVIPC=y |
3 | CONFIG_POSIX_MQUEUE=y | ||||
Will Deacon | 74d2eb3 | 2014-05-22 15:13:05 +0100 | [diff] [blame] | 4 | CONFIG_AUDIT=y |
5 | CONFIG_NO_HZ_IDLE=y | ||||
6 | CONFIG_HIGH_RES_TIMERS=y | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 7 | CONFIG_BSD_PROCESS_ACCT=y |
8 | CONFIG_BSD_PROCESS_ACCT_V3=y | ||||
Catalin Marinas | 89072728 | 2014-06-16 11:11:23 +0100 | [diff] [blame] | 9 | CONFIG_TASKSTATS=y |
10 | CONFIG_TASK_DELAY_ACCT=y | ||||
11 | CONFIG_TASK_XACCT=y | ||||
12 | CONFIG_TASK_IO_ACCOUNTING=y | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 13 | CONFIG_IKCONFIG=y |
14 | CONFIG_IKCONFIG_PROC=y | ||||
15 | CONFIG_LOG_BUF_SHIFT=14 | ||||
Catalin Marinas | 89072728 | 2014-06-16 11:11:23 +0100 | [diff] [blame] | 16 | CONFIG_MEMCG=y |
17 | CONFIG_MEMCG_SWAP=y | ||||
Catalin Marinas | 89072728 | 2014-06-16 11:11:23 +0100 | [diff] [blame] | 18 | CONFIG_CGROUP_HUGETLB=y |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 19 | # CONFIG_UTS_NS is not set |
20 | # CONFIG_IPC_NS is not set | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 21 | # CONFIG_NET_NS is not set |
22 | CONFIG_SCHED_AUTOGROUP=y | ||||
23 | CONFIG_BLK_DEV_INITRD=y | ||||
24 | CONFIG_KALLSYMS_ALL=y | ||||
25 | # CONFIG_COMPAT_BRK is not set | ||||
26 | CONFIG_PROFILING=y | ||||
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 27 | CONFIG_JUMP_LABEL=y |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 28 | CONFIG_MODULES=y |
29 | CONFIG_MODULE_UNLOAD=y | ||||
30 | # CONFIG_BLK_DEV_BSG is not set | ||||
31 | # CONFIG_IOSCHED_DEADLINE is not set | ||||
Andre Przywara | 22b0898 | 2016-02-22 18:20:55 +0000 | [diff] [blame] | 32 | CONFIG_ARCH_SUNXI=y |
Antoine Tenart | 476cfc0 | 2016-02-25 11:14:53 +0100 | [diff] [blame] | 33 | CONFIG_ARCH_ALPINE=y |
Ray Jui | 36b7c58 | 2015-07-27 15:42:20 -0700 | [diff] [blame] | 34 | CONFIG_ARCH_BCM_IPROC=y |
Jisheng Zhang | bcfff4d | 2015-08-03 21:24:46 +0200 | [diff] [blame] | 35 | CONFIG_ARCH_BERLIN=y |
Krzysztof Kozlowski | c87b3e9 | 2015-11-16 10:09:13 +0900 | [diff] [blame] | 36 | CONFIG_ARCH_EXYNOS=y |
Bhupesh Sharma | 53a5fde | 2015-10-24 01:01:50 +0530 | [diff] [blame] | 37 | CONFIG_ARCH_LAYERSCAPE=y |
Chanho Min | b824a954 | 2016-04-11 20:54:45 +0900 | [diff] [blame] | 38 | CONFIG_ARCH_LG1K=y |
Bintian Wang | 85fe946 | 2015-01-06 09:30:36 +0800 | [diff] [blame] | 39 | CONFIG_ARCH_HISI=y |
Eddie Huang | 4727a6f | 2015-12-01 10:14:00 +0100 | [diff] [blame] | 40 | CONFIG_ARCH_MEDIATEK=y |
Kevin Hilman | 97d8eb1 | 2016-03-23 11:49:53 -0700 | [diff] [blame] | 41 | CONFIG_ARCH_MESON=y |
Olof Johansson | c74f162 | 2016-02-24 16:44:14 -0800 | [diff] [blame] | 42 | CONFIG_ARCH_MVEBU=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 43 | CONFIG_ARCH_QCOM=y |
Heiko Stübner | c425b5c | 2015-07-17 00:34:23 +0200 | [diff] [blame] | 44 | CONFIG_ARCH_ROCKCHIP=y |
Will Deacon | 475bfd3 | 2015-03-30 11:29:35 +0100 | [diff] [blame] | 45 | CONFIG_ARCH_SEATTLE=y |
Kuninori Morimoto | 727e8d0 | 2015-10-02 11:56:22 +0900 | [diff] [blame] | 46 | CONFIG_ARCH_RENESAS=y |
47 | CONFIG_ARCH_R8A7795=y | ||||
Takeshi Kihara | 62bcf90 | 2016-05-24 10:54:40 +0900 | [diff] [blame] | 48 | CONFIG_ARCH_R8A7796=y |
Dinh Nguyen | 78cd6a9 | 2015-08-04 23:25:50 -0500 | [diff] [blame] | 49 | CONFIG_ARCH_STRATIX10=y |
Will Deacon | 475bfd3 | 2015-03-30 11:29:35 +0100 | [diff] [blame] | 50 | CONFIG_ARCH_TEGRA=y |
Zhizhou Zhang | c4bb799 | 2015-03-11 02:27:08 +0000 | [diff] [blame] | 51 | CONFIG_ARCH_SPRD=y |
Robert Richter | 18ef9fe | 2014-07-18 17:51:06 +0200 | [diff] [blame] | 52 | CONFIG_ARCH_THUNDER=y |
Masahiro Yamada | 208ef7f | 2015-11-24 18:08:29 +0900 | [diff] [blame] | 53 | CONFIG_ARCH_UNIPHIER=y |
Catalin Marinas | 1ae90e7 | 2012-09-05 17:47:44 +0100 | [diff] [blame] | 54 | CONFIG_ARCH_VEXPRESS=y |
Jayachandran C | 4cf430e | 2016-02-20 19:49:22 +0530 | [diff] [blame] | 55 | CONFIG_ARCH_VULCAN=y |
Vinayak Kale | c1db16d | 2013-04-24 10:06:58 +0100 | [diff] [blame] | 56 | CONFIG_ARCH_XGENE=y |
Michal Simek | 5d1b79d | 2015-03-09 09:41:04 +0100 | [diff] [blame] | 57 | CONFIG_ARCH_ZYNQMP=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 58 | CONFIG_PCI=y |
59 | CONFIG_PCI_MSI=y | ||||
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 60 | CONFIG_PCI_IOV=y |
Simon Horman | 350a73b | 2016-04-21 13:51:55 +1000 | [diff] [blame] | 61 | CONFIG_PCIE_RCAR=y |
Liviu Dudau | 324e84c | 2015-10-09 14:10:12 +0100 | [diff] [blame] | 62 | CONFIG_PCI_HOST_GENERIC=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 63 | CONFIG_PCI_XGENE=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 64 | CONFIG_PCI_LAYERSCAPE=y |
65 | CONFIG_PCI_HISI=y | ||||
66 | CONFIG_PCIE_QCOM=y | ||||
Thomas Petazzoni | 4cf2893 | 2016-05-19 14:11:34 +0200 | [diff] [blame] | 67 | CONFIG_PCIE_ARMADA_8K=y |
Stuart Yoder | 211102d | 2016-04-20 10:57:34 -0500 | [diff] [blame] | 68 | CONFIG_ARM64_VA_BITS_48=y |
Dietmar Eggemann | aa644fa | 2015-10-19 17:55:49 +0100 | [diff] [blame] | 69 | CONFIG_SCHED_MC=y |
Catalin Marinas | dab7ea3 | 2013-11-05 10:03:53 +0000 | [diff] [blame] | 70 | CONFIG_PREEMPT=y |
Catalin Marinas | 89072728 | 2014-06-16 11:11:23 +0100 | [diff] [blame] | 71 | CONFIG_KSM=y |
Will Deacon | 74d2eb3 | 2014-05-22 15:13:05 +0100 | [diff] [blame] | 72 | CONFIG_TRANSPARENT_HUGEPAGE=y |
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 73 | CONFIG_CMA=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 74 | CONFIG_XEN=y |
Geoff Levand | b26a4ae | 2016-06-23 17:54:48 +0000 | [diff] [blame] | 75 | CONFIG_KEXEC=y |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 76 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set |
77 | CONFIG_COMPAT=y | ||||
Catalin Marinas | 62fa5e2 | 2015-01-27 18:25:25 +0000 | [diff] [blame] | 78 | CONFIG_CPU_IDLE=y |
Daniel Lezcano | 0e08704 | 2015-02-02 16:32:46 +0100 | [diff] [blame] | 79 | CONFIG_ARM_CPUIDLE=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 80 | CONFIG_CPU_FREQ=y |
81 | CONFIG_ARM_BIG_LITTLE_CPUFREQ=y | ||||
82 | CONFIG_ARM_SCPI_CPUFREQ=y | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 83 | CONFIG_NET=y |
84 | CONFIG_PACKET=y | ||||
85 | CONFIG_UNIX=y | ||||
86 | CONFIG_INET=y | ||||
87 | CONFIG_IP_PNP=y | ||||
88 | CONFIG_IP_PNP_DHCP=y | ||||
89 | CONFIG_IP_PNP_BOOTP=y | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 90 | # CONFIG_IPV6 is not set |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 91 | CONFIG_BPF_JIT=y |
Guodong Xu | d1b4cad | 2016-04-02 19:47:54 +0800 | [diff] [blame] | 92 | CONFIG_CFG80211=m |
93 | CONFIG_MAC80211=m | ||||
94 | CONFIG_MAC80211_LEDS=y | ||||
95 | CONFIG_RFKILL=m | ||||
Will Deacon | af9b996 | 2014-07-29 16:20:02 +0100 | [diff] [blame] | 96 | CONFIG_NET_9P=y |
97 | CONFIG_NET_9P_VIRTIO=y | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 98 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
99 | CONFIG_DEVTMPFS=y | ||||
Robert Richter | 3666f88 | 2014-07-30 16:06:34 +0100 | [diff] [blame] | 100 | CONFIG_DEVTMPFS_MOUNT=y |
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 101 | CONFIG_DMA_CMA=y |
Thomas Petazzoni | e5d8b0a | 2016-04-26 09:58:38 +0200 | [diff] [blame] | 102 | CONFIG_MTD=y |
103 | CONFIG_MTD_M25P80=y | ||||
104 | CONFIG_MTD_SPI_NOR=y | ||||
Catalin Marinas | 89072728 | 2014-06-16 11:11:23 +0100 | [diff] [blame] | 105 | CONFIG_BLK_DEV_LOOP=y |
Will Deacon | 74d2eb3 | 2014-05-22 15:13:05 +0100 | [diff] [blame] | 106 | CONFIG_VIRTIO_BLK=y |
Sudeep Holla | 71ee68a | 2016-06-20 16:24:08 +0100 | [diff] [blame] | 107 | CONFIG_SRAM=y |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 108 | # CONFIG_SCSI_PROC_FS is not set |
109 | CONFIG_BLK_DEV_SD=y | ||||
110 | # CONFIG_SCSI_LOWLEVEL is not set | ||||
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 111 | CONFIG_ATA=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 112 | CONFIG_SATA_AHCI=y |
113 | CONFIG_SATA_AHCI_PLATFORM=y | ||||
Suneel Garapati | 3446af3 | 2015-06-29 07:02:08 +0200 | [diff] [blame] | 114 | CONFIG_AHCI_CEVA=y |
Gregory CLEMENT | e772ca0 | 2016-02-02 18:15:24 +0100 | [diff] [blame] | 115 | CONFIG_AHCI_MVEBU=y |
Mark Brown | 49d947f | 2014-08-14 20:57:16 +0100 | [diff] [blame] | 116 | CONFIG_AHCI_XGENE=y |
Stuart Yoder | 3892132 | 2016-04-20 10:57:40 -0500 | [diff] [blame] | 117 | CONFIG_AHCI_QORIQ=y |
Kouei Abe | 1fd6b87 | 2015-12-14 16:42:38 +0100 | [diff] [blame] | 118 | CONFIG_SATA_RCAR=y |
Andre Przywara | d7c38ff | 2016-05-05 10:44:18 +0100 | [diff] [blame] | 119 | CONFIG_SATA_SIL24=y |
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 120 | CONFIG_PATA_PLATFORM=y |
121 | CONFIG_PATA_OF_PLATFORM=y | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 122 | CONFIG_NETDEVICES=y |
Catalin Marinas | 89072728 | 2014-06-16 11:11:23 +0100 | [diff] [blame] | 123 | CONFIG_TUN=y |
Will Deacon | af9b996 | 2014-07-29 16:20:02 +0100 | [diff] [blame] | 124 | CONFIG_VIRTIO_NET=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 125 | CONFIG_AMD_XGBE=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 126 | CONFIG_NET_XGENE=y |
Chanho Min | ad763ee | 2016-06-01 10:39:59 +0900 | [diff] [blame] | 127 | CONFIG_MACB=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 128 | CONFIG_E1000E=y |
129 | CONFIG_IGB=y | ||||
130 | CONFIG_IGBVF=y | ||||
Will Deacon | 475bfd3 | 2015-03-30 11:29:35 +0100 | [diff] [blame] | 131 | CONFIG_SKY2=y |
Simon Horman | 0dc18e2 | 2015-11-02 13:31:47 +0900 | [diff] [blame] | 132 | CONFIG_RAVB=y |
Catalin Marinas | 1ae90e7 | 2012-09-05 17:47:44 +0100 | [diff] [blame] | 133 | CONFIG_SMC91X=y |
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 134 | CONFIG_SMSC911X=y |
Kevin Hilman | 72557a6 | 2016-06-03 15:38:15 -0700 | [diff] [blame] | 135 | CONFIG_STMMAC_ETH=m |
136 | CONFIG_REALTEK_PHY=m | ||||
Simon Horman | 0dc18e2 | 2015-11-02 13:31:47 +0900 | [diff] [blame] | 137 | CONFIG_MICREL_PHY=y |
Akira Tsukamoto | 3cf5d6c | 2016-04-02 19:47:53 +0800 | [diff] [blame] | 138 | CONFIG_USB_PEGASUS=m |
139 | CONFIG_USB_RTL8150=m | ||||
140 | CONFIG_USB_RTL8152=m | ||||
141 | CONFIG_USB_USBNET=m | ||||
142 | CONFIG_USB_NET_DM9601=m | ||||
143 | CONFIG_USB_NET_SR9800=m | ||||
144 | CONFIG_USB_NET_SMSC75XX=m | ||||
145 | CONFIG_USB_NET_SMSC95XX=m | ||||
146 | CONFIG_USB_NET_PLUSB=m | ||||
147 | CONFIG_USB_NET_MCS7830=m | ||||
Guodong Xu | d1b4cad | 2016-04-02 19:47:54 +0800 | [diff] [blame] | 148 | CONFIG_WL18XX=m |
149 | CONFIG_WLCORE_SDIO=m | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 150 | CONFIG_INPUT_EVDEV=y |
Linus Walleij | 5d358d1 | 2015-06-04 13:41:41 +0200 | [diff] [blame] | 151 | CONFIG_KEYBOARD_GPIO=y |
Andy Gross | fde88a0 | 2016-05-19 00:00:17 -0500 | [diff] [blame] | 152 | CONFIG_INPUT_MISC=y |
153 | CONFIG_INPUT_PM8941_PWRKEY=y | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 154 | # CONFIG_SERIO_SERPORT is not set |
Catalin Marinas | e2b6b35 | 2012-10-04 14:22:23 +0100 | [diff] [blame] | 155 | CONFIG_SERIO_AMBAKMI=y |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 156 | CONFIG_LEGACY_PTY_COUNT=16 |
Vinayak Kale | c1db16d | 2013-04-24 10:06:58 +0100 | [diff] [blame] | 157 | CONFIG_SERIAL_8250=y |
158 | CONFIG_SERIAL_8250_CONSOLE=y | ||||
Heiko Stübner | c425b5c | 2015-07-17 00:34:23 +0200 | [diff] [blame] | 159 | CONFIG_SERIAL_8250_DW=y |
Eddie Huang | 4727a6f | 2015-12-01 10:14:00 +0100 | [diff] [blame] | 160 | CONFIG_SERIAL_8250_MT6577=y |
Masahiro Yamada | 208ef7f | 2015-11-24 18:08:29 +0900 | [diff] [blame] | 161 | CONFIG_SERIAL_8250_UNIPHIER=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 162 | CONFIG_SERIAL_OF_PLATFORM=y |
Catalin Marinas | 1ae90e7 | 2012-09-05 17:47:44 +0100 | [diff] [blame] | 163 | CONFIG_SERIAL_AMBA_PL011=y |
164 | CONFIG_SERIAL_AMBA_PL011_CONSOLE=y | ||||
Alim Akhtar | efa773f | 2015-08-24 18:01:15 +0530 | [diff] [blame] | 165 | CONFIG_SERIAL_SAMSUNG=y |
Alim Akhtar | efa773f | 2015-08-24 18:01:15 +0530 | [diff] [blame] | 166 | CONFIG_SERIAL_SAMSUNG_CONSOLE=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 167 | CONFIG_SERIAL_TEGRA=y |
Kuninori Morimoto | 727e8d0 | 2015-10-02 11:56:22 +0900 | [diff] [blame] | 168 | CONFIG_SERIAL_SH_SCI=y |
169 | CONFIG_SERIAL_SH_SCI_NR_UARTS=11 | ||||
170 | CONFIG_SERIAL_SH_SCI_CONSOLE=y | ||||
Kevin Hilman | 97d8eb1 | 2016-03-23 11:49:53 -0700 | [diff] [blame] | 171 | CONFIG_SERIAL_MESON=y |
172 | CONFIG_SERIAL_MESON_CONSOLE=y | ||||
Abhimanyu Kapur | d7f64a4 | 2013-10-15 21:11:09 -0700 | [diff] [blame] | 173 | CONFIG_SERIAL_MSM=y |
174 | CONFIG_SERIAL_MSM_CONSOLE=y | ||||
Michal Simek | 5d1b79d | 2015-03-09 09:41:04 +0100 | [diff] [blame] | 175 | CONFIG_SERIAL_XILINX_PS_UART=y |
176 | CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y | ||||
Gregory CLEMENT | e772ca0 | 2016-02-02 18:15:24 +0100 | [diff] [blame] | 177 | CONFIG_SERIAL_MVEBU_UART=y |
Will Deacon | af9b996 | 2014-07-29 16:20:02 +0100 | [diff] [blame] | 178 | CONFIG_VIRTIO_CONSOLE=y |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 179 | # CONFIG_HW_RANDOM is not set |
Andre Przywara | 22b0898 | 2016-02-22 18:20:55 +0000 | [diff] [blame] | 180 | CONFIG_I2C_CHARDEV=y |
Stuart Yoder | 3892132 | 2016-04-20 10:57:40 -0500 | [diff] [blame] | 181 | CONFIG_I2C_MUX=y |
182 | CONFIG_I2C_MUX_PCA954x=y | ||||
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 183 | CONFIG_I2C_DESIGNWARE_PLATFORM=y |
Stuart Yoder | 3892132 | 2016-04-20 10:57:40 -0500 | [diff] [blame] | 184 | CONFIG_I2C_IMX=y |
Andre Przywara | 22b0898 | 2016-02-22 18:20:55 +0000 | [diff] [blame] | 185 | CONFIG_I2C_MV64XXX=y |
Andy Gross | f14b369 | 2015-10-08 15:37:08 -0500 | [diff] [blame] | 186 | CONFIG_I2C_QUP=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 187 | CONFIG_I2C_TEGRA=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 188 | CONFIG_I2C_UNIPHIER_F=y |
Kuninori Morimoto | c0c886e | 2015-09-18 02:07:18 +0000 | [diff] [blame] | 189 | CONFIG_I2C_RCAR=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 190 | CONFIG_I2C_CROS_EC_TUNNEL=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 191 | CONFIG_SPI=y |
Thomas Petazzoni | e5d8b0a | 2016-04-26 09:58:38 +0200 | [diff] [blame] | 192 | CONFIG_SPI_ORION=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 193 | CONFIG_SPI_PL022=y |
Andy Gross | f14b369 | 2015-10-08 15:37:08 -0500 | [diff] [blame] | 194 | CONFIG_SPI_QUP=y |
Guodong Xu | d3098f2 | 2016-04-02 19:47:52 +0800 | [diff] [blame] | 195 | CONFIG_SPI_SPIDEV=m |
Krzysztof Kozlowski | 426f754 | 2016-07-08 22:17:03 +0200 | [diff] [blame] | 196 | CONFIG_SPI_S3C64XX=y |
Srinivas Kandagatla | efdda17 | 2016-02-06 07:07:33 +0000 | [diff] [blame] | 197 | CONFIG_SPMI=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 198 | CONFIG_PINCTRL_SINGLE=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 199 | CONFIG_PINCTRL_MAX77620=y |
Abhimanyu Kapur | d7f64a4 | 2013-10-15 21:11:09 -0700 | [diff] [blame] | 200 | CONFIG_PINCTRL_MSM8916=y |
Srinivas Kandagatla | f1a176f | 2016-06-17 16:18:02 +0100 | [diff] [blame] | 201 | CONFIG_PINCTRL_MSM8996=y |
Christopher Covington | d11a544 | 2016-07-01 10:27:17 -0400 | [diff] [blame^] | 202 | CONFIG_PINCTRL_QDF2XXX=y |
Srinivas Kandagatla | efdda17 | 2016-02-06 07:07:33 +0000 | [diff] [blame] | 203 | CONFIG_PINCTRL_QCOM_SPMI_PMIC=y |
Andre Przywara | 22b0898 | 2016-02-22 18:20:55 +0000 | [diff] [blame] | 204 | CONFIG_GPIO_SYSFS=y |
Kefeng Wang | c966f05 | 2016-01-29 16:39:06 +0800 | [diff] [blame] | 205 | CONFIG_GPIO_DWAPB=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 206 | CONFIG_GPIO_PL061=y |
Takeshi Kihara | 316d9df | 2015-10-29 08:09:19 +0900 | [diff] [blame] | 207 | CONFIG_GPIO_RCAR=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 208 | CONFIG_GPIO_XGENE=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 209 | CONFIG_GPIO_PCA953X=y |
210 | CONFIG_GPIO_PCA953X_IRQ=y | ||||
211 | CONFIG_GPIO_MAX77620=y | ||||
Georgi Djakov | d1be05a | 2016-02-25 12:46:31 +0200 | [diff] [blame] | 212 | CONFIG_POWER_RESET_MSM=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 213 | CONFIG_BATTERY_BQ27XXX=y |
Will Deacon | 475bfd3 | 2015-03-30 11:29:35 +0100 | [diff] [blame] | 214 | CONFIG_POWER_RESET_XGENE=y |
215 | CONFIG_POWER_RESET_SYSCON=y | ||||
Stuart Yoder | 3892132 | 2016-04-20 10:57:40 -0500 | [diff] [blame] | 216 | CONFIG_SENSORS_LM90=m |
217 | CONFIG_SENSORS_INA2XX=m | ||||
Javi Merino | 2a0e527 | 2016-06-13 16:15:14 +0100 | [diff] [blame] | 218 | CONFIG_SENSORS_ARM_SCPI=y |
Alim Akhtar | 617fe71 | 2016-02-25 09:04:09 +0530 | [diff] [blame] | 219 | CONFIG_THERMAL=y |
220 | CONFIG_THERMAL_EMULATION=y | ||||
221 | CONFIG_EXYNOS_THERMAL=y | ||||
Wolfram Sang | fc4d2c7 | 2016-04-01 13:56:26 +0200 | [diff] [blame] | 222 | CONFIG_WATCHDOG=y |
223 | CONFIG_RENESAS_WDT=y | ||||
Krzysztof Kozlowski | 426f754 | 2016-07-08 22:17:03 +0200 | [diff] [blame] | 224 | CONFIG_S3C2410_WATCHDOG=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 225 | CONFIG_MFD_MAX77620=y |
Srinivas Kandagatla | efdda17 | 2016-02-06 07:07:33 +0000 | [diff] [blame] | 226 | CONFIG_MFD_SPMI_PMIC=y |
Alim Akhtar | 6bb8371 | 2016-02-05 11:34:29 +0530 | [diff] [blame] | 227 | CONFIG_MFD_SEC_CORE=y |
Guodong Xu | d7e182a | 2016-04-02 19:47:51 +0800 | [diff] [blame] | 228 | CONFIG_MFD_HI655X_PMIC=y |
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 229 | CONFIG_REGULATOR=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 230 | CONFIG_MFD_CROS_EC=y |
231 | CONFIG_MFD_CROS_EC_I2C=y | ||||
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 232 | CONFIG_REGULATOR_FIXED_VOLTAGE=y |
Guodong Xu | d7e182a | 2016-04-02 19:47:51 +0800 | [diff] [blame] | 233 | CONFIG_REGULATOR_HI655X=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 234 | CONFIG_REGULATOR_MAX77620=y |
235 | CONFIG_REGULATOR_PWM=y | ||||
Andy Gross | f14b369 | 2015-10-08 15:37:08 -0500 | [diff] [blame] | 236 | CONFIG_REGULATOR_QCOM_SMD_RPM=y |
Srinivas Kandagatla | efdda17 | 2016-02-06 07:07:33 +0000 | [diff] [blame] | 237 | CONFIG_REGULATOR_QCOM_SPMI=y |
Alim Akhtar | 6bb8371 | 2016-02-05 11:34:29 +0530 | [diff] [blame] | 238 | CONFIG_REGULATOR_S2MPS11=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 239 | CONFIG_DRM=m |
240 | CONFIG_DRM_NOUVEAU=m | ||||
241 | CONFIG_DRM_TEGRA=m | ||||
242 | CONFIG_DRM_PANEL_SIMPLE=m | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 243 | CONFIG_FB=y |
Catalin Marinas | e2b6b35 | 2012-10-04 14:22:23 +0100 | [diff] [blame] | 244 | CONFIG_FB_ARMCLCD=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 245 | CONFIG_BACKLIGHT_GENERIC=m |
246 | CONFIG_BACKLIGHT_LP855X=m | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 247 | CONFIG_FRAMEBUFFER_CONSOLE=y |
248 | CONFIG_LOGO=y | ||||
249 | # CONFIG_LOGO_LINUX_MONO is not set | ||||
250 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||||
Kuninori Morimoto | 05a64b3 | 2015-11-25 06:39:48 +0000 | [diff] [blame] | 251 | CONFIG_SOUND=y |
252 | CONFIG_SND=y | ||||
253 | CONFIG_SND_SOC=y | ||||
254 | CONFIG_SND_SOC_RCAR=y | ||||
Krzysztof Kozlowski | 426f754 | 2016-07-08 22:17:03 +0200 | [diff] [blame] | 255 | CONFIG_SND_SOC_SAMSUNG=y |
Kuninori Morimoto | 05a64b3 | 2015-11-25 06:39:48 +0000 | [diff] [blame] | 256 | CONFIG_SND_SOC_AK4613=y |
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 257 | CONFIG_USB=y |
Srinivas Kandagatla | efdda17 | 2016-02-06 07:07:33 +0000 | [diff] [blame] | 258 | CONFIG_USB_OTG=y |
Gregory CLEMENT | e772ca0 | 2016-02-02 18:15:24 +0100 | [diff] [blame] | 259 | CONFIG_USB_XHCI_HCD=y |
Yoshihiro Shimoda | a03bd57 | 2016-04-21 20:39:32 +0900 | [diff] [blame] | 260 | CONFIG_USB_XHCI_RCAR=y |
Krzysztof Kozlowski | 426f754 | 2016-07-08 22:17:03 +0200 | [diff] [blame] | 261 | CONFIG_USB_EHCI_EXYNOS=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 262 | CONFIG_USB_XHCI_TEGRA=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 263 | CONFIG_USB_EHCI_HCD=y |
Srinivas Kandagatla | efdda17 | 2016-02-06 07:07:33 +0000 | [diff] [blame] | 264 | CONFIG_USB_EHCI_MSM=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 265 | CONFIG_USB_EHCI_HCD_PLATFORM=y |
Krzysztof Kozlowski | 426f754 | 2016-07-08 22:17:03 +0200 | [diff] [blame] | 266 | CONFIG_USB_OHCI_EXYNOS=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 267 | CONFIG_USB_OHCI_HCD=y |
268 | CONFIG_USB_OHCI_HCD_PLATFORM=y | ||||
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 269 | CONFIG_USB_STORAGE=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 270 | CONFIG_USB_DWC2=y |
Krzysztof Kozlowski | 426f754 | 2016-07-08 22:17:03 +0200 | [diff] [blame] | 271 | CONFIG_USB_DWC3=y |
Srinivas Kandagatla | efdda17 | 2016-02-06 07:07:33 +0000 | [diff] [blame] | 272 | CONFIG_USB_CHIPIDEA=y |
273 | CONFIG_USB_CHIPIDEA_UDC=y | ||||
274 | CONFIG_USB_CHIPIDEA_HOST=y | ||||
Will Deacon | 475bfd3 | 2015-03-30 11:29:35 +0100 | [diff] [blame] | 275 | CONFIG_USB_ISP1760=y |
Srinivas Kandagatla | efdda17 | 2016-02-06 07:07:33 +0000 | [diff] [blame] | 276 | CONFIG_USB_HSIC_USB3503=y |
277 | CONFIG_USB_MSM_OTG=y | ||||
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 278 | CONFIG_USB_ULPI=y |
Srinivas Kandagatla | efdda17 | 2016-02-06 07:07:33 +0000 | [diff] [blame] | 279 | CONFIG_USB_GADGET=y |
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 280 | CONFIG_MMC=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 281 | CONFIG_MMC_BLOCK_MINORS=32 |
Mark Rutland | 55834a7 | 2014-02-07 17:12:45 +0000 | [diff] [blame] | 282 | CONFIG_MMC_ARMMMCI=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 283 | CONFIG_MMC_SDHCI=y |
Christopher Covington | d11a544 | 2016-07-01 10:27:17 -0400 | [diff] [blame^] | 284 | CONFIG_MMC_SDHCI_ACPI=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 285 | CONFIG_MMC_SDHCI_PLTFM=y |
Stuart Yoder | 3892132 | 2016-04-20 10:57:40 -0500 | [diff] [blame] | 286 | CONFIG_MMC_SDHCI_OF_ESDHC=y |
Thierry Reding | ce64c80 | 2015-11-16 15:41:22 +0100 | [diff] [blame] | 287 | CONFIG_MMC_SDHCI_TEGRA=y |
Georgi Djakov | d1be05a | 2016-02-25 12:46:31 +0200 | [diff] [blame] | 288 | CONFIG_MMC_SDHCI_MSM=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 289 | CONFIG_MMC_SPI=y |
Alim Akhtar | efa773f | 2015-08-24 18:01:15 +0530 | [diff] [blame] | 290 | CONFIG_MMC_DW=y |
Alim Akhtar | efa773f | 2015-08-24 18:01:15 +0530 | [diff] [blame] | 291 | CONFIG_MMC_DW_EXYNOS=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 292 | CONFIG_MMC_DW_K3=y |
293 | CONFIG_MMC_SUNXI=y | ||||
Linus Walleij | 48f1a9a | 2015-02-25 13:11:55 +0100 | [diff] [blame] | 294 | CONFIG_NEW_LEDS=y |
295 | CONFIG_LEDS_CLASS=y | ||||
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 296 | CONFIG_LEDS_GPIO=y |
Linus Walleij | 48f1a9a | 2015-02-25 13:11:55 +0100 | [diff] [blame] | 297 | CONFIG_LEDS_SYSCON=y |
298 | CONFIG_LEDS_TRIGGERS=y | ||||
299 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||||
300 | CONFIG_LEDS_TRIGGER_CPU=y | ||||
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 301 | CONFIG_RTC_CLASS=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 302 | CONFIG_RTC_DRV_MAX77686=y |
Alim Akhtar | 6bb8371 | 2016-02-05 11:34:29 +0530 | [diff] [blame] | 303 | CONFIG_RTC_DRV_S5M=y |
Stuart Yoder | 3892132 | 2016-04-20 10:57:40 -0500 | [diff] [blame] | 304 | CONFIG_RTC_DRV_DS3232=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 305 | CONFIG_RTC_DRV_EFI=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 306 | CONFIG_RTC_DRV_PL031=y |
Andre Przywara | 22b0898 | 2016-02-22 18:20:55 +0000 | [diff] [blame] | 307 | CONFIG_RTC_DRV_SUN6I=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 308 | CONFIG_RTC_DRV_TEGRA=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 309 | CONFIG_RTC_DRV_XGENE=y |
Alim Akhtar | 46926e2 | 2016-07-05 15:36:51 +0530 | [diff] [blame] | 310 | CONFIG_RTC_DRV_S3C=y |
Andy Gross | f14b369 | 2015-10-08 15:37:08 -0500 | [diff] [blame] | 311 | CONFIG_DMADEVICES=y |
Alim Akhtar | 371feaf | 2016-04-12 18:20:58 +0530 | [diff] [blame] | 312 | CONFIG_PL330_DMA=y |
Thierry Reding | 73d877e | 2015-11-16 15:42:57 +0100 | [diff] [blame] | 313 | CONFIG_TEGRA20_APB_DMA=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 314 | CONFIG_QCOM_BAM_DMA=y |
Christopher Covington | d11a544 | 2016-07-01 10:27:17 -0400 | [diff] [blame^] | 315 | CONFIG_QCOM_HIDMA_MGMT=y |
316 | CONFIG_QCOM_HIDMA=y | ||||
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 317 | CONFIG_RCAR_DMAC=y |
318 | CONFIG_VFIO=y | ||||
319 | CONFIG_VFIO_PCI=y | ||||
Will Deacon | 475bfd3 | 2015-03-30 11:29:35 +0100 | [diff] [blame] | 320 | CONFIG_VIRTIO_PCI=y |
Will Deacon | af9b996 | 2014-07-29 16:20:02 +0100 | [diff] [blame] | 321 | CONFIG_VIRTIO_BALLOON=y |
Will Deacon | 74d2eb3 | 2014-05-22 15:13:05 +0100 | [diff] [blame] | 322 | CONFIG_VIRTIO_MMIO=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 323 | CONFIG_XEN_GNTDEV=y |
324 | CONFIG_XEN_GRANT_DEV_ALLOC=y | ||||
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 325 | CONFIG_COMMON_CLK_SCPI=y |
Kuninori Morimoto | d3643e1 | 2015-12-01 05:36:57 +0000 | [diff] [blame] | 326 | CONFIG_COMMON_CLK_CS2000_CP=y |
Alim Akhtar | 46926e2 | 2016-07-05 15:36:51 +0530 | [diff] [blame] | 327 | CONFIG_COMMON_CLK_S2MPS11=y |
Stuart Yoder | 3892132 | 2016-04-20 10:57:40 -0500 | [diff] [blame] | 328 | CONFIG_CLK_QORIQ=y |
Abhimanyu Kapur | d7f64a4 | 2013-10-15 21:11:09 -0700 | [diff] [blame] | 329 | CONFIG_COMMON_CLK_QCOM=y |
330 | CONFIG_MSM_GCC_8916=y | ||||
Stephen Boyd | 28f049d | 2016-06-15 18:07:51 -0700 | [diff] [blame] | 331 | CONFIG_MSM_MMCC_8996=y |
Andy Gross | f14b369 | 2015-10-08 15:37:08 -0500 | [diff] [blame] | 332 | CONFIG_HWSPINLOCK_QCOM=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 333 | CONFIG_MAILBOX=y |
334 | CONFIG_ARM_MHU=y | ||||
335 | CONFIG_HI6220_MBOX=y | ||||
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 336 | CONFIG_ARM_SMMU=y |
Andy Gross | f14b369 | 2015-10-08 15:37:08 -0500 | [diff] [blame] | 337 | CONFIG_QCOM_SMEM=y |
338 | CONFIG_QCOM_SMD=y | ||||
339 | CONFIG_QCOM_SMD_RPM=y | ||||
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 340 | CONFIG_ARCH_TEGRA_132_SOC=y |
341 | CONFIG_ARCH_TEGRA_210_SOC=y | ||||
Srinivas Kandagatla | efdda17 | 2016-02-06 07:07:33 +0000 | [diff] [blame] | 342 | CONFIG_EXTCON_USB_GPIO=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 343 | CONFIG_PWM=y |
344 | CONFIG_PWM_TEGRA=m | ||||
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 345 | CONFIG_COMMON_RESET_HI6220=y |
Yoshihiro Shimoda | a9c42f0 | 2016-02-23 21:28:36 +0900 | [diff] [blame] | 346 | CONFIG_PHY_RCAR_GEN3_USB2=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 347 | CONFIG_PHY_HI6220_USB=y |
Will Deacon | 2d39ad6 | 2014-11-05 16:47:31 +0000 | [diff] [blame] | 348 | CONFIG_PHY_XGENE=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 349 | CONFIG_PHY_TEGRA_XUSB=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 350 | CONFIG_ARM_SCPI_PROTOCOL=y |
Mark Brown | 2b13f01 | 2016-04-15 08:53:43 +0100 | [diff] [blame] | 351 | CONFIG_ACPI=y |
Krzysztof Kozlowski | 426f754 | 2016-07-08 22:17:03 +0200 | [diff] [blame] | 352 | CONFIG_IIO=y |
353 | CONFIG_EXYNOS_ADC=y | ||||
Krzysztof Kozlowski | 426f754 | 2016-07-08 22:17:03 +0200 | [diff] [blame] | 354 | CONFIG_PWM_SAMSUNG=y |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 355 | CONFIG_EXT2_FS=y |
356 | CONFIG_EXT3_FS=y | ||||
Catalin Marinas | 89072728 | 2014-06-16 11:11:23 +0100 | [diff] [blame] | 357 | CONFIG_FANOTIFY=y |
358 | CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y | ||||
Will Deacon | f7bf130 | 2014-12-21 11:13:12 +0000 | [diff] [blame] | 359 | CONFIG_QUOTA=y |
360 | CONFIG_AUTOFS4_FS=y | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 361 | CONFIG_FUSE_FS=y |
362 | CONFIG_CUSE=y | ||||
363 | CONFIG_VFAT_FS=y | ||||
364 | CONFIG_TMPFS=y | ||||
Will Deacon | 74d2eb3 | 2014-05-22 15:13:05 +0100 | [diff] [blame] | 365 | CONFIG_HUGETLBFS=y |
Will Deacon | 431597b | 2016-03-29 16:39:12 +0100 | [diff] [blame] | 366 | CONFIG_CONFIGFS_FS=y |
Will Deacon | 475bfd3 | 2015-03-30 11:29:35 +0100 | [diff] [blame] | 367 | CONFIG_EFIVAR_FS=y |
Thierry Reding | e39823e | 2015-11-16 15:44:26 +0100 | [diff] [blame] | 368 | CONFIG_SQUASHFS=y |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 369 | CONFIG_NFS_FS=y |
Will Deacon | 475bfd3 | 2015-03-30 11:29:35 +0100 | [diff] [blame] | 370 | CONFIG_NFS_V4=y |
Thierry Reding | 10a7b37 | 2016-06-08 19:23:19 +0200 | [diff] [blame] | 371 | CONFIG_NFS_V4_1=y |
372 | CONFIG_NFS_V4_2=y | ||||
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 373 | CONFIG_ROOT_NFS=y |
Will Deacon | af9b996 | 2014-07-29 16:20:02 +0100 | [diff] [blame] | 374 | CONFIG_9P_FS=y |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 375 | CONFIG_NLS_CODEPAGE_437=y |
376 | CONFIG_NLS_ISO8859_1=y | ||||
Will Deacon | 74d2eb3 | 2014-05-22 15:13:05 +0100 | [diff] [blame] | 377 | CONFIG_VIRTUALIZATION=y |
378 | CONFIG_KVM=y | ||||
Thierry Reding | 36d6e08 | 2015-11-16 15:45:36 +0100 | [diff] [blame] | 379 | CONFIG_PRINTK_TIME=y |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 380 | CONFIG_DEBUG_INFO=y |
Will Deacon | 74d2eb3 | 2014-05-22 15:13:05 +0100 | [diff] [blame] | 381 | CONFIG_DEBUG_FS=y |
382 | CONFIG_MAGIC_SYSRQ=y | ||||
383 | CONFIG_DEBUG_KERNEL=y | ||||
384 | CONFIG_LOCKUP_DETECTOR=y | ||||
385 | # CONFIG_SCHED_DEBUG is not set | ||||
Will Deacon | f7bf130 | 2014-12-21 11:13:12 +0000 | [diff] [blame] | 386 | # CONFIG_DEBUG_PREEMPT is not set |
Catalin Marinas | 8c2c3df | 2012-04-20 14:45:54 +0100 | [diff] [blame] | 387 | # CONFIG_FTRACE is not set |
Mark Rutland | 822bf48 | 2015-06-15 15:02:44 +0100 | [diff] [blame] | 388 | CONFIG_MEMTEST=y |
Catalin Marinas | 89072728 | 2014-06-16 11:11:23 +0100 | [diff] [blame] | 389 | CONFIG_SECURITY=y |
Will Deacon | 531d306 | 2016-01-25 18:25:59 +0000 | [diff] [blame] | 390 | CONFIG_CRYPTO_ECHAINIV=y |
Will Deacon | 74d2eb3 | 2014-05-22 15:13:05 +0100 | [diff] [blame] | 391 | CONFIG_CRYPTO_ANSI_CPRNG=y |
392 | CONFIG_ARM64_CRYPTO=y | ||||
393 | CONFIG_CRYPTO_SHA1_ARM64_CE=y | ||||
394 | CONFIG_CRYPTO_SHA2_ARM64_CE=y | ||||
395 | CONFIG_CRYPTO_GHASH_ARM64_CE=y | ||||
Will Deacon | 74d2eb3 | 2014-05-22 15:13:05 +0100 | [diff] [blame] | 396 | CONFIG_CRYPTO_AES_ARM64_CE_CCM=y |
397 | CONFIG_CRYPTO_AES_ARM64_CE_BLK=y | ||||
Ard Biesheuvel | 16740e7 | 2016-06-13 16:57:22 +0200 | [diff] [blame] | 398 | # CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set |
Catalin Marinas | 4d17da4 | 2015-11-06 16:50:43 +0000 | [diff] [blame] | 399 | CONFIG_CRYPTO_CRC32_ARM64=y |