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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* linux/drivers/mtd/nand/s3c2410.c
2 *
Ben Dooksa4f957f2005-06-20 12:48:25 +01003 * Copyright (c) 2004,2005 Simtec Electronics
Ben Dooksfdf2fd52005-02-18 14:46:15 +00004 * http://www.simtec.co.uk/products/SWLINUX/
5 * Ben Dooks <ben@simtec.co.uk>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 *
Ben Dooksa4f957f2005-06-20 12:48:25 +01007 * Samsung S3C2410/S3C240 NAND driver
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 *
9 * Changelog:
10 * 21-Sep-2004 BJD Initial version
11 * 23-Sep-2004 BJD Mulitple device support
12 * 28-Sep-2004 BJD Fixed ECC placement for Hardware mode
13 * 12-Oct-2004 BJD Fixed errors in use of platform data
Ben Dooks3e4ef3b2005-03-17 11:31:30 +000014 * 18-Feb-2005 BJD Fix sparse errors
15 * 14-Mar-2005 BJD Applied tglx's code reduction patch
Ben Dooksa4f957f2005-06-20 12:48:25 +010016 * 02-May-2005 BJD Fixed s3c2440 support
17 * 02-May-2005 BJD Reduced hwcontrol decode
18 * 20-Jun-2005 BJD Updated s3c2440 support, fixed timing bug
Ben Dooksfb8d82a2005-07-06 21:05:10 +010019 * 08-Jul-2005 BJD Fix OOPS when no platform data supplied
Ben Dookscfd320f2005-10-20 22:22:58 +010020 * 20-Oct-2005 BJD Fix timing calculation bug
Ben Dooksd1fef3c2006-06-19 09:29:38 +010021 * 14-Jan-2006 BJD Allow clock to be stopped when idle
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 *
Ben Dooksd1fef3c2006-06-19 09:29:38 +010023 * $Id: s3c2410.c,v 1.23 2006/04/01 18:06:29 bjd Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -070024 *
25 * This program is free software; you can redistribute it and/or modify
26 * it under the terms of the GNU General Public License as published by
27 * the Free Software Foundation; either version 2 of the License, or
28 * (at your option) any later version.
29 *
30 * This program is distributed in the hope that it will be useful,
31 * but WITHOUT ANY WARRANTY; without even the implied warranty of
32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
33 * GNU General Public License for more details.
34 *
35 * You should have received a copy of the GNU General Public License
36 * along with this program; if not, write to the Free Software
37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
38*/
39
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#ifdef CONFIG_MTD_NAND_S3C2410_DEBUG
41#define DEBUG
42#endif
43
44#include <linux/module.h>
45#include <linux/types.h>
46#include <linux/init.h>
47#include <linux/kernel.h>
48#include <linux/string.h>
49#include <linux/ioport.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010050#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include <linux/delay.h>
52#include <linux/err.h>
Tim Schmielau4e57b682005-10-30 15:03:48 -080053#include <linux/slab.h>
Russell Kingf8ce2542006-01-07 16:15:52 +000054#include <linux/clk.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070055
56#include <linux/mtd/mtd.h>
57#include <linux/mtd/nand.h>
58#include <linux/mtd/nand_ecc.h>
59#include <linux/mtd/partitions.h>
60
61#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070062
63#include <asm/arch/regs-nand.h>
64#include <asm/arch/nand.h>
65
66#define PFX "s3c2410-nand: "
67
68#ifdef CONFIG_MTD_NAND_S3C2410_HWECC
69static int hardware_ecc = 1;
70#else
71static int hardware_ecc = 0;
72#endif
73
Ben Dooksd1fef3c2006-06-19 09:29:38 +010074#ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP
75static int clock_stop = 1;
76#else
77static const int clock_stop = 0;
78#endif
79
80
Linus Torvalds1da177e2005-04-16 15:20:36 -070081/* new oob placement block for use with hardware ecc generation
82 */
83
Thomas Gleixner5bd34c02006-05-27 22:16:10 +020084static struct nand_ecclayout nand_hw_eccoob = {
David Woodhousee0c7d762006-05-13 18:07:53 +010085 .eccbytes = 3,
86 .eccpos = {0, 1, 2},
87 .oobfree = {{8, 8}}
Linus Torvalds1da177e2005-04-16 15:20:36 -070088};
89
90/* controller and mtd information */
91
92struct s3c2410_nand_info;
93
94struct s3c2410_nand_mtd {
95 struct mtd_info mtd;
96 struct nand_chip chip;
97 struct s3c2410_nand_set *set;
98 struct s3c2410_nand_info *info;
99 int scan_res;
100};
101
102/* overview of the s3c2410 nand state */
103
104struct s3c2410_nand_info {
105 /* mtd info */
106 struct nand_hw_control controller;
107 struct s3c2410_nand_mtd *mtds;
108 struct s3c2410_platform_nand *platform;
109
110 /* device info */
111 struct device *device;
112 struct resource *area;
113 struct clk *clk;
Ben Dooksfdf2fd52005-02-18 14:46:15 +0000114 void __iomem *regs;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115 int mtd_count;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100116
117 unsigned char is_s3c2440;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118};
119
120/* conversion functions */
121
122static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd)
123{
124 return container_of(mtd, struct s3c2410_nand_mtd, mtd);
125}
126
127static struct s3c2410_nand_info *s3c2410_nand_mtd_toinfo(struct mtd_info *mtd)
128{
129 return s3c2410_nand_mtd_toours(mtd)->info;
130}
131
Russell King3ae5eae2005-11-09 22:32:44 +0000132static struct s3c2410_nand_info *to_nand_info(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133{
Russell King3ae5eae2005-11-09 22:32:44 +0000134 return platform_get_drvdata(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135}
136
Russell King3ae5eae2005-11-09 22:32:44 +0000137static struct s3c2410_platform_nand *to_nand_plat(struct platform_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138{
Russell King3ae5eae2005-11-09 22:32:44 +0000139 return dev->dev.platform_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140}
141
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100142static inline int allow_clk_stop(struct s3c2410_nand_info *info)
143{
144 return clock_stop;
145}
146
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147/* timing calculations */
148
Ben Dookscfd320f2005-10-20 22:22:58 +0100149#define NS_IN_KHZ 1000000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150
151static int s3c2410_nand_calc_rate(int wanted, unsigned long clk, int max)
152{
153 int result;
154
Ben Dookscfd320f2005-10-20 22:22:58 +0100155 result = (wanted * clk) / NS_IN_KHZ;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156 result++;
157
158 pr_debug("result %d from %ld, %d\n", result, clk, wanted);
159
160 if (result > max) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100161 printk("%d ns is too big for current clock rate %ld\n", wanted, clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 return -1;
163 }
164
165 if (result < 1)
166 result = 1;
167
168 return result;
169}
170
Ben Dookscfd320f2005-10-20 22:22:58 +0100171#define to_ns(ticks,clk) (((ticks) * NS_IN_KHZ) / (unsigned int)(clk))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172
173/* controller setup */
174
David Woodhousee0c7d762006-05-13 18:07:53 +0100175static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700176{
Russell King3ae5eae2005-11-09 22:32:44 +0000177 struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178 unsigned long clkrate = clk_get_rate(info->clk);
Ben Dookscfd320f2005-10-20 22:22:58 +0100179 int tacls, twrph0, twrph1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180 unsigned long cfg;
181
182 /* calculate the timing information for the controller */
183
Ben Dookscfd320f2005-10-20 22:22:58 +0100184 clkrate /= 1000; /* turn clock into kHz for ease of use */
185
Linus Torvalds1da177e2005-04-16 15:20:36 -0700186 if (plat != NULL) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100187 tacls = s3c2410_nand_calc_rate(plat->tacls, clkrate, 4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188 twrph0 = s3c2410_nand_calc_rate(plat->twrph0, clkrate, 8);
189 twrph1 = s3c2410_nand_calc_rate(plat->twrph1, clkrate, 8);
190 } else {
191 /* default timings */
Ben Dooksa4f957f2005-06-20 12:48:25 +0100192 tacls = 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700193 twrph0 = 8;
194 twrph1 = 8;
195 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000196
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197 if (tacls < 0 || twrph0 < 0 || twrph1 < 0) {
198 printk(KERN_ERR PFX "cannot get timings suitable for board\n");
199 return -EINVAL;
200 }
201
Ben Dookscfd320f2005-10-20 22:22:58 +0100202 printk(KERN_INFO PFX "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n",
David Woodhousee0c7d762006-05-13 18:07:53 +0100203 tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204
Ben Dooksa4f957f2005-06-20 12:48:25 +0100205 if (!info->is_s3c2440) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100206 cfg = S3C2410_NFCONF_EN;
207 cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
208 cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
209 cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100210 } else {
David Woodhousee0c7d762006-05-13 18:07:53 +0100211 cfg = S3C2440_NFCONF_TACLS(tacls - 1);
212 cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1);
213 cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1);
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100214
215 /* enable the controller and de-assert nFCE */
216
217 writel(S3C2440_NFCONT_ENABLE | S3C2440_NFCONT_ENABLE,
218 info->regs + S3C2440_NFCONT);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100219 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700220
221 pr_debug(PFX "NF_CONF is 0x%lx\n", cfg);
222
223 writel(cfg, info->regs + S3C2410_NFCONF);
224 return 0;
225}
226
227/* select chip */
228
229static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
230{
231 struct s3c2410_nand_info *info;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000232 struct s3c2410_nand_mtd *nmtd;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233 struct nand_chip *this = mtd->priv;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100234 void __iomem *reg;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700235 unsigned long cur;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100236 unsigned long bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237
238 nmtd = this->priv;
239 info = nmtd->info;
240
Ben Dooksa4f957f2005-06-20 12:48:25 +0100241 bit = (info->is_s3c2440) ? S3C2440_NFCONT_nFCE : S3C2410_NFCONF_nFCE;
David Woodhousee0c7d762006-05-13 18:07:53 +0100242 reg = info->regs + ((info->is_s3c2440) ? S3C2440_NFCONT : S3C2410_NFCONF);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100243
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100244 if (chip != -1 && allow_clk_stop(info))
245 clk_enable(info->clk);
246
Ben Dooksa4f957f2005-06-20 12:48:25 +0100247 cur = readl(reg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248
249 if (chip == -1) {
Ben Dooksa4f957f2005-06-20 12:48:25 +0100250 cur |= bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700251 } else {
Ben Dooksfb8d82a2005-07-06 21:05:10 +0100252 if (nmtd->set != NULL && chip > nmtd->set->nr_chips) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253 printk(KERN_ERR PFX "chip %d out of range\n", chip);
254 return;
255 }
256
257 if (info->platform != NULL) {
258 if (info->platform->select_chip != NULL)
David Woodhousee0c7d762006-05-13 18:07:53 +0100259 (info->platform->select_chip) (nmtd->set, chip);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700260 }
261
Ben Dooksa4f957f2005-06-20 12:48:25 +0100262 cur &= ~bit;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700263 }
264
Ben Dooksa4f957f2005-06-20 12:48:25 +0100265 writel(cur, reg);
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100266
267 if (chip == -1 && allow_clk_stop(info))
268 clk_disable(info->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700269}
270
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000271/* command and control functions
Ben Dooksa4f957f2005-06-20 12:48:25 +0100272 *
273 * Note, these all use tglx's method of changing the IO_ADDR_W field
274 * to make the code simpler, and use the nand layer's code to issue the
275 * command and address sequences via the proper IO ports.
276 *
277*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200279static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd,
David Woodhousef9068872006-06-10 00:53:16 +0100280 unsigned int ctrl)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281{
282 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
Ben Dooks3e4ef3b2005-03-17 11:31:30 +0000283 struct nand_chip *chip = mtd->priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200285 if (cmd == NAND_CMD_NONE)
286 return;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287
David Woodhousef9068872006-06-10 00:53:16 +0100288 if (ctrl & NAND_CLE)
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200289 writeb(cmd, info->regs + S3C2410_NFCMD);
290 else
291 writeb(cmd, info->regs + S3C2410_NFADDR);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100292}
293
294/* command and control functions */
295
David Woodhousef9068872006-06-10 00:53:16 +0100296static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd,
297 unsigned int ctrl)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100298{
299 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
300 struct nand_chip *chip = mtd->priv;
301
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200302 if (cmd == NAND_CMD_NONE)
303 return;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100304
David Woodhousef9068872006-06-10 00:53:16 +0100305 if (ctrl & NAND_CLE)
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200306 writeb(cmd, info->regs + S3C2440_NFCMD);
307 else
308 writeb(cmd, info->regs + S3C2440_NFADDR);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309}
310
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311/* s3c2410_nand_devready()
312 *
313 * returns 0 if the nand is busy, 1 if it is ready
314*/
315
316static int s3c2410_nand_devready(struct mtd_info *mtd)
317{
318 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000319
Ben Dooksa4f957f2005-06-20 12:48:25 +0100320 if (info->is_s3c2440)
321 return readb(info->regs + S3C2440_NFSTAT) & S3C2440_NFSTAT_READY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700322 return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY;
323}
324
325/* ECC handling functions */
326
David Woodhousee0c7d762006-05-13 18:07:53 +0100327static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700328{
David Woodhousee0c7d762006-05-13 18:07:53 +0100329 pr_debug("s3c2410_nand_correct_data(%p,%p,%p,%p)\n", mtd, dat, read_ecc, calc_ecc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330
331 pr_debug("eccs: read %02x,%02x,%02x vs calc %02x,%02x,%02x\n",
David Woodhousee0c7d762006-05-13 18:07:53 +0100332 read_ecc[0], read_ecc[1], read_ecc[2], calc_ecc[0], calc_ecc[1], calc_ecc[2]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333
David Woodhousee0c7d762006-05-13 18:07:53 +0100334 if (read_ecc[0] == calc_ecc[0] && read_ecc[1] == calc_ecc[1] && read_ecc[2] == calc_ecc[2])
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335 return 0;
336
337 /* we curently have no method for correcting the error */
338
339 return -1;
340}
341
Ben Dooksa4f957f2005-06-20 12:48:25 +0100342/* ECC functions
343 *
344 * These allow the s3c2410 and s3c2440 to use the controller's ECC
345 * generator block to ECC the data as it passes through]
346*/
347
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
349{
350 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
351 unsigned long ctrl;
352
353 ctrl = readl(info->regs + S3C2410_NFCONF);
354 ctrl |= S3C2410_NFCONF_INITECC;
355 writel(ctrl, info->regs + S3C2410_NFCONF);
356}
357
Ben Dooksa4f957f2005-06-20 12:48:25 +0100358static void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode)
359{
360 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
361 unsigned long ctrl;
362
363 ctrl = readl(info->regs + S3C2440_NFCONT);
364 writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT);
365}
366
David Woodhousee0c7d762006-05-13 18:07:53 +0100367static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700368{
369 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
370
371 ecc_code[0] = readb(info->regs + S3C2410_NFECC + 0);
372 ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1);
373 ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2);
374
David Woodhousee0c7d762006-05-13 18:07:53 +0100375 pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376
377 return 0;
378}
379
David Woodhousee0c7d762006-05-13 18:07:53 +0100380static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100381{
382 struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);
383 unsigned long ecc = readl(info->regs + S3C2440_NFMECC0);
384
385 ecc_code[0] = ecc;
386 ecc_code[1] = ecc >> 8;
387 ecc_code[2] = ecc >> 16;
388
David Woodhousee0c7d762006-05-13 18:07:53 +0100389 pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100390
391 return 0;
392}
393
Ben Dooksa4f957f2005-06-20 12:48:25 +0100394/* over-ride the standard functions for a little more speed. We can
395 * use read/write block to move the data buffers to/from the controller
396*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397
398static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
399{
400 struct nand_chip *this = mtd->priv;
401 readsb(this->IO_ADDR_R, buf, len);
402}
403
David Woodhousee0c7d762006-05-13 18:07:53 +0100404static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700405{
406 struct nand_chip *this = mtd->priv;
407 writesb(this->IO_ADDR_W, buf, len);
408}
409
410/* device management functions */
411
Russell King3ae5eae2005-11-09 22:32:44 +0000412static int s3c2410_nand_remove(struct platform_device *pdev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413{
Russell King3ae5eae2005-11-09 22:32:44 +0000414 struct s3c2410_nand_info *info = to_nand_info(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415
Russell King3ae5eae2005-11-09 22:32:44 +0000416 platform_set_drvdata(pdev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700417
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000418 if (info == NULL)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419 return 0;
420
421 /* first thing we need to do is release all our mtds
422 * and their partitions, then go through freeing the
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000423 * resources used
Linus Torvalds1da177e2005-04-16 15:20:36 -0700424 */
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000425
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426 if (info->mtds != NULL) {
427 struct s3c2410_nand_mtd *ptr = info->mtds;
428 int mtdno;
429
430 for (mtdno = 0; mtdno < info->mtd_count; mtdno++, ptr++) {
431 pr_debug("releasing mtd %d (%p)\n", mtdno, ptr);
432 nand_release(&ptr->mtd);
433 }
434
435 kfree(info->mtds);
436 }
437
438 /* free the common resources */
439
440 if (info->clk != NULL && !IS_ERR(info->clk)) {
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100441 if (!allow_clk_stop(info))
442 clk_disable(info->clk);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443 clk_put(info->clk);
444 }
445
446 if (info->regs != NULL) {
447 iounmap(info->regs);
448 info->regs = NULL;
449 }
450
451 if (info->area != NULL) {
452 release_resource(info->area);
453 kfree(info->area);
454 info->area = NULL;
455 }
456
457 kfree(info);
458
459 return 0;
460}
461
462#ifdef CONFIG_MTD_PARTITIONS
463static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
464 struct s3c2410_nand_mtd *mtd,
465 struct s3c2410_nand_set *set)
466{
467 if (set == NULL)
468 return add_mtd_device(&mtd->mtd);
469
470 if (set->nr_partitions > 0 && set->partitions != NULL) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100471 return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700472 }
473
474 return add_mtd_device(&mtd->mtd);
475}
476#else
477static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info,
478 struct s3c2410_nand_mtd *mtd,
479 struct s3c2410_nand_set *set)
480{
481 return add_mtd_device(&mtd->mtd);
482}
483#endif
484
485/* s3c2410_nand_init_chip
486 *
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000487 * init a single instance of an chip
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488*/
489
490static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
491 struct s3c2410_nand_mtd *nmtd,
492 struct s3c2410_nand_set *set)
493{
494 struct nand_chip *chip = &nmtd->chip;
495
Ben Dooksfdf2fd52005-02-18 14:46:15 +0000496 chip->IO_ADDR_R = info->regs + S3C2410_NFDATA;
497 chip->IO_ADDR_W = info->regs + S3C2410_NFDATA;
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200498 chip->cmd_ctrl = s3c2410_nand_hwcontrol;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499 chip->dev_ready = s3c2410_nand_devready;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700500 chip->write_buf = s3c2410_nand_write_buf;
501 chip->read_buf = s3c2410_nand_read_buf;
502 chip->select_chip = s3c2410_nand_select_chip;
503 chip->chip_delay = 50;
504 chip->priv = nmtd;
505 chip->options = 0;
506 chip->controller = &info->controller;
507
Ben Dooksa4f957f2005-06-20 12:48:25 +0100508 if (info->is_s3c2440) {
509 chip->IO_ADDR_R = info->regs + S3C2440_NFDATA;
510 chip->IO_ADDR_W = info->regs + S3C2440_NFDATA;
Thomas Gleixner7abd3ef2006-05-23 23:25:53 +0200511 chip->cmd_ctrl = s3c2440_nand_hwcontrol;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100512 }
513
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514 nmtd->info = info;
515 nmtd->mtd.priv = chip;
David Woodhouse552d9202006-05-14 01:20:46 +0100516 nmtd->mtd.owner = THIS_MODULE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517 nmtd->set = set;
518
519 if (hardware_ecc) {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200520 chip->ecc.correct = s3c2410_nand_correct_data;
521 chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
522 chip->ecc.calculate = s3c2410_nand_calculate_ecc;
523 chip->ecc.mode = NAND_ECC_HW;
524 chip->ecc.size = 512;
525 chip->ecc.bytes = 3;
Thomas Gleixner5bd34c02006-05-27 22:16:10 +0200526 chip->ecc.layout = &nand_hw_eccoob;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100527
528 if (info->is_s3c2440) {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200529 chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
530 chip->ecc.calculate = s3c2440_nand_calculate_ecc;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100531 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532 } else {
Thomas Gleixner6dfc6d22006-05-23 12:00:46 +0200533 chip->ecc.mode = NAND_ECC_SOFT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700534 }
535}
536
537/* s3c2410_nand_probe
538 *
539 * called by device layer when it finds a device matching
540 * one our driver can handled. This code checks to see if
541 * it can allocate all necessary resources then calls the
542 * nand layer to look for devices
543*/
544
Russell King3ae5eae2005-11-09 22:32:44 +0000545static int s3c24xx_nand_probe(struct platform_device *pdev, int is_s3c2440)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700546{
Russell King3ae5eae2005-11-09 22:32:44 +0000547 struct s3c2410_platform_nand *plat = to_nand_plat(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700548 struct s3c2410_nand_info *info;
549 struct s3c2410_nand_mtd *nmtd;
550 struct s3c2410_nand_set *sets;
551 struct resource *res;
552 int err = 0;
553 int size;
554 int nr_sets;
555 int setno;
556
Russell King3ae5eae2005-11-09 22:32:44 +0000557 pr_debug("s3c2410_nand_probe(%p)\n", pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700558
559 info = kmalloc(sizeof(*info), GFP_KERNEL);
560 if (info == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000561 dev_err(&pdev->dev, "no memory for flash info\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562 err = -ENOMEM;
563 goto exit_error;
564 }
565
566 memzero(info, sizeof(*info));
Russell King3ae5eae2005-11-09 22:32:44 +0000567 platform_set_drvdata(pdev, info);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700568
569 spin_lock_init(&info->controller.lock);
Ben Dooksa4f957f2005-06-20 12:48:25 +0100570 init_waitqueue_head(&info->controller.wq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571
572 /* get the clock source and enable it */
573
Russell King3ae5eae2005-11-09 22:32:44 +0000574 info->clk = clk_get(&pdev->dev, "nand");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700575 if (IS_ERR(info->clk)) {
Russell King3ae5eae2005-11-09 22:32:44 +0000576 dev_err(&pdev->dev, "failed to get clock");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577 err = -ENOENT;
578 goto exit_error;
579 }
580
Linus Torvalds1da177e2005-04-16 15:20:36 -0700581 clk_enable(info->clk);
582
583 /* allocate and map the resource */
584
Ben Dooksa4f957f2005-06-20 12:48:25 +0100585 /* currently we assume we have the one resource */
586 res = pdev->resource;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587 size = res->end - res->start + 1;
588
589 info->area = request_mem_region(res->start, size, pdev->name);
590
591 if (info->area == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000592 dev_err(&pdev->dev, "cannot reserve register region\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593 err = -ENOENT;
594 goto exit_error;
595 }
596
Russell King3ae5eae2005-11-09 22:32:44 +0000597 info->device = &pdev->dev;
Ben Dooksa4f957f2005-06-20 12:48:25 +0100598 info->platform = plat;
599 info->regs = ioremap(res->start, size);
600 info->is_s3c2440 = is_s3c2440;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700601
602 if (info->regs == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000603 dev_err(&pdev->dev, "cannot reserve register region\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700604 err = -EIO;
605 goto exit_error;
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000606 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607
Russell King3ae5eae2005-11-09 22:32:44 +0000608 dev_dbg(&pdev->dev, "mapped registers at %p\n", info->regs);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700609
610 /* initialise the hardware */
611
Russell King3ae5eae2005-11-09 22:32:44 +0000612 err = s3c2410_nand_inithw(info, pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700613 if (err != 0)
614 goto exit_error;
615
616 sets = (plat != NULL) ? plat->sets : NULL;
617 nr_sets = (plat != NULL) ? plat->nr_sets : 1;
618
619 info->mtd_count = nr_sets;
620
621 /* allocate our information */
622
623 size = nr_sets * sizeof(*info->mtds);
624 info->mtds = kmalloc(size, GFP_KERNEL);
625 if (info->mtds == NULL) {
Russell King3ae5eae2005-11-09 22:32:44 +0000626 dev_err(&pdev->dev, "failed to allocate mtd storage\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700627 err = -ENOMEM;
628 goto exit_error;
629 }
630
631 memzero(info->mtds, size);
632
633 /* initialise all possible chips */
634
635 nmtd = info->mtds;
636
637 for (setno = 0; setno < nr_sets; setno++, nmtd++) {
David Woodhousee0c7d762006-05-13 18:07:53 +0100638 pr_debug("initialising set %d (%p, info %p)\n", setno, nmtd, info);
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000639
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 s3c2410_nand_init_chip(info, nmtd, sets);
641
David Woodhousee0c7d762006-05-13 18:07:53 +0100642 nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700643
644 if (nmtd->scan_res == 0) {
645 s3c2410_nand_add_partition(info, nmtd, sets);
646 }
647
648 if (sets != NULL)
649 sets++;
650 }
Thomas Gleixner61b03bd2005-11-07 11:15:49 +0000651
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100652 if (allow_clk_stop(info)) {
653 dev_info(&pdev->dev, "clock idle support enabled\n");
654 clk_disable(info->clk);
655 }
656
Linus Torvalds1da177e2005-04-16 15:20:36 -0700657 pr_debug("initialised ok\n");
658 return 0;
659
660 exit_error:
Russell King3ae5eae2005-11-09 22:32:44 +0000661 s3c2410_nand_remove(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662
663 if (err == 0)
664 err = -EINVAL;
665 return err;
666}
667
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100668/* PM Support */
669#ifdef CONFIG_PM
670
671static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm)
672{
673 struct s3c2410_nand_info *info = platform_get_drvdata(dev);
674
675 if (info) {
676 if (!allow_clk_stop(info))
677 clk_disable(info->clk);
678 }
679
680 return 0;
681}
682
683static int s3c24xx_nand_resume(struct platform_device *dev)
684{
685 struct s3c2410_nand_info *info = platform_get_drvdata(dev);
686
687 if (info) {
688 clk_enable(info->clk);
689 s3c2410_nand_inithw(info, dev);
690
691 if (allow_clk_stop(info))
692 clk_disable(info->clk);
693 }
694
695 return 0;
696}
697
698#else
699#define s3c24xx_nand_suspend NULL
700#define s3c24xx_nand_resume NULL
701#endif
702
Ben Dooksa4f957f2005-06-20 12:48:25 +0100703/* driver device registration */
704
Russell King3ae5eae2005-11-09 22:32:44 +0000705static int s3c2410_nand_probe(struct platform_device *dev)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100706{
707 return s3c24xx_nand_probe(dev, 0);
708}
709
Russell King3ae5eae2005-11-09 22:32:44 +0000710static int s3c2440_nand_probe(struct platform_device *dev)
Ben Dooksa4f957f2005-06-20 12:48:25 +0100711{
712 return s3c24xx_nand_probe(dev, 1);
713}
714
Russell King3ae5eae2005-11-09 22:32:44 +0000715static struct platform_driver s3c2410_nand_driver = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700716 .probe = s3c2410_nand_probe,
717 .remove = s3c2410_nand_remove,
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100718 .suspend = s3c24xx_nand_suspend,
719 .resume = s3c24xx_nand_resume,
Russell King3ae5eae2005-11-09 22:32:44 +0000720 .driver = {
721 .name = "s3c2410-nand",
722 .owner = THIS_MODULE,
723 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700724};
725
Russell King3ae5eae2005-11-09 22:32:44 +0000726static struct platform_driver s3c2440_nand_driver = {
Ben Dooksa4f957f2005-06-20 12:48:25 +0100727 .probe = s3c2440_nand_probe,
728 .remove = s3c2410_nand_remove,
Ben Dooksd1fef3c2006-06-19 09:29:38 +0100729 .suspend = s3c24xx_nand_suspend,
730 .resume = s3c24xx_nand_resume,
Russell King3ae5eae2005-11-09 22:32:44 +0000731 .driver = {
732 .name = "s3c2440-nand",
733 .owner = THIS_MODULE,
734 },
Ben Dooksa4f957f2005-06-20 12:48:25 +0100735};
736
Linus Torvalds1da177e2005-04-16 15:20:36 -0700737static int __init s3c2410_nand_init(void)
738{
Ben Dooksa4f957f2005-06-20 12:48:25 +0100739 printk("S3C24XX NAND Driver, (c) 2004 Simtec Electronics\n");
740
Russell King3ae5eae2005-11-09 22:32:44 +0000741 platform_driver_register(&s3c2440_nand_driver);
742 return platform_driver_register(&s3c2410_nand_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700743}
744
745static void __exit s3c2410_nand_exit(void)
746{
Russell King3ae5eae2005-11-09 22:32:44 +0000747 platform_driver_unregister(&s3c2440_nand_driver);
748 platform_driver_unregister(&s3c2410_nand_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700749}
750
751module_init(s3c2410_nand_init);
752module_exit(s3c2410_nand_exit);
753
754MODULE_LICENSE("GPL");
755MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
Ben Dooksa4f957f2005-06-20 12:48:25 +0100756MODULE_DESCRIPTION("S3C24XX MTD NAND driver");