blob: 4d140bbbe1006c172cecd2fd5313778e8eb5db17 [file] [log] [blame]
Len Brown26717172010-03-08 14:07:30 -05001/*
2 * intel_idle.c - native hardware idle loop for modern Intel processors
3 *
Len Brownfab04b22013-11-09 00:30:17 -05004 * Copyright (c) 2013, Intel Corporation.
Len Brown26717172010-03-08 14:07:30 -05005 * Len Brown <len.brown@intel.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21/*
22 * intel_idle is a cpuidle driver that loads on specific Intel processors
23 * in lieu of the legacy ACPI processor_idle driver. The intent is to
24 * make Linux more efficient on these processors, as intel_idle knows
25 * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
26 */
27
28/*
29 * Design Assumptions
30 *
31 * All CPUs have same idle states as boot CPU
32 *
33 * Chipset BM_STS (bus master status) bit is a NOP
34 * for preventing entry into deep C-stats
35 */
36
37/*
38 * Known limitations
39 *
40 * The driver currently initializes for_each_online_cpu() upon modprobe.
41 * It it unaware of subsequent processors hot-added to the system.
42 * This means that if you boot with maxcpus=n and later online
43 * processors above n, those processors will use C1 only.
44 *
45 * ACPI has a .suspend hack to turn off deep c-statees during suspend
46 * to avoid complications with the lapic timer workaround.
47 * Have not seen issues with suspend, but may need same workaround here.
48 *
49 * There is currently no kernel-based automatic probing/loading mechanism
50 * if the driver is built as a module.
51 */
52
53/* un-comment DEBUG to enable pr_debug() statements */
54#define DEBUG
55
56#include <linux/kernel.h>
57#include <linux/cpuidle.h>
58#include <linux/clockchips.h>
Len Brown26717172010-03-08 14:07:30 -050059#include <trace/events/power.h>
60#include <linux/sched.h>
Shaohua Li2a2d31c2011-01-10 09:38:12 +080061#include <linux/notifier.h>
62#include <linux/cpu.h>
Paul Gortmaker7c52d552011-05-27 12:33:10 -040063#include <linux/module.h>
Andi Kleenb66b8b92012-01-26 00:09:07 +010064#include <asm/cpu_device_id.h>
H. Peter Anvinbc83ccc2010-09-17 15:36:40 -070065#include <asm/mwait.h>
Len Brown14796fc2011-01-18 20:48:27 -050066#include <asm/msr.h>
Len Brown26717172010-03-08 14:07:30 -050067
68#define INTEL_IDLE_VERSION "0.4"
69#define PREFIX "intel_idle: "
70
Len Brown26717172010-03-08 14:07:30 -050071static struct cpuidle_driver intel_idle_driver = {
72 .name = "intel_idle",
73 .owner = THIS_MODULE,
74};
75/* intel_idle.max_cstate=0 disables driver */
Len Brown137ecc72013-02-01 21:35:35 -050076static int max_cstate = CPUIDLE_STATE_MAX - 1;
Len Brown26717172010-03-08 14:07:30 -050077
Len Brownc4236282010-05-28 02:22:03 -040078static unsigned int mwait_substates;
Len Brown26717172010-03-08 14:07:30 -050079
Shaohua Li2a2d31c2011-01-10 09:38:12 +080080#define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF
Len Brown26717172010-03-08 14:07:30 -050081/* Reliable LAPIC Timer States, bit 1 for C1 etc. */
Len Brownd13780d2010-07-07 00:12:03 -040082static unsigned int lapic_timer_reliable_states = (1 << 1); /* Default to only C1 */
Len Brown26717172010-03-08 14:07:30 -050083
Andi Kleenb66b8b92012-01-26 00:09:07 +010084struct idle_cpu {
85 struct cpuidle_state *state_table;
86
87 /*
88 * Hardware C-state auto-demotion may not always be optimal.
89 * Indicate which enable bits to clear here.
90 */
91 unsigned long auto_demotion_disable_flags;
Len Brown32e95182013-02-02 01:31:56 -050092 bool disable_promotion_to_c1e;
Andi Kleenb66b8b92012-01-26 00:09:07 +010093};
94
95static const struct idle_cpu *icpu;
Namhyung Kim3265eba2010-08-08 03:10:03 +090096static struct cpuidle_device __percpu *intel_idle_cpuidle_devices;
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +053097static int intel_idle(struct cpuidle_device *dev,
98 struct cpuidle_driver *drv, int index);
Daniel Lezcano25ac7762012-07-05 15:23:25 +020099static int intel_idle_cpu_init(int cpu);
Len Brown26717172010-03-08 14:07:30 -0500100
101static struct cpuidle_state *cpuidle_state_table;
102
103/*
Len Brown956d0332011-01-12 02:51:20 -0500104 * Set this flag for states where the HW flushes the TLB for us
105 * and so we don't need cross-calls to keep it consistent.
106 * If this flag is set, SW flushes the TLB, so even if the
107 * HW doesn't do the flushing, this flag is safe to use.
108 */
109#define CPUIDLE_FLAG_TLB_FLUSHED 0x10000
110
111/*
Len Brownb1beab42013-01-31 19:55:37 -0500112 * MWAIT takes an 8-bit "hint" in EAX "suggesting"
113 * the C-state (top nibble) and sub-state (bottom nibble)
114 * 0x00 means "MWAIT(C1)", 0x10 means "MWAIT(C2)" etc.
115 *
116 * We store the hint at the top of our "flags" for each state.
117 */
118#define flg2MWAIT(flags) (((flags) >> 24) & 0xFF)
119#define MWAIT2flg(eax) ((eax & 0xFF) << 24)
120
121/*
Len Brown26717172010-03-08 14:07:30 -0500122 * States are indexed by the cstate number,
123 * which is also the index into the MWAIT hint array.
124 * Thus C0 is a dummy.
125 */
Jiang Liuba0dc812014-01-09 15:30:26 +0800126static struct cpuidle_state nehalem_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500127 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100128 .name = "C1-NHM",
Len Brown26717172010-03-08 14:07:30 -0500129 .desc = "MWAIT 0x00",
Len Brownb1beab42013-01-31 19:55:37 -0500130 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
Len Brown26717172010-03-08 14:07:30 -0500131 .exit_latency = 3,
Len Brown26717172010-03-08 14:07:30 -0500132 .target_residency = 6,
133 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500134 {
Len Brown32e95182013-02-02 01:31:56 -0500135 .name = "C1E-NHM",
136 .desc = "MWAIT 0x01",
137 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
138 .exit_latency = 10,
139 .target_residency = 20,
140 .enter = &intel_idle },
141 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100142 .name = "C3-NHM",
Len Brown26717172010-03-08 14:07:30 -0500143 .desc = "MWAIT 0x10",
Len Brownb1beab42013-01-31 19:55:37 -0500144 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500145 .exit_latency = 20,
Len Brown26717172010-03-08 14:07:30 -0500146 .target_residency = 80,
147 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500148 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100149 .name = "C6-NHM",
Len Brown26717172010-03-08 14:07:30 -0500150 .desc = "MWAIT 0x20",
Len Brownb1beab42013-01-31 19:55:37 -0500151 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500152 .exit_latency = 200,
Len Brown26717172010-03-08 14:07:30 -0500153 .target_residency = 800,
154 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500155 {
156 .enter = NULL }
Len Brown26717172010-03-08 14:07:30 -0500157};
158
Jiang Liuba0dc812014-01-09 15:30:26 +0800159static struct cpuidle_state snb_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500160 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100161 .name = "C1-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400162 .desc = "MWAIT 0x00",
Len Brownb1beab42013-01-31 19:55:37 -0500163 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
Len Brown32e95182013-02-02 01:31:56 -0500164 .exit_latency = 2,
165 .target_residency = 2,
166 .enter = &intel_idle },
167 {
168 .name = "C1E-SNB",
169 .desc = "MWAIT 0x01",
170 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
171 .exit_latency = 10,
172 .target_residency = 20,
Len Brownd13780d2010-07-07 00:12:03 -0400173 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500174 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100175 .name = "C3-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400176 .desc = "MWAIT 0x10",
Len Brownb1beab42013-01-31 19:55:37 -0500177 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400178 .exit_latency = 80,
Len Brownddbd5502010-12-13 18:28:22 -0500179 .target_residency = 211,
Len Brownd13780d2010-07-07 00:12:03 -0400180 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500181 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100182 .name = "C6-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400183 .desc = "MWAIT 0x20",
Len Brownb1beab42013-01-31 19:55:37 -0500184 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400185 .exit_latency = 104,
Len Brownddbd5502010-12-13 18:28:22 -0500186 .target_residency = 345,
Len Brownd13780d2010-07-07 00:12:03 -0400187 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500188 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100189 .name = "C7-SNB",
Len Brownd13780d2010-07-07 00:12:03 -0400190 .desc = "MWAIT 0x30",
Len Brownb1beab42013-01-31 19:55:37 -0500191 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownd13780d2010-07-07 00:12:03 -0400192 .exit_latency = 109,
Len Brownddbd5502010-12-13 18:28:22 -0500193 .target_residency = 345,
Len Brownd13780d2010-07-07 00:12:03 -0400194 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500195 {
196 .enter = NULL }
Len Brownd13780d2010-07-07 00:12:03 -0400197};
198
Len Brown718987d2014-02-14 02:30:00 -0500199static struct cpuidle_state byt_cstates[] = {
200 {
201 .name = "C1-BYT",
202 .desc = "MWAIT 0x00",
203 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
204 .exit_latency = 1,
205 .target_residency = 1,
206 .enter = &intel_idle },
207 {
208 .name = "C1E-BYT",
209 .desc = "MWAIT 0x01",
210 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
211 .exit_latency = 15,
212 .target_residency = 30,
213 .enter = &intel_idle },
214 {
215 .name = "C6N-BYT",
216 .desc = "MWAIT 0x58",
217 .flags = MWAIT2flg(0x58) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
218 .exit_latency = 40,
219 .target_residency = 275,
220 .enter = &intel_idle },
221 {
222 .name = "C6S-BYT",
223 .desc = "MWAIT 0x52",
224 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
225 .exit_latency = 140,
226 .target_residency = 560,
227 .enter = &intel_idle },
228 {
229 .name = "C7-BYT",
230 .desc = "MWAIT 0x60",
231 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
232 .exit_latency = 1200,
233 .target_residency = 1500,
234 .enter = &intel_idle },
235 {
236 .name = "C7S-BYT",
237 .desc = "MWAIT 0x64",
238 .flags = MWAIT2flg(0x64) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
239 .exit_latency = 10000,
240 .target_residency = 20000,
241 .enter = &intel_idle },
242 {
243 .enter = NULL }
244};
245
Jiang Liuba0dc812014-01-09 15:30:26 +0800246static struct cpuidle_state ivb_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500247 {
Len Brown6edab082012-06-01 19:45:32 -0400248 .name = "C1-IVB",
249 .desc = "MWAIT 0x00",
Len Brownb1beab42013-01-31 19:55:37 -0500250 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
Len Brown6edab082012-06-01 19:45:32 -0400251 .exit_latency = 1,
252 .target_residency = 1,
253 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500254 {
Len Brown32e95182013-02-02 01:31:56 -0500255 .name = "C1E-IVB",
256 .desc = "MWAIT 0x01",
257 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
258 .exit_latency = 10,
259 .target_residency = 20,
260 .enter = &intel_idle },
261 {
Len Brown6edab082012-06-01 19:45:32 -0400262 .name = "C3-IVB",
263 .desc = "MWAIT 0x10",
Len Brownb1beab42013-01-31 19:55:37 -0500264 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400265 .exit_latency = 59,
266 .target_residency = 156,
267 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500268 {
Len Brown6edab082012-06-01 19:45:32 -0400269 .name = "C6-IVB",
270 .desc = "MWAIT 0x20",
Len Brownb1beab42013-01-31 19:55:37 -0500271 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400272 .exit_latency = 80,
273 .target_residency = 300,
274 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500275 {
Len Brown6edab082012-06-01 19:45:32 -0400276 .name = "C7-IVB",
277 .desc = "MWAIT 0x30",
Len Brownb1beab42013-01-31 19:55:37 -0500278 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown6edab082012-06-01 19:45:32 -0400279 .exit_latency = 87,
280 .target_residency = 300,
281 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500282 {
283 .enter = NULL }
Len Brown6edab082012-06-01 19:45:32 -0400284};
285
Len Brown0138d8f2014-04-04 01:21:07 -0400286static struct cpuidle_state ivt_cstates[] = {
287 {
288 .name = "C1-IVT",
289 .desc = "MWAIT 0x00",
290 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
291 .exit_latency = 1,
292 .target_residency = 1,
293 .enter = &intel_idle },
294 {
295 .name = "C1E-IVT",
296 .desc = "MWAIT 0x01",
297 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
298 .exit_latency = 10,
299 .target_residency = 80,
300 .enter = &intel_idle },
301 {
302 .name = "C3-IVT",
303 .desc = "MWAIT 0x10",
304 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
305 .exit_latency = 59,
306 .target_residency = 156,
307 .enter = &intel_idle },
308 {
309 .name = "C6-IVT",
310 .desc = "MWAIT 0x20",
311 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
312 .exit_latency = 82,
313 .target_residency = 300,
314 .enter = &intel_idle },
315 {
316 .enter = NULL }
317};
318
319static struct cpuidle_state ivt_cstates_4s[] = {
320 {
321 .name = "C1-IVT-4S",
322 .desc = "MWAIT 0x00",
323 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
324 .exit_latency = 1,
325 .target_residency = 1,
326 .enter = &intel_idle },
327 {
328 .name = "C1E-IVT-4S",
329 .desc = "MWAIT 0x01",
330 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
331 .exit_latency = 10,
332 .target_residency = 250,
333 .enter = &intel_idle },
334 {
335 .name = "C3-IVT-4S",
336 .desc = "MWAIT 0x10",
337 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
338 .exit_latency = 59,
339 .target_residency = 300,
340 .enter = &intel_idle },
341 {
342 .name = "C6-IVT-4S",
343 .desc = "MWAIT 0x20",
344 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
345 .exit_latency = 84,
346 .target_residency = 400,
347 .enter = &intel_idle },
348 {
349 .enter = NULL }
350};
351
352static struct cpuidle_state ivt_cstates_8s[] = {
353 {
354 .name = "C1-IVT-8S",
355 .desc = "MWAIT 0x00",
356 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
357 .exit_latency = 1,
358 .target_residency = 1,
359 .enter = &intel_idle },
360 {
361 .name = "C1E-IVT-8S",
362 .desc = "MWAIT 0x01",
363 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
364 .exit_latency = 10,
365 .target_residency = 500,
366 .enter = &intel_idle },
367 {
368 .name = "C3-IVT-8S",
369 .desc = "MWAIT 0x10",
370 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
371 .exit_latency = 59,
372 .target_residency = 600,
373 .enter = &intel_idle },
374 {
375 .name = "C6-IVT-8S",
376 .desc = "MWAIT 0x20",
377 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
378 .exit_latency = 88,
379 .target_residency = 700,
380 .enter = &intel_idle },
381 {
382 .enter = NULL }
383};
384
Jiang Liuba0dc812014-01-09 15:30:26 +0800385static struct cpuidle_state hsw_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500386 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500387 .name = "C1-HSW",
388 .desc = "MWAIT 0x00",
389 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
390 .exit_latency = 2,
391 .target_residency = 2,
392 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500393 {
Len Brown32e95182013-02-02 01:31:56 -0500394 .name = "C1E-HSW",
395 .desc = "MWAIT 0x01",
396 .flags = MWAIT2flg(0x01) | CPUIDLE_FLAG_TIME_VALID,
397 .exit_latency = 10,
398 .target_residency = 20,
399 .enter = &intel_idle },
400 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500401 .name = "C3-HSW",
402 .desc = "MWAIT 0x10",
403 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
404 .exit_latency = 33,
405 .target_residency = 100,
406 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500407 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500408 .name = "C6-HSW",
409 .desc = "MWAIT 0x20",
410 .flags = MWAIT2flg(0x20) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
411 .exit_latency = 133,
412 .target_residency = 400,
413 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500414 {
Len Brown85a4d2d2013-01-31 14:40:49 -0500415 .name = "C7s-HSW",
416 .desc = "MWAIT 0x32",
417 .flags = MWAIT2flg(0x32) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
418 .exit_latency = 166,
419 .target_residency = 500,
420 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500421 {
Len Brown86239ce2013-02-27 13:18:50 -0500422 .name = "C8-HSW",
423 .desc = "MWAIT 0x40",
424 .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
425 .exit_latency = 300,
426 .target_residency = 900,
427 .enter = &intel_idle },
428 {
429 .name = "C9-HSW",
430 .desc = "MWAIT 0x50",
431 .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
432 .exit_latency = 600,
433 .target_residency = 1800,
434 .enter = &intel_idle },
435 {
436 .name = "C10-HSW",
437 .desc = "MWAIT 0x60",
438 .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
439 .exit_latency = 2600,
440 .target_residency = 7700,
441 .enter = &intel_idle },
442 {
Len Browne022e7e2013-02-01 23:37:30 -0500443 .enter = NULL }
Len Brown85a4d2d2013-01-31 14:40:49 -0500444};
445
Jiang Liuba0dc812014-01-09 15:30:26 +0800446static struct cpuidle_state atom_cstates[] = {
Len Browne022e7e2013-02-01 23:37:30 -0500447 {
Len Brown32e95182013-02-02 01:31:56 -0500448 .name = "C1E-ATM",
Len Brown26717172010-03-08 14:07:30 -0500449 .desc = "MWAIT 0x00",
Len Brownb1beab42013-01-31 19:55:37 -0500450 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
Len Brown32e95182013-02-02 01:31:56 -0500451 .exit_latency = 10,
452 .target_residency = 20,
Len Brown26717172010-03-08 14:07:30 -0500453 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500454 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100455 .name = "C2-ATM",
Len Brown26717172010-03-08 14:07:30 -0500456 .desc = "MWAIT 0x10",
Len Brownb1beab42013-01-31 19:55:37 -0500457 .flags = MWAIT2flg(0x10) | CPUIDLE_FLAG_TIME_VALID,
Len Brown26717172010-03-08 14:07:30 -0500458 .exit_latency = 20,
Len Brown26717172010-03-08 14:07:30 -0500459 .target_residency = 80,
460 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500461 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100462 .name = "C4-ATM",
Len Brown26717172010-03-08 14:07:30 -0500463 .desc = "MWAIT 0x30",
Len Brownb1beab42013-01-31 19:55:37 -0500464 .flags = MWAIT2flg(0x30) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown26717172010-03-08 14:07:30 -0500465 .exit_latency = 100,
Len Brown26717172010-03-08 14:07:30 -0500466 .target_residency = 400,
467 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500468 {
Thomas Renninger15e123e2011-02-27 22:36:43 +0100469 .name = "C6-ATM",
Len Brown7fcca7d2010-10-05 13:43:14 -0400470 .desc = "MWAIT 0x52",
Len Brownb1beab42013-01-31 19:55:37 -0500471 .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brown7fcca7d2010-10-05 13:43:14 -0400472 .exit_latency = 140,
Len Brown7fcca7d2010-10-05 13:43:14 -0400473 .target_residency = 560,
474 .enter = &intel_idle },
Len Browne022e7e2013-02-01 23:37:30 -0500475 {
476 .enter = NULL }
Len Brown26717172010-03-08 14:07:30 -0500477};
Jiang Liu88390992014-01-09 15:30:27 +0800478static struct cpuidle_state avn_cstates[] = {
Len Brownfab04b22013-11-09 00:30:17 -0500479 {
480 .name = "C1-AVN",
481 .desc = "MWAIT 0x00",
482 .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
483 .exit_latency = 2,
484 .target_residency = 2,
485 .enter = &intel_idle },
486 {
487 .name = "C6-AVN",
488 .desc = "MWAIT 0x51",
Bockholdt Arne22e580d2013-11-26 07:13:57 +0000489 .flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
Len Brownfab04b22013-11-09 00:30:17 -0500490 .exit_latency = 15,
491 .target_residency = 45,
492 .enter = &intel_idle },
Jiang Liu88390992014-01-09 15:30:27 +0800493 {
494 .enter = NULL }
Len Brownfab04b22013-11-09 00:30:17 -0500495};
Len Brown26717172010-03-08 14:07:30 -0500496
Len Brown26717172010-03-08 14:07:30 -0500497/**
498 * intel_idle
499 * @dev: cpuidle_device
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530500 * @drv: cpuidle driver
Deepthi Dharware978aa72011-10-28 16:20:09 +0530501 * @index: index of cpuidle state
Len Brown26717172010-03-08 14:07:30 -0500502 *
Yanmin Zhang63ff07b2012-01-10 15:48:21 -0800503 * Must be called under local_irq_disable().
Len Brown26717172010-03-08 14:07:30 -0500504 */
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530505static int intel_idle(struct cpuidle_device *dev,
506 struct cpuidle_driver *drv, int index)
Len Brown26717172010-03-08 14:07:30 -0500507{
508 unsigned long ecx = 1; /* break on interrupt flag */
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530509 struct cpuidle_state *state = &drv->states[index];
Len Brownb1beab42013-01-31 19:55:37 -0500510 unsigned long eax = flg2MWAIT(state->flags);
Len Brown26717172010-03-08 14:07:30 -0500511 unsigned int cstate;
Len Brown26717172010-03-08 14:07:30 -0500512 int cpu = smp_processor_id();
513
514 cstate = (((eax) >> MWAIT_SUBSTATE_SIZE) & MWAIT_CSTATE_MASK) + 1;
515
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400516 /*
Len Brownc8381cc2010-10-15 20:43:06 -0400517 * leave_mm() to avoid costly and often unnecessary wakeups
518 * for flushing the user TLB's associated with the active mm.
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400519 */
Len Brownc8381cc2010-10-15 20:43:06 -0400520 if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
Suresh Siddha6110a1f2010-09-30 21:19:07 -0400521 leave_mm(cpu);
522
Len Brown26717172010-03-08 14:07:30 -0500523 if (!(lapic_timer_reliable_states & (1 << (cstate))))
524 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu);
525
Peter Zijlstra16824252013-12-12 15:08:36 +0100526 mwait_idle_with_hints(eax, ecx);
Len Brown26717172010-03-08 14:07:30 -0500527
Len Brown26717172010-03-08 14:07:30 -0500528 if (!(lapic_timer_reliable_states & (1 << (cstate))))
529 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu);
530
Deepthi Dharware978aa72011-10-28 16:20:09 +0530531 return index;
Len Brown26717172010-03-08 14:07:30 -0500532}
533
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800534static void __setup_broadcast_timer(void *arg)
535{
536 unsigned long reason = (unsigned long)arg;
537 int cpu = smp_processor_id();
538
539 reason = reason ?
540 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
541
542 clockevents_notify(reason, &cpu);
543}
544
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200545static int cpu_hotplug_notify(struct notifier_block *n,
546 unsigned long action, void *hcpu)
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800547{
548 int hotcpu = (unsigned long)hcpu;
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200549 struct cpuidle_device *dev;
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800550
Prarit Bhargavae2401452013-10-23 09:44:51 -0400551 switch (action & ~CPU_TASKS_FROZEN) {
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800552 case CPU_ONLINE:
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200553
554 if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE)
555 smp_call_function_single(hotcpu, __setup_broadcast_timer,
556 (void *)true, 1);
557
558 /*
559 * Some systems can hotplug a cpu at runtime after
560 * the kernel has booted, we have to initialize the
561 * driver in this case
562 */
563 dev = per_cpu_ptr(intel_idle_cpuidle_devices, hotcpu);
564 if (!dev->registered)
565 intel_idle_cpu_init(hotcpu);
566
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800567 break;
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800568 }
569 return NOTIFY_OK;
570}
571
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200572static struct notifier_block cpu_hotplug_notifier = {
573 .notifier_call = cpu_hotplug_notify,
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800574};
575
Len Brown14796fc2011-01-18 20:48:27 -0500576static void auto_demotion_disable(void *dummy)
577{
578 unsigned long long msr_bits;
579
580 rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
Andi Kleenb66b8b92012-01-26 00:09:07 +0100581 msr_bits &= ~(icpu->auto_demotion_disable_flags);
Len Brown14796fc2011-01-18 20:48:27 -0500582 wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits);
583}
Len Brown32e95182013-02-02 01:31:56 -0500584static void c1e_promotion_disable(void *dummy)
585{
586 unsigned long long msr_bits;
587
588 rdmsrl(MSR_IA32_POWER_CTL, msr_bits);
589 msr_bits &= ~0x2;
590 wrmsrl(MSR_IA32_POWER_CTL, msr_bits);
591}
Len Brown14796fc2011-01-18 20:48:27 -0500592
Andi Kleenb66b8b92012-01-26 00:09:07 +0100593static const struct idle_cpu idle_cpu_nehalem = {
594 .state_table = nehalem_cstates,
Andi Kleenb66b8b92012-01-26 00:09:07 +0100595 .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE,
Len Brown32e95182013-02-02 01:31:56 -0500596 .disable_promotion_to_c1e = true,
Andi Kleenb66b8b92012-01-26 00:09:07 +0100597};
598
599static const struct idle_cpu idle_cpu_atom = {
600 .state_table = atom_cstates,
601};
602
603static const struct idle_cpu idle_cpu_lincroft = {
604 .state_table = atom_cstates,
605 .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE,
606};
607
608static const struct idle_cpu idle_cpu_snb = {
609 .state_table = snb_cstates,
Len Brown32e95182013-02-02 01:31:56 -0500610 .disable_promotion_to_c1e = true,
Andi Kleenb66b8b92012-01-26 00:09:07 +0100611};
612
Len Brown718987d2014-02-14 02:30:00 -0500613static const struct idle_cpu idle_cpu_byt = {
614 .state_table = byt_cstates,
615 .disable_promotion_to_c1e = true,
616};
617
Len Brown6edab082012-06-01 19:45:32 -0400618static const struct idle_cpu idle_cpu_ivb = {
619 .state_table = ivb_cstates,
Len Brown32e95182013-02-02 01:31:56 -0500620 .disable_promotion_to_c1e = true,
Len Brown6edab082012-06-01 19:45:32 -0400621};
622
Len Brown0138d8f2014-04-04 01:21:07 -0400623static const struct idle_cpu idle_cpu_ivt = {
624 .state_table = ivt_cstates,
625 .disable_promotion_to_c1e = true,
626};
627
Len Brown85a4d2d2013-01-31 14:40:49 -0500628static const struct idle_cpu idle_cpu_hsw = {
629 .state_table = hsw_cstates,
Len Brown32e95182013-02-02 01:31:56 -0500630 .disable_promotion_to_c1e = true,
Len Brown85a4d2d2013-01-31 14:40:49 -0500631};
632
Len Brownfab04b22013-11-09 00:30:17 -0500633static const struct idle_cpu idle_cpu_avn = {
634 .state_table = avn_cstates,
635 .disable_promotion_to_c1e = true,
636};
637
Andi Kleenb66b8b92012-01-26 00:09:07 +0100638#define ICPU(model, cpu) \
639 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
640
641static const struct x86_cpu_id intel_idle_ids[] = {
642 ICPU(0x1a, idle_cpu_nehalem),
643 ICPU(0x1e, idle_cpu_nehalem),
644 ICPU(0x1f, idle_cpu_nehalem),
Ben Hutchings8bf11932012-02-16 04:13:14 +0000645 ICPU(0x25, idle_cpu_nehalem),
646 ICPU(0x2c, idle_cpu_nehalem),
647 ICPU(0x2e, idle_cpu_nehalem),
Andi Kleenb66b8b92012-01-26 00:09:07 +0100648 ICPU(0x1c, idle_cpu_atom),
649 ICPU(0x26, idle_cpu_lincroft),
Ben Hutchings8bf11932012-02-16 04:13:14 +0000650 ICPU(0x2f, idle_cpu_nehalem),
Andi Kleenb66b8b92012-01-26 00:09:07 +0100651 ICPU(0x2a, idle_cpu_snb),
652 ICPU(0x2d, idle_cpu_snb),
Jan Kiszkaacead1b2014-01-25 22:24:22 +0100653 ICPU(0x36, idle_cpu_atom),
Len Brown718987d2014-02-14 02:30:00 -0500654 ICPU(0x37, idle_cpu_byt),
Len Brown6edab082012-06-01 19:45:32 -0400655 ICPU(0x3a, idle_cpu_ivb),
Len Brown0138d8f2014-04-04 01:21:07 -0400656 ICPU(0x3e, idle_cpu_ivt),
Len Brown85a4d2d2013-01-31 14:40:49 -0500657 ICPU(0x3c, idle_cpu_hsw),
658 ICPU(0x3f, idle_cpu_hsw),
659 ICPU(0x45, idle_cpu_hsw),
Len Brown0b158412013-03-15 10:55:31 -0400660 ICPU(0x46, idle_cpu_hsw),
Len Brownfab04b22013-11-09 00:30:17 -0500661 ICPU(0x4D, idle_cpu_avn),
Andi Kleenb66b8b92012-01-26 00:09:07 +0100662 {}
663};
664MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
665
Len Brown26717172010-03-08 14:07:30 -0500666/*
667 * intel_idle_probe()
668 */
Bartlomiej Zolnierkiewicz00f3e752013-08-30 12:27:45 +0200669static int __init intel_idle_probe(void)
Len Brown26717172010-03-08 14:07:30 -0500670{
Len Brownc4236282010-05-28 02:22:03 -0400671 unsigned int eax, ebx, ecx;
Andi Kleenb66b8b92012-01-26 00:09:07 +0100672 const struct x86_cpu_id *id;
Len Brown26717172010-03-08 14:07:30 -0500673
674 if (max_cstate == 0) {
675 pr_debug(PREFIX "disabled\n");
676 return -EPERM;
677 }
678
Andi Kleenb66b8b92012-01-26 00:09:07 +0100679 id = x86_match_cpu(intel_idle_ids);
680 if (!id) {
681 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
682 boot_cpu_data.x86 == 6)
683 pr_debug(PREFIX "does not run on family %d model %d\n",
684 boot_cpu_data.x86, boot_cpu_data.x86_model);
Len Brown26717172010-03-08 14:07:30 -0500685 return -ENODEV;
Andi Kleenb66b8b92012-01-26 00:09:07 +0100686 }
Len Brown26717172010-03-08 14:07:30 -0500687
688 if (boot_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
689 return -ENODEV;
690
Len Brownc4236282010-05-28 02:22:03 -0400691 cpuid(CPUID_MWAIT_LEAF, &eax, &ebx, &ecx, &mwait_substates);
Len Brown26717172010-03-08 14:07:30 -0500692
693 if (!(ecx & CPUID5_ECX_EXTENSIONS_SUPPORTED) ||
Thomas Renninger5c2a9f02011-12-04 22:17:29 +0100694 !(ecx & CPUID5_ECX_INTERRUPT_BREAK) ||
695 !mwait_substates)
Len Brown26717172010-03-08 14:07:30 -0500696 return -ENODEV;
Len Brown26717172010-03-08 14:07:30 -0500697
Len Brownc4236282010-05-28 02:22:03 -0400698 pr_debug(PREFIX "MWAIT substates: 0x%x\n", mwait_substates);
Len Brown26717172010-03-08 14:07:30 -0500699
Andi Kleenb66b8b92012-01-26 00:09:07 +0100700 icpu = (const struct idle_cpu *)id->driver_data;
701 cpuidle_state_table = icpu->state_table;
Len Brown26717172010-03-08 14:07:30 -0500702
Len Brown56b9aea2010-12-02 01:19:32 -0500703 if (boot_cpu_has(X86_FEATURE_ARAT)) /* Always Reliable APIC Timer */
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800704 lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE;
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200705 else
Shaohua Li39a74fd2012-01-10 15:48:19 -0800706 on_each_cpu(__setup_broadcast_timer, (void *)true, 1);
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200707
Len Brown26717172010-03-08 14:07:30 -0500708 pr_debug(PREFIX "v" INTEL_IDLE_VERSION
709 " model 0x%X\n", boot_cpu_data.x86_model);
710
711 pr_debug(PREFIX "lapic_timer_reliable_states 0x%x\n",
712 lapic_timer_reliable_states);
713 return 0;
714}
715
716/*
717 * intel_idle_cpuidle_devices_uninit()
718 * unregister, free cpuidle_devices
719 */
720static void intel_idle_cpuidle_devices_uninit(void)
721{
722 int i;
723 struct cpuidle_device *dev;
724
725 for_each_online_cpu(i) {
726 dev = per_cpu_ptr(intel_idle_cpuidle_devices, i);
727 cpuidle_unregister_device(dev);
728 }
729
730 free_percpu(intel_idle_cpuidle_devices);
731 return;
732}
Len Brown0138d8f2014-04-04 01:21:07 -0400733
734/*
735 * intel_idle_state_table_update()
736 *
737 * Update the default state_table for this CPU-id
738 *
739 * Currently used to access tuned IVT multi-socket targets
740 * Assumption: num_sockets == (max_package_num + 1)
741 */
742void intel_idle_state_table_update(void)
743{
744 /* IVT uses a different table for 1-2, 3-4, and > 4 sockets */
745 if (boot_cpu_data.x86_model == 0x3e) { /* IVT */
746 int cpu, package_num, num_sockets = 1;
747
748 for_each_online_cpu(cpu) {
749 package_num = topology_physical_package_id(cpu);
750 if (package_num + 1 > num_sockets) {
751 num_sockets = package_num + 1;
752
Christoph Jaegerd27dca42014-04-12 19:57:30 +0200753 if (num_sockets > 4) {
Len Brown0138d8f2014-04-04 01:21:07 -0400754 cpuidle_state_table = ivt_cstates_8s;
755 return;
Christoph Jaegerd27dca42014-04-12 19:57:30 +0200756 }
Len Brown0138d8f2014-04-04 01:21:07 -0400757 }
758 }
759
760 if (num_sockets > 2)
761 cpuidle_state_table = ivt_cstates_4s;
762 /* else, 1 and 2 socket systems use default ivt_cstates */
763 }
764 return;
765}
766
Len Brown26717172010-03-08 14:07:30 -0500767/*
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530768 * intel_idle_cpuidle_driver_init()
769 * allocate, initialize cpuidle_states
770 */
Bartlomiej Zolnierkiewicz00f3e752013-08-30 12:27:45 +0200771static int __init intel_idle_cpuidle_driver_init(void)
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530772{
773 int cstate;
774 struct cpuidle_driver *drv = &intel_idle_driver;
775
Len Brown0138d8f2014-04-04 01:21:07 -0400776 intel_idle_state_table_update();
777
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530778 drv->state_count = 1;
779
Len Browne022e7e2013-02-01 23:37:30 -0500780 for (cstate = 0; cstate < CPUIDLE_STATE_MAX; ++cstate) {
Len Brown24bfa952014-02-14 00:50:34 -0500781 int num_substates, mwait_hint, mwait_cstate;
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530782
Len Browne022e7e2013-02-01 23:37:30 -0500783 if (cpuidle_state_table[cstate].enter == NULL)
784 break;
785
786 if (cstate + 1 > max_cstate) {
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530787 printk(PREFIX "max_cstate %d reached\n",
788 max_cstate);
789 break;
790 }
791
Len Browne022e7e2013-02-01 23:37:30 -0500792 mwait_hint = flg2MWAIT(cpuidle_state_table[cstate].flags);
793 mwait_cstate = MWAIT_HINT2CSTATE(mwait_hint);
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530794
Len Brown24bfa952014-02-14 00:50:34 -0500795 /* number of sub-states for this state in CPUID.MWAIT */
Len Browne022e7e2013-02-01 23:37:30 -0500796 num_substates = (mwait_substates >> ((mwait_cstate + 1) * 4))
797 & MWAIT_SUBSTATE_MASK;
798
Len Brown24bfa952014-02-14 00:50:34 -0500799 /* if NO sub-states for this state in CPUID, skip it */
800 if (num_substates == 0)
Len Browne022e7e2013-02-01 23:37:30 -0500801 continue;
802
803 if (((mwait_cstate + 1) > 2) &&
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530804 !boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
805 mark_tsc_unstable("TSC halts in idle"
806 " states deeper than C2");
807
808 drv->states[drv->state_count] = /* structure copy */
809 cpuidle_state_table[cstate];
810
811 drv->state_count += 1;
812 }
813
Andi Kleenb66b8b92012-01-26 00:09:07 +0100814 if (icpu->auto_demotion_disable_flags)
Shaohua Li39a74fd2012-01-10 15:48:19 -0800815 on_each_cpu(auto_demotion_disable, NULL, 1);
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530816
Len Brown32e95182013-02-02 01:31:56 -0500817 if (icpu->disable_promotion_to_c1e) /* each-cpu is redundant */
818 on_each_cpu(c1e_promotion_disable, NULL, 1);
819
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530820 return 0;
821}
822
823
824/*
Thomas Renninger65b7f832012-01-17 22:40:08 +0100825 * intel_idle_cpu_init()
Len Brown26717172010-03-08 14:07:30 -0500826 * allocate, initialize, register cpuidle_devices
Thomas Renninger65b7f832012-01-17 22:40:08 +0100827 * @cpu: cpu/core to initialize
Len Brown26717172010-03-08 14:07:30 -0500828 */
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200829static int intel_idle_cpu_init(int cpu)
Len Brown26717172010-03-08 14:07:30 -0500830{
Len Brown26717172010-03-08 14:07:30 -0500831 struct cpuidle_device *dev;
832
Thomas Renninger65b7f832012-01-17 22:40:08 +0100833 dev = per_cpu_ptr(intel_idle_cpuidle_devices, cpu);
Len Brown26717172010-03-08 14:07:30 -0500834
Thomas Renninger65b7f832012-01-17 22:40:08 +0100835 dev->cpu = cpu;
Len Brown26717172010-03-08 14:07:30 -0500836
Thomas Renninger65b7f832012-01-17 22:40:08 +0100837 if (cpuidle_register_device(dev)) {
838 pr_debug(PREFIX "cpuidle_register_device %d failed!\n", cpu);
839 intel_idle_cpuidle_devices_uninit();
840 return -EIO;
Len Brown26717172010-03-08 14:07:30 -0500841 }
842
Andi Kleenb66b8b92012-01-26 00:09:07 +0100843 if (icpu->auto_demotion_disable_flags)
Thomas Renninger65b7f832012-01-17 22:40:08 +0100844 smp_call_function_single(cpu, auto_demotion_disable, NULL, 1);
845
Bartlomiej Zolnierkiewiczdbf87ab2013-12-20 19:47:28 +0100846 if (icpu->disable_promotion_to_c1e)
847 smp_call_function_single(cpu, c1e_promotion_disable, NULL, 1);
848
Len Brown26717172010-03-08 14:07:30 -0500849 return 0;
850}
Len Brown26717172010-03-08 14:07:30 -0500851
852static int __init intel_idle_init(void)
853{
Thomas Renninger65b7f832012-01-17 22:40:08 +0100854 int retval, i;
Len Brown26717172010-03-08 14:07:30 -0500855
Thomas Renningerd1896042010-11-03 17:06:14 +0100856 /* Do not load intel_idle at all for now if idle= is passed */
857 if (boot_option_idle_override != IDLE_NO_OVERRIDE)
858 return -ENODEV;
859
Len Brown26717172010-03-08 14:07:30 -0500860 retval = intel_idle_probe();
861 if (retval)
862 return retval;
863
Deepthi Dharwar46bcfad2011-10-28 16:20:42 +0530864 intel_idle_cpuidle_driver_init();
Len Brown26717172010-03-08 14:07:30 -0500865 retval = cpuidle_register_driver(&intel_idle_driver);
866 if (retval) {
Konrad Rzeszutek Wilk3735d522012-08-16 22:06:55 +0200867 struct cpuidle_driver *drv = cpuidle_get_driver();
Len Brown26717172010-03-08 14:07:30 -0500868 printk(KERN_DEBUG PREFIX "intel_idle yielding to %s",
Konrad Rzeszutek Wilk3735d522012-08-16 22:06:55 +0200869 drv ? drv->name : "none");
Len Brown26717172010-03-08 14:07:30 -0500870 return retval;
871 }
872
Thomas Renninger65b7f832012-01-17 22:40:08 +0100873 intel_idle_cpuidle_devices = alloc_percpu(struct cpuidle_device);
874 if (intel_idle_cpuidle_devices == NULL)
875 return -ENOMEM;
876
Srivatsa S. Bhat07494d52014-03-11 02:10:30 +0530877 cpu_notifier_register_begin();
878
Thomas Renninger65b7f832012-01-17 22:40:08 +0100879 for_each_online_cpu(i) {
880 retval = intel_idle_cpu_init(i);
881 if (retval) {
Srivatsa S. Bhat07494d52014-03-11 02:10:30 +0530882 cpu_notifier_register_done();
Thomas Renninger65b7f832012-01-17 22:40:08 +0100883 cpuidle_unregister_driver(&intel_idle_driver);
884 return retval;
885 }
Len Brown26717172010-03-08 14:07:30 -0500886 }
Srivatsa S. Bhat07494d52014-03-11 02:10:30 +0530887 __register_cpu_notifier(&cpu_hotplug_notifier);
888
889 cpu_notifier_register_done();
Len Brown26717172010-03-08 14:07:30 -0500890
891 return 0;
892}
893
894static void __exit intel_idle_exit(void)
895{
896 intel_idle_cpuidle_devices_uninit();
897 cpuidle_unregister_driver(&intel_idle_driver);
898
Srivatsa S. Bhat07494d52014-03-11 02:10:30 +0530899 cpu_notifier_register_begin();
Daniel Lezcano25ac7762012-07-05 15:23:25 +0200900
901 if (lapic_timer_reliable_states != LAPIC_TIMER_ALWAYS_RELIABLE)
Shaohua Li39a74fd2012-01-10 15:48:19 -0800902 on_each_cpu(__setup_broadcast_timer, (void *)false, 1);
Srivatsa S. Bhat07494d52014-03-11 02:10:30 +0530903 __unregister_cpu_notifier(&cpu_hotplug_notifier);
904
905 cpu_notifier_register_done();
Shaohua Li2a2d31c2011-01-10 09:38:12 +0800906
Len Brown26717172010-03-08 14:07:30 -0500907 return;
908}
909
910module_init(intel_idle_init);
911module_exit(intel_idle_exit);
912
Len Brown26717172010-03-08 14:07:30 -0500913module_param(max_cstate, int, 0444);
Len Brown26717172010-03-08 14:07:30 -0500914
915MODULE_AUTHOR("Len Brown <len.brown@intel.com>");
916MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION);
917MODULE_LICENSE("GPL");