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Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02001/*
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +00002 * intel TCO Watchdog Driver
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02003 *
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +02004 * (c) Copyright 2006-2011 Wim Van Sebroeck <wim@iguana.be>.
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02005 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
12 * provide warranty for any of this software. This material is
13 * provided "AS-IS" and at no charge.
14 *
15 * The TCO watchdog is implemented in the following I/O controller hubs:
16 * (See the intel documentation on http://developer.intel.com.)
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +000017 * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO)
18 * document number 290687-002, 298242-027: 82801BA (ICH2)
19 * document number 290733-003, 290739-013: 82801CA (ICH3-S)
20 * document number 290716-001, 290718-007: 82801CAM (ICH3-M)
21 * document number 290744-001, 290745-025: 82801DB (ICH4)
22 * document number 252337-001, 252663-008: 82801DBM (ICH4-M)
23 * document number 273599-001, 273645-002: 82801E (C-ICH)
24 * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
25 * document number 300641-004, 300884-013: 6300ESB
26 * document number 301473-002, 301474-026: 82801F (ICH6)
27 * document number 313082-001, 313075-006: 631xESB, 632xESB
28 * document number 307013-003, 307014-024: 82801G (ICH7)
Wim Van Sebroeckd38bd472010-12-31 14:10:45 +000029 * document number 322896-001, 322897-001: NM10
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +000030 * document number 313056-003, 313057-017: 82801H (ICH8)
31 * document number 316972-004, 316973-012: 82801I (ICH9)
32 * document number 319973-002, 319974-002: 82801J (ICH10)
Seth Heasley3c9d8ec2010-01-14 20:58:05 +000033 * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)
Imre Kaloz4946f832009-12-07 20:42:26 +010034 * document number 320066-003, 320257-008: EP80597 (IICH)
Seth Heasley203f8d82011-01-07 17:11:08 -080035 * document number 324645-001, 324646-001: Cougar Point (CPT)
Seth Heasleyc54fb812010-11-17 12:15:08 -070036 * document number TBD : Patsburg (PBG)
Seth Heasley203f8d82011-01-07 17:11:08 -080037 * document number TBD : DH89xxCC
Seth Heasleyaa1f46522011-04-20 10:56:20 -070038 * document number TBD : Panther Point
Seth Heasley84e83c22012-01-23 16:40:55 -080039 * document number TBD : Lynx Point
James Ralston7fb9c1a2012-08-09 09:46:13 -070040 * document number TBD : Lynx Point-LP
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020041 */
42
43/*
44 * Includes, defines, variables, module parameters, ...
45 */
46
Joe Perches27c766a2012-02-15 15:06:19 -080047#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
48
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020049/* Module and version information */
Wim Van Sebroeck7944d3a2008-08-06 20:19:41 +000050#define DRV_NAME "iTCO_wdt"
Peter Tyser24b3a162014-03-10 16:34:55 -050051#define DRV_VERSION "1.11"
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020052
53/* Includes */
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +020054#include <linux/acpi.h> /* For ACPI support */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020055#include <linux/module.h> /* For module specific items */
56#include <linux/moduleparam.h> /* For new moduleparam's */
57#include <linux/types.h> /* For standard types (like size_t) */
58#include <linux/errno.h> /* For the -ENODEV/... values */
59#include <linux/kernel.h> /* For printk/panic/... */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020060#include <linux/watchdog.h> /* For the watchdog specific items */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020061#include <linux/init.h> /* For __init/__exit/... */
62#include <linux/fs.h> /* For file operations */
63#include <linux/platform_device.h> /* For platform_driver framework */
64#include <linux/pci.h> /* For pci functions */
65#include <linux/ioport.h> /* For io-port access */
66#include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
Alan Cox0e6fa3f2008-05-19 14:06:25 +010067#include <linux/uaccess.h> /* For copy_to_user/put_user/... */
68#include <linux/io.h> /* For inb/outb/... */
Aaron Sierra887c8ec2012-04-20 14:14:11 -050069#include <linux/mfd/core.h>
70#include <linux/mfd/lpc_ich.h>
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020071
Alan Cox0e6fa3f2008-05-19 14:06:25 +010072#include "iTCO_vendor.h"
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020073
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020074/* Address definitions for the TCO */
Alan Cox0e6fa3f2008-05-19 14:06:25 +010075/* TCO base address */
Aaron Sierra887c8ec2012-04-20 14:14:11 -050076#define TCOBASE (iTCO_wdt_private.tco_res->start)
Alan Cox0e6fa3f2008-05-19 14:06:25 +010077/* SMI Control and Enable Register */
Aaron Sierra887c8ec2012-04-20 14:14:11 -050078#define SMI_EN (iTCO_wdt_private.smi_res->start)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020079
Wim Van Sebroeck0a7e65822009-04-14 20:20:07 +000080#define TCO_RLD (TCOBASE + 0x00) /* TCO Timer Reload and Curr. Value */
81#define TCOv1_TMR (TCOBASE + 0x01) /* TCOv1 Timer Initial Value */
82#define TCO_DAT_IN (TCOBASE + 0x02) /* TCO Data In Register */
83#define TCO_DAT_OUT (TCOBASE + 0x03) /* TCO Data Out Register */
84#define TCO1_STS (TCOBASE + 0x04) /* TCO1 Status Register */
85#define TCO2_STS (TCOBASE + 0x06) /* TCO2 Status Register */
86#define TCO1_CNT (TCOBASE + 0x08) /* TCO1 Control Register */
87#define TCO2_CNT (TCOBASE + 0x0a) /* TCO2 Control Register */
88#define TCOv2_TMR (TCOBASE + 0x12) /* TCOv2 Timer Initial Value */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020089
90/* internal variables */
Alan Cox0e6fa3f2008-05-19 14:06:25 +010091static struct { /* this is private data for the iTCO_wdt device */
92 /* TCO version/generation */
93 unsigned int iTCO_version;
Aaron Sierra887c8ec2012-04-20 14:14:11 -050094 struct resource *tco_res;
95 struct resource *smi_res;
Peter Tyser24b3a162014-03-10 16:34:55 -050096 /*
97 * NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2),
98 * or memory-mapped PMC register bit 4 (TCO version 3).
99 */
100 struct resource *gcs_pmc_res;
101 unsigned long __iomem *gcs_pmc;
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100102 /* the lock for io operations */
103 spinlock_t io_lock;
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500104 struct platform_device *dev;
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100105 /* the PCI-device */
106 struct pci_dev *pdev;
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200107 /* whether or not the watchdog has been suspended */
108 bool suspended;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200109} iTCO_wdt_private;
110
111/* module parameters */
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200112#define WATCHDOG_TIMEOUT 30 /* 30 sec default heartbeat */
113static int heartbeat = WATCHDOG_TIMEOUT; /* in seconds */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200114module_param(heartbeat, int, 0);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100115MODULE_PARM_DESC(heartbeat, "Watchdog timeout in seconds. "
116 "5..76 (TCO v1) or 3..614 (TCO v2), default="
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200117 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200118
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +0100119static bool nowayout = WATCHDOG_NOWAYOUT;
120module_param(nowayout, bool, 0);
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100121MODULE_PARM_DESC(nowayout,
122 "Watchdog cannot be stopped once started (default="
123 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100124
Wim Van Sebroeck0d098582011-12-26 15:23:51 +0100125static int turn_SMI_watchdog_clear_off = 1;
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +0200126module_param(turn_SMI_watchdog_clear_off, int, 0);
127MODULE_PARM_DESC(turn_SMI_watchdog_clear_off,
Wim Van Sebroeck0d098582011-12-26 15:23:51 +0100128 "Turn off SMI clearing watchdog (depends on TCO-version)(default=1)");
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +0200129
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200130/*
131 * Some TCO specific functions
132 */
133
Peter Tyser24b3a162014-03-10 16:34:55 -0500134/*
135 * The iTCO v1 and v2's internal timer is stored as ticks which decrement
136 * every 0.6 seconds. v3's internal timer is stored as seconds (some
137 * datasheets incorrectly state 0.6 seconds).
138 */
139static inline unsigned int seconds_to_ticks(int secs)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200140{
Peter Tyser24b3a162014-03-10 16:34:55 -0500141 return iTCO_wdt_private.iTCO_version == 3 ? secs : (secs * 10) / 6;
142}
143
144static inline unsigned int ticks_to_seconds(int ticks)
145{
146 return iTCO_wdt_private.iTCO_version == 3 ? ticks : (ticks * 6) / 10;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200147}
148
149static void iTCO_wdt_set_NO_REBOOT_bit(void)
150{
151 u32 val32;
152
153 /* Set the NO_REBOOT bit: this disables reboots */
Peter Tyser24b3a162014-03-10 16:34:55 -0500154 if (iTCO_wdt_private.iTCO_version == 3) {
155 val32 = readl(iTCO_wdt_private.gcs_pmc);
156 val32 |= 0x00000010;
157 writel(val32, iTCO_wdt_private.gcs_pmc);
158 } else if (iTCO_wdt_private.iTCO_version == 2) {
159 val32 = readl(iTCO_wdt_private.gcs_pmc);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200160 val32 |= 0x00000020;
Peter Tyser24b3a162014-03-10 16:34:55 -0500161 writel(val32, iTCO_wdt_private.gcs_pmc);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200162 } else if (iTCO_wdt_private.iTCO_version == 1) {
163 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
164 val32 |= 0x00000002;
165 pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
166 }
167}
168
169static int iTCO_wdt_unset_NO_REBOOT_bit(void)
170{
171 int ret = 0;
172 u32 val32;
173
174 /* Unset the NO_REBOOT bit: this enables reboots */
Peter Tyser24b3a162014-03-10 16:34:55 -0500175 if (iTCO_wdt_private.iTCO_version == 3) {
176 val32 = readl(iTCO_wdt_private.gcs_pmc);
177 val32 &= 0xffffffef;
178 writel(val32, iTCO_wdt_private.gcs_pmc);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200179
Peter Tyser24b3a162014-03-10 16:34:55 -0500180 val32 = readl(iTCO_wdt_private.gcs_pmc);
181 if (val32 & 0x00000010)
182 ret = -EIO;
183 } else if (iTCO_wdt_private.iTCO_version == 2) {
184 val32 = readl(iTCO_wdt_private.gcs_pmc);
185 val32 &= 0xffffffdf;
186 writel(val32, iTCO_wdt_private.gcs_pmc);
187
188 val32 = readl(iTCO_wdt_private.gcs_pmc);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200189 if (val32 & 0x00000020)
190 ret = -EIO;
191 } else if (iTCO_wdt_private.iTCO_version == 1) {
192 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
193 val32 &= 0xfffffffd;
194 pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
195
196 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
197 if (val32 & 0x00000002)
198 ret = -EIO;
199 }
200
201 return ret; /* returns: 0 = OK, -EIO = Error */
202}
203
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200204static int iTCO_wdt_start(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200205{
206 unsigned int val;
207
208 spin_lock(&iTCO_wdt_private.io_lock);
209
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200210 iTCO_vendor_pre_start(iTCO_wdt_private.smi_res, wd_dev->timeout);
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100211
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200212 /* disable chipset's NO_REBOOT bit */
213 if (iTCO_wdt_unset_NO_REBOOT_bit()) {
Roel Kluin2ba7d7b2007-10-23 03:08:27 +0200214 spin_unlock(&iTCO_wdt_private.io_lock);
Joe Perches27c766a2012-02-15 15:06:19 -0800215 pr_err("failed to reset NO_REBOOT flag, reboot disabled by hardware/BIOS\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200216 return -EIO;
217 }
218
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000219 /* Force the timer to its reload value by writing to the TCO_RLD
220 register */
Peter Tyser24b3a162014-03-10 16:34:55 -0500221 if (iTCO_wdt_private.iTCO_version >= 2)
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000222 outw(0x01, TCO_RLD);
223 else if (iTCO_wdt_private.iTCO_version == 1)
224 outb(0x01, TCO_RLD);
225
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200226 /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
227 val = inw(TCO1_CNT);
228 val &= 0xf7ff;
229 outw(val, TCO1_CNT);
230 val = inw(TCO1_CNT);
231 spin_unlock(&iTCO_wdt_private.io_lock);
232
233 if (val & 0x0800)
234 return -1;
235 return 0;
236}
237
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200238static int iTCO_wdt_stop(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200239{
240 unsigned int val;
241
242 spin_lock(&iTCO_wdt_private.io_lock);
243
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500244 iTCO_vendor_pre_stop(iTCO_wdt_private.smi_res);
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100245
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200246 /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
247 val = inw(TCO1_CNT);
248 val |= 0x0800;
249 outw(val, TCO1_CNT);
250 val = inw(TCO1_CNT);
251
252 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
253 iTCO_wdt_set_NO_REBOOT_bit();
254
255 spin_unlock(&iTCO_wdt_private.io_lock);
256
257 if ((val & 0x0800) == 0)
258 return -1;
259 return 0;
260}
261
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200262static int iTCO_wdt_ping(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200263{
264 spin_lock(&iTCO_wdt_private.io_lock);
265
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200266 iTCO_vendor_pre_keepalive(iTCO_wdt_private.smi_res, wd_dev->timeout);
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100267
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200268 /* Reload the timer by writing to the TCO Timer Counter register */
Peter Tyser24b3a162014-03-10 16:34:55 -0500269 if (iTCO_wdt_private.iTCO_version >= 2) {
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200270 outw(0x01, TCO_RLD);
Peter Tyser24b3a162014-03-10 16:34:55 -0500271 } else if (iTCO_wdt_private.iTCO_version == 1) {
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100272 /* Reset the timeout status bit so that the timer
273 * needs to count down twice again before rebooting */
274 outw(0x0008, TCO1_STS); /* write 1 to clear bit */
275
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200276 outb(0x01, TCO_RLD);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100277 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200278
279 spin_unlock(&iTCO_wdt_private.io_lock);
280 return 0;
281}
282
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200283static int iTCO_wdt_set_timeout(struct watchdog_device *wd_dev, unsigned int t)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200284{
285 unsigned int val16;
286 unsigned char val8;
287 unsigned int tmrval;
288
289 tmrval = seconds_to_ticks(t);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100290
291 /* For TCO v1 the timer counts down twice before rebooting */
292 if (iTCO_wdt_private.iTCO_version == 1)
293 tmrval /= 2;
294
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200295 /* from the specs: */
296 /* "Values of 0h-3h are ignored and should not be attempted" */
297 if (tmrval < 0x04)
298 return -EINVAL;
Peter Tyser24b3a162014-03-10 16:34:55 -0500299 if (((iTCO_wdt_private.iTCO_version >= 2) && (tmrval > 0x3ff)) ||
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200300 ((iTCO_wdt_private.iTCO_version == 1) && (tmrval > 0x03f)))
301 return -EINVAL;
302
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100303 iTCO_vendor_pre_set_heartbeat(tmrval);
304
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200305 /* Write new heartbeat to watchdog */
Peter Tyser24b3a162014-03-10 16:34:55 -0500306 if (iTCO_wdt_private.iTCO_version >= 2) {
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200307 spin_lock(&iTCO_wdt_private.io_lock);
308 val16 = inw(TCOv2_TMR);
309 val16 &= 0xfc00;
310 val16 |= tmrval;
311 outw(val16, TCOv2_TMR);
312 val16 = inw(TCOv2_TMR);
313 spin_unlock(&iTCO_wdt_private.io_lock);
314
315 if ((val16 & 0x3ff) != tmrval)
316 return -EINVAL;
317 } else if (iTCO_wdt_private.iTCO_version == 1) {
318 spin_lock(&iTCO_wdt_private.io_lock);
319 val8 = inb(TCOv1_TMR);
320 val8 &= 0xc0;
321 val8 |= (tmrval & 0xff);
322 outb(val8, TCOv1_TMR);
323 val8 = inb(TCOv1_TMR);
324 spin_unlock(&iTCO_wdt_private.io_lock);
325
326 if ((val8 & 0x3f) != tmrval)
327 return -EINVAL;
328 }
329
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200330 wd_dev->timeout = t;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200331 return 0;
332}
333
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200334static unsigned int iTCO_wdt_get_timeleft(struct watchdog_device *wd_dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200335{
336 unsigned int val16;
337 unsigned char val8;
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200338 unsigned int time_left = 0;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200339
340 /* read the TCO Timer */
Peter Tyser24b3a162014-03-10 16:34:55 -0500341 if (iTCO_wdt_private.iTCO_version >= 2) {
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200342 spin_lock(&iTCO_wdt_private.io_lock);
343 val16 = inw(TCO_RLD);
344 val16 &= 0x3ff;
345 spin_unlock(&iTCO_wdt_private.io_lock);
346
Peter Tyser24b3a162014-03-10 16:34:55 -0500347 time_left = ticks_to_seconds(val16);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200348 } else if (iTCO_wdt_private.iTCO_version == 1) {
349 spin_lock(&iTCO_wdt_private.io_lock);
350 val8 = inb(TCO_RLD);
351 val8 &= 0x3f;
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100352 if (!(inw(TCO1_STS) & 0x0008))
353 val8 += (inb(TCOv1_TMR) & 0x3f);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200354 spin_unlock(&iTCO_wdt_private.io_lock);
355
Peter Tyser24b3a162014-03-10 16:34:55 -0500356 time_left = ticks_to_seconds(val8);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200357 }
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200358 return time_left;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200359}
360
361/*
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200362 * Kernel Interfaces
363 */
364
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200365static const struct watchdog_info ident = {
366 .options = WDIOF_SETTIMEOUT |
367 WDIOF_KEEPALIVEPING |
368 WDIOF_MAGICCLOSE,
369 .firmware_version = 0,
370 .identity = DRV_NAME,
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200371};
372
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200373static const struct watchdog_ops iTCO_wdt_ops = {
374 .owner = THIS_MODULE,
375 .start = iTCO_wdt_start,
Jingoo Han5f5e1902014-02-27 14:41:42 +0900376 .stop = iTCO_wdt_stop,
377 .ping = iTCO_wdt_ping,
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200378 .set_timeout = iTCO_wdt_set_timeout,
379 .get_timeleft = iTCO_wdt_get_timeleft,
380};
381
382static struct watchdog_device iTCO_wdt_watchdog_dev = {
383 .info = &ident,
Jingoo Han5f5e1902014-02-27 14:41:42 +0900384 .ops = &iTCO_wdt_ops,
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200385};
386
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200387/*
388 * Init & exit routines
389 */
390
Bill Pemberton4b12b892012-11-19 13:26:24 -0500391static void iTCO_wdt_cleanup(void)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200392{
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500393 /* Stop the timer before we leave */
394 if (!nowayout)
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200395 iTCO_wdt_stop(&iTCO_wdt_watchdog_dev);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500396
397 /* Deregister */
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200398 watchdog_unregister_device(&iTCO_wdt_watchdog_dev);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500399
400 /* release resources */
401 release_region(iTCO_wdt_private.tco_res->start,
402 resource_size(iTCO_wdt_private.tco_res));
403 release_region(iTCO_wdt_private.smi_res->start,
404 resource_size(iTCO_wdt_private.smi_res));
Peter Tyser24b3a162014-03-10 16:34:55 -0500405 if (iTCO_wdt_private.iTCO_version >= 2) {
406 iounmap(iTCO_wdt_private.gcs_pmc);
407 release_mem_region(iTCO_wdt_private.gcs_pmc_res->start,
408 resource_size(iTCO_wdt_private.gcs_pmc_res));
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500409 }
410
411 iTCO_wdt_private.tco_res = NULL;
412 iTCO_wdt_private.smi_res = NULL;
Peter Tyser24b3a162014-03-10 16:34:55 -0500413 iTCO_wdt_private.gcs_pmc_res = NULL;
414 iTCO_wdt_private.gcs_pmc = NULL;
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500415}
416
Bill Pemberton2d991a12012-11-19 13:21:41 -0500417static int iTCO_wdt_probe(struct platform_device *dev)
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500418{
419 int ret = -ENODEV;
Wim Van Sebroeck12d60e22009-01-28 20:51:04 +0000420 unsigned long val32;
Jingoo Hanbc8fdfb2013-07-30 19:58:51 +0900421 struct lpc_ich_info *ich_info = dev_get_platdata(&dev->dev);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500422
423 if (!ich_info)
424 goto out;
425
426 spin_lock_init(&iTCO_wdt_private.io_lock);
427
428 iTCO_wdt_private.tco_res =
429 platform_get_resource(dev, IORESOURCE_IO, ICH_RES_IO_TCO);
430 if (!iTCO_wdt_private.tco_res)
431 goto out;
432
433 iTCO_wdt_private.smi_res =
434 platform_get_resource(dev, IORESOURCE_IO, ICH_RES_IO_SMI);
435 if (!iTCO_wdt_private.smi_res)
436 goto out;
437
438 iTCO_wdt_private.iTCO_version = ich_info->iTCO_version;
439 iTCO_wdt_private.dev = dev;
440 iTCO_wdt_private.pdev = to_pci_dev(dev->dev.parent);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200441
442 /*
Peter Tyser24b3a162014-03-10 16:34:55 -0500443 * Get the Memory-Mapped GCS or PMC register, we need it for the
444 * NO_REBOOT flag (TCO v2 and v3).
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200445 */
Peter Tyser24b3a162014-03-10 16:34:55 -0500446 if (iTCO_wdt_private.iTCO_version >= 2) {
447 iTCO_wdt_private.gcs_pmc_res = platform_get_resource(dev,
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500448 IORESOURCE_MEM,
Peter Tyser24b3a162014-03-10 16:34:55 -0500449 ICH_RES_MEM_GCS_PMC);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500450
Peter Tyser24b3a162014-03-10 16:34:55 -0500451 if (!iTCO_wdt_private.gcs_pmc_res)
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500452 goto out;
453
Peter Tyser24b3a162014-03-10 16:34:55 -0500454 if (!request_mem_region(iTCO_wdt_private.gcs_pmc_res->start,
455 resource_size(iTCO_wdt_private.gcs_pmc_res), dev->name)) {
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500456 ret = -EBUSY;
Denis V. Lunevde8cd9a2009-06-05 15:13:08 +0400457 goto out;
458 }
Peter Tyser24b3a162014-03-10 16:34:55 -0500459 iTCO_wdt_private.gcs_pmc = ioremap(iTCO_wdt_private.gcs_pmc_res->start,
460 resource_size(iTCO_wdt_private.gcs_pmc_res));
461 if (!iTCO_wdt_private.gcs_pmc) {
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500462 ret = -EIO;
Peter Tyser24b3a162014-03-10 16:34:55 -0500463 goto unreg_gcs_pmc;
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500464 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200465 }
466
467 /* Check chipset's NO_REBOOT bit */
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100468 if (iTCO_wdt_unset_NO_REBOOT_bit() && iTCO_vendor_check_noreboot_on()) {
Joe Perches27c766a2012-02-15 15:06:19 -0800469 pr_info("unable to reset NO_REBOOT flag, device disabled by hardware/BIOS\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200470 ret = -ENODEV; /* Cannot reset NO_REBOOT bit */
Peter Tyser24b3a162014-03-10 16:34:55 -0500471 goto unmap_gcs_pmc;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200472 }
473
474 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
475 iTCO_wdt_set_NO_REBOOT_bit();
476
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000477 /* The TCO logic uses the TCO_EN bit in the SMI_EN register */
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500478 if (!request_region(iTCO_wdt_private.smi_res->start,
479 resource_size(iTCO_wdt_private.smi_res), dev->name)) {
480 pr_err("I/O address 0x%04llx already in use, device disabled\n",
Randy Dunlap4b98b322012-05-14 13:15:20 -0700481 (u64)SMI_EN);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500482 ret = -EBUSY;
Peter Tyser24b3a162014-03-10 16:34:55 -0500483 goto unmap_gcs_pmc;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200484 }
Wim Van Sebroeck0d098582011-12-26 15:23:51 +0100485 if (turn_SMI_watchdog_clear_off >= iTCO_wdt_private.iTCO_version) {
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500486 /*
487 * Bit 13: TCO_EN -> 0
488 * Disables TCO logic generating an SMI#
489 */
Wim Van Sebroeckdeb91972011-10-19 23:59:26 +0200490 val32 = inl(SMI_EN);
491 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
492 outl(val32, SMI_EN);
493 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200494
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500495 if (!request_region(iTCO_wdt_private.tco_res->start,
496 resource_size(iTCO_wdt_private.tco_res), dev->name)) {
497 pr_err("I/O address 0x%04llx already in use, device disabled\n",
Randy Dunlap4b98b322012-05-14 13:15:20 -0700498 (u64)TCOBASE);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500499 ret = -EBUSY;
500 goto unreg_smi;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200501 }
502
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500503 pr_info("Found a %s TCO device (Version=%d, TCOBASE=0x%04llx)\n",
Randy Dunlap4b98b322012-05-14 13:15:20 -0700504 ich_info->name, ich_info->iTCO_version, (u64)TCOBASE);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200505
506 /* Clear out the (probably old) status */
Peter Tyser24b3a162014-03-10 16:34:55 -0500507 if (iTCO_wdt_private.iTCO_version == 3) {
508 outl(0x20008, TCO1_STS);
509 } else {
510 outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */
511 outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */
512 outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */
513 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200514
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200515 iTCO_wdt_watchdog_dev.bootstatus = 0;
516 iTCO_wdt_watchdog_dev.timeout = WATCHDOG_TIMEOUT;
517 watchdog_set_nowayout(&iTCO_wdt_watchdog_dev, nowayout);
Jean Delvarec90789b2014-03-10 21:28:17 +0100518 iTCO_wdt_watchdog_dev.parent = &dev->dev;
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200519
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200520 /* Make sure the watchdog is not running */
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200521 iTCO_wdt_stop(&iTCO_wdt_watchdog_dev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200522
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100523 /* Check that the heartbeat value is within it's range;
524 if not reset to the default */
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200525 if (iTCO_wdt_set_timeout(&iTCO_wdt_watchdog_dev, heartbeat)) {
526 iTCO_wdt_set_timeout(&iTCO_wdt_watchdog_dev, WATCHDOG_TIMEOUT);
527 pr_info("timeout value out of range, using %d\n",
528 WATCHDOG_TIMEOUT);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200529 }
530
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200531 ret = watchdog_register_device(&iTCO_wdt_watchdog_dev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200532 if (ret != 0) {
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200533 pr_err("cannot register watchdog device (err=%d)\n", ret);
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500534 goto unreg_tco;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200535 }
536
Joe Perches27c766a2012-02-15 15:06:19 -0800537 pr_info("initialized. heartbeat=%d sec (nowayout=%d)\n",
538 heartbeat, nowayout);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200539
540 return 0;
541
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500542unreg_tco:
543 release_region(iTCO_wdt_private.tco_res->start,
544 resource_size(iTCO_wdt_private.tco_res));
545unreg_smi:
546 release_region(iTCO_wdt_private.smi_res->start,
547 resource_size(iTCO_wdt_private.smi_res));
Peter Tyser24b3a162014-03-10 16:34:55 -0500548unmap_gcs_pmc:
549 if (iTCO_wdt_private.iTCO_version >= 2)
550 iounmap(iTCO_wdt_private.gcs_pmc);
551unreg_gcs_pmc:
552 if (iTCO_wdt_private.iTCO_version >= 2)
553 release_mem_region(iTCO_wdt_private.gcs_pmc_res->start,
554 resource_size(iTCO_wdt_private.gcs_pmc_res));
Denis V. Lunevde8cd9a2009-06-05 15:13:08 +0400555out:
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500556 iTCO_wdt_private.tco_res = NULL;
557 iTCO_wdt_private.smi_res = NULL;
Peter Tyser24b3a162014-03-10 16:34:55 -0500558 iTCO_wdt_private.gcs_pmc_res = NULL;
559 iTCO_wdt_private.gcs_pmc = NULL;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200560
Naga Chumbalkarec269852010-02-09 00:42:02 +0100561 return ret;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200562}
563
Bill Pemberton4b12b892012-11-19 13:26:24 -0500564static int iTCO_wdt_remove(struct platform_device *dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200565{
Aaron Sierra887c8ec2012-04-20 14:14:11 -0500566 if (iTCO_wdt_private.tco_res || iTCO_wdt_private.smi_res)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200567 iTCO_wdt_cleanup();
568
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200569 return 0;
570}
571
572static void iTCO_wdt_shutdown(struct platform_device *dev)
573{
Wim Van Sebroeckbff23432012-06-09 14:10:28 +0200574 iTCO_wdt_stop(NULL);
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200575}
576
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200577#ifdef CONFIG_PM_SLEEP
578/*
579 * Suspend-to-idle requires this, because it stops the ticks and timekeeping, so
580 * the watchdog cannot be pinged while in that state. In ACPI sleep states the
581 * watchdog is stopped by the platform firmware.
582 */
583
584#ifdef CONFIG_ACPI
585static inline bool need_suspend(void)
586{
587 return acpi_target_system_state() == ACPI_STATE_S0;
588}
589#else
590static inline bool need_suspend(void) { return true; }
591#endif
592
593static int iTCO_wdt_suspend_noirq(struct device *dev)
594{
595 int ret = 0;
596
597 iTCO_wdt_private.suspended = false;
598 if (watchdog_active(&iTCO_wdt_watchdog_dev) && need_suspend()) {
599 ret = iTCO_wdt_stop(&iTCO_wdt_watchdog_dev);
600 if (!ret)
601 iTCO_wdt_private.suspended = true;
602 }
603 return ret;
604}
605
606static int iTCO_wdt_resume_noirq(struct device *dev)
607{
608 if (iTCO_wdt_private.suspended)
609 iTCO_wdt_start(&iTCO_wdt_watchdog_dev);
610
611 return 0;
612}
613
614static struct dev_pm_ops iTCO_wdt_pm = {
615 .suspend_noirq = iTCO_wdt_suspend_noirq,
616 .resume_noirq = iTCO_wdt_resume_noirq,
617};
618
619#define ITCO_WDT_PM_OPS (&iTCO_wdt_pm)
620#else
621#define ITCO_WDT_PM_OPS NULL
622#endif /* CONFIG_PM_SLEEP */
623
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200624static struct platform_driver iTCO_wdt_driver = {
625 .probe = iTCO_wdt_probe,
Bill Pemberton82268712012-11-19 13:21:12 -0500626 .remove = iTCO_wdt_remove,
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200627 .shutdown = iTCO_wdt_shutdown,
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200628 .driver = {
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200629 .name = DRV_NAME,
Rafael J. Wysockif321c9cb2015-04-03 15:25:04 +0200630 .pm = ITCO_WDT_PM_OPS,
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200631 },
632};
633
634static int __init iTCO_wdt_init_module(void)
635{
636 int err;
637
Joe Perches27c766a2012-02-15 15:06:19 -0800638 pr_info("Intel TCO WatchDog Timer Driver v%s\n", DRV_VERSION);
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200639
640 err = platform_driver_register(&iTCO_wdt_driver);
641 if (err)
642 return err;
643
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200644 return 0;
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200645}
646
647static void __exit iTCO_wdt_cleanup_module(void)
648{
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200649 platform_driver_unregister(&iTCO_wdt_driver);
Joe Perches27c766a2012-02-15 15:06:19 -0800650 pr_info("Watchdog Module Unloaded\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200651}
652
653module_init(iTCO_wdt_init_module);
654module_exit(iTCO_wdt_cleanup_module);
655
656MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
657MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver");
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200658MODULE_VERSION(DRV_VERSION);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200659MODULE_LICENSE("GPL");
Jan Beuliche5de32e2012-06-22 16:41:00 +0100660MODULE_ALIAS("platform:" DRV_NAME);