Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Synopsys DesignWare 8250 driver. |
| 3 | * |
| 4 | * Copyright 2011 Picochip, Jamie Iles. |
Heikki Krogerus | 6a7320c | 2013-01-10 11:25:10 +0200 | [diff] [blame] | 5 | * Copyright 2013 Intel Corporation |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * The Synopsys DesignWare 8250 has an extra feature whereby it detects if the |
| 13 | * LCR is written whilst busy. If it is, then a busy detect interrupt is |
| 14 | * raised, the LCR needs to be rewritten and the uart status register read. |
| 15 | */ |
| 16 | #include <linux/device.h> |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 17 | #include <linux/io.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/serial_8250.h> |
| 20 | #include <linux/serial_core.h> |
| 21 | #include <linux/serial_reg.h> |
| 22 | #include <linux/of.h> |
| 23 | #include <linux/of_irq.h> |
| 24 | #include <linux/of_platform.h> |
| 25 | #include <linux/platform_device.h> |
| 26 | #include <linux/slab.h> |
Heikki Krogerus | 6a7320c | 2013-01-10 11:25:10 +0200 | [diff] [blame] | 27 | #include <linux/acpi.h> |
Emilio López | e302cd9 | 2013-03-29 00:15:49 +0100 | [diff] [blame] | 28 | #include <linux/clk.h> |
Chen-Yu Tsai | 7fe090b | 2014-07-23 23:33:06 +0800 | [diff] [blame] | 29 | #include <linux/reset.h> |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 30 | #include <linux/pm_runtime.h> |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 31 | |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 32 | #include <asm/byteorder.h> |
| 33 | |
Heikki Krogerus | 7277b2a | 2013-01-10 11:25:12 +0200 | [diff] [blame] | 34 | #include "8250.h" |
| 35 | |
Heikki Krogerus | 30046df | 2013-01-10 11:25:09 +0200 | [diff] [blame] | 36 | /* Offsets for the DesignWare specific registers */ |
| 37 | #define DW_UART_USR 0x1f /* UART Status Register */ |
| 38 | #define DW_UART_CPR 0xf4 /* Component Parameter Register */ |
| 39 | #define DW_UART_UCV 0xf8 /* UART Component Version */ |
| 40 | |
| 41 | /* Component Parameter Register bits */ |
| 42 | #define DW_UART_CPR_ABP_DATA_WIDTH (3 << 0) |
| 43 | #define DW_UART_CPR_AFCE_MODE (1 << 4) |
| 44 | #define DW_UART_CPR_THRE_MODE (1 << 5) |
| 45 | #define DW_UART_CPR_SIR_MODE (1 << 6) |
| 46 | #define DW_UART_CPR_SIR_LP_MODE (1 << 7) |
| 47 | #define DW_UART_CPR_ADDITIONAL_FEATURES (1 << 8) |
| 48 | #define DW_UART_CPR_FIFO_ACCESS (1 << 9) |
| 49 | #define DW_UART_CPR_FIFO_STAT (1 << 10) |
| 50 | #define DW_UART_CPR_SHADOW (1 << 11) |
| 51 | #define DW_UART_CPR_ENCODED_PARMS (1 << 12) |
| 52 | #define DW_UART_CPR_DMA_EXTRA (1 << 13) |
| 53 | #define DW_UART_CPR_FIFO_MODE (0xff << 16) |
| 54 | /* Helper for fifo size calculation */ |
| 55 | #define DW_UART_CPR_FIFO_SIZE(a) (((a >> 16) & 0xff) * 16) |
| 56 | |
| 57 | |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 58 | struct dw8250_data { |
Heikki Krogerus | fe9585553 | 2013-09-05 17:34:53 +0300 | [diff] [blame] | 59 | u8 usr_reg; |
Heikki Krogerus | fe9585553 | 2013-09-05 17:34:53 +0300 | [diff] [blame] | 60 | int last_mcr; |
| 61 | int line; |
| 62 | struct clk *clk; |
Heiko Stübner | 7d78cbe | 2014-06-16 15:25:17 +0200 | [diff] [blame] | 63 | struct clk *pclk; |
Chen-Yu Tsai | 7fe090b | 2014-07-23 23:33:06 +0800 | [diff] [blame] | 64 | struct reset_control *rst; |
Heikki Krogerus | fe9585553 | 2013-09-05 17:34:53 +0300 | [diff] [blame] | 65 | struct uart_8250_dma dma; |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 66 | }; |
| 67 | |
Loic Poulain | c439c33 | 2014-04-24 11:46:14 +0200 | [diff] [blame] | 68 | #define BYT_PRV_CLK 0x800 |
| 69 | #define BYT_PRV_CLK_EN (1 << 0) |
| 70 | #define BYT_PRV_CLK_M_VAL_SHIFT 1 |
| 71 | #define BYT_PRV_CLK_N_VAL_SHIFT 16 |
| 72 | #define BYT_PRV_CLK_UPDATE (1 << 31) |
| 73 | |
Tim Kryger | 33acbb8 | 2013-08-16 13:50:15 -0700 | [diff] [blame] | 74 | static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value) |
| 75 | { |
| 76 | struct dw8250_data *d = p->private_data; |
| 77 | |
| 78 | /* If reading MSR, report CTS asserted when auto-CTS/RTS enabled */ |
| 79 | if (offset == UART_MSR && d->last_mcr & UART_MCR_AFE) { |
| 80 | value |= UART_MSR_CTS; |
| 81 | value &= ~UART_MSR_DCTS; |
| 82 | } |
| 83 | |
| 84 | return value; |
| 85 | } |
| 86 | |
Tim Kryger | c49436b | 2013-10-01 10:18:08 -0700 | [diff] [blame] | 87 | static void dw8250_force_idle(struct uart_port *p) |
| 88 | { |
Andy Shevchenko | b1261c8 | 2014-07-14 14:26:14 +0300 | [diff] [blame] | 89 | struct uart_8250_port *up = up_to_u8250p(p); |
| 90 | |
| 91 | serial8250_clear_and_reinit_fifos(up); |
Tim Kryger | c49436b | 2013-10-01 10:18:08 -0700 | [diff] [blame] | 92 | (void)p->serial_in(p, UART_RX); |
| 93 | } |
| 94 | |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 95 | static void dw8250_serial_out(struct uart_port *p, int offset, int value) |
| 96 | { |
| 97 | struct dw8250_data *d = p->private_data; |
| 98 | |
Tim Kryger | 33acbb8 | 2013-08-16 13:50:15 -0700 | [diff] [blame] | 99 | if (offset == UART_MCR) |
| 100 | d->last_mcr = value; |
| 101 | |
| 102 | writeb(value, p->membase + (offset << p->regshift)); |
Tim Kryger | c49436b | 2013-10-01 10:18:08 -0700 | [diff] [blame] | 103 | |
| 104 | /* Make sure LCR write wasn't ignored */ |
| 105 | if (offset == UART_LCR) { |
| 106 | int tries = 1000; |
| 107 | while (tries--) { |
James Hogan | 6979f8d | 2013-12-10 22:28:04 +0000 | [diff] [blame] | 108 | unsigned int lcr = p->serial_in(p, UART_LCR); |
| 109 | if ((value & ~UART_LCR_SPAR) == (lcr & ~UART_LCR_SPAR)) |
Tim Kryger | c49436b | 2013-10-01 10:18:08 -0700 | [diff] [blame] | 110 | return; |
| 111 | dw8250_force_idle(p); |
| 112 | writeb(value, p->membase + (UART_LCR << p->regshift)); |
| 113 | } |
| 114 | dev_err(p->dev, "Couldn't set LCR to %d\n", value); |
| 115 | } |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 116 | } |
| 117 | |
| 118 | static unsigned int dw8250_serial_in(struct uart_port *p, int offset) |
| 119 | { |
Tim Kryger | 33acbb8 | 2013-08-16 13:50:15 -0700 | [diff] [blame] | 120 | unsigned int value = readb(p->membase + (offset << p->regshift)); |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 121 | |
Tim Kryger | 33acbb8 | 2013-08-16 13:50:15 -0700 | [diff] [blame] | 122 | return dw8250_modify_msr(p, offset, value); |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 123 | } |
| 124 | |
David Daney | bca2092 | 2014-11-14 17:26:19 +0300 | [diff] [blame] | 125 | #ifdef CONFIG_64BIT |
| 126 | static unsigned int dw8250_serial_inq(struct uart_port *p, int offset) |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 127 | { |
David Daney | bca2092 | 2014-11-14 17:26:19 +0300 | [diff] [blame] | 128 | unsigned int value; |
| 129 | |
| 130 | value = (u8)__raw_readq(p->membase + (offset << p->regshift)); |
| 131 | |
| 132 | return dw8250_modify_msr(p, offset, value); |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 133 | } |
| 134 | |
David Daney | bca2092 | 2014-11-14 17:26:19 +0300 | [diff] [blame] | 135 | static void dw8250_serial_outq(struct uart_port *p, int offset, int value) |
| 136 | { |
| 137 | struct dw8250_data *d = p->private_data; |
| 138 | |
| 139 | if (offset == UART_MCR) |
| 140 | d->last_mcr = value; |
| 141 | |
| 142 | value &= 0xff; |
| 143 | __raw_writeq(value, p->membase + (offset << p->regshift)); |
| 144 | /* Read back to ensure register write ordering. */ |
| 145 | __raw_readq(p->membase + (UART_LCR << p->regshift)); |
| 146 | |
| 147 | /* Make sure LCR write wasn't ignored */ |
| 148 | if (offset == UART_LCR) { |
| 149 | int tries = 1000; |
| 150 | while (tries--) { |
| 151 | unsigned int lcr = p->serial_in(p, UART_LCR); |
| 152 | if ((value & ~UART_LCR_SPAR) == (lcr & ~UART_LCR_SPAR)) |
| 153 | return; |
| 154 | dw8250_force_idle(p); |
| 155 | __raw_writeq(value & 0xff, |
| 156 | p->membase + (UART_LCR << p->regshift)); |
| 157 | } |
| 158 | dev_err(p->dev, "Couldn't set LCR to %d\n", value); |
| 159 | } |
| 160 | } |
| 161 | #endif /* CONFIG_64BIT */ |
| 162 | |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 163 | static void dw8250_serial_out32(struct uart_port *p, int offset, int value) |
| 164 | { |
| 165 | struct dw8250_data *d = p->private_data; |
| 166 | |
Tim Kryger | 33acbb8 | 2013-08-16 13:50:15 -0700 | [diff] [blame] | 167 | if (offset == UART_MCR) |
| 168 | d->last_mcr = value; |
| 169 | |
| 170 | writel(value, p->membase + (offset << p->regshift)); |
Tim Kryger | c49436b | 2013-10-01 10:18:08 -0700 | [diff] [blame] | 171 | |
| 172 | /* Make sure LCR write wasn't ignored */ |
| 173 | if (offset == UART_LCR) { |
| 174 | int tries = 1000; |
| 175 | while (tries--) { |
James Hogan | 6979f8d | 2013-12-10 22:28:04 +0000 | [diff] [blame] | 176 | unsigned int lcr = p->serial_in(p, UART_LCR); |
| 177 | if ((value & ~UART_LCR_SPAR) == (lcr & ~UART_LCR_SPAR)) |
Tim Kryger | c49436b | 2013-10-01 10:18:08 -0700 | [diff] [blame] | 178 | return; |
| 179 | dw8250_force_idle(p); |
| 180 | writel(value, p->membase + (UART_LCR << p->regshift)); |
| 181 | } |
| 182 | dev_err(p->dev, "Couldn't set LCR to %d\n", value); |
| 183 | } |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 184 | } |
| 185 | |
| 186 | static unsigned int dw8250_serial_in32(struct uart_port *p, int offset) |
| 187 | { |
Tim Kryger | 33acbb8 | 2013-08-16 13:50:15 -0700 | [diff] [blame] | 188 | unsigned int value = readl(p->membase + (offset << p->regshift)); |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 189 | |
Tim Kryger | 33acbb8 | 2013-08-16 13:50:15 -0700 | [diff] [blame] | 190 | return dw8250_modify_msr(p, offset, value); |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 191 | } |
| 192 | |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 193 | static int dw8250_handle_irq(struct uart_port *p) |
| 194 | { |
| 195 | struct dw8250_data *d = p->private_data; |
| 196 | unsigned int iir = p->serial_in(p, UART_IIR); |
| 197 | |
| 198 | if (serial8250_handle_irq(p, iir)) { |
| 199 | return 1; |
| 200 | } else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) { |
Tim Kryger | c49436b | 2013-10-01 10:18:08 -0700 | [diff] [blame] | 201 | /* Clear the USR */ |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 202 | (void)p->serial_in(p, d->usr_reg); |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 203 | |
| 204 | return 1; |
| 205 | } |
| 206 | |
| 207 | return 0; |
| 208 | } |
| 209 | |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 210 | static void |
| 211 | dw8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old) |
| 212 | { |
| 213 | if (!state) |
| 214 | pm_runtime_get_sync(port->dev); |
| 215 | |
| 216 | serial8250_do_pm(port, state, old); |
| 217 | |
| 218 | if (state) |
| 219 | pm_runtime_put_sync_suspend(port->dev); |
| 220 | } |
| 221 | |
Heikki Krogerus | 4e26b13 | 2014-06-05 16:51:40 +0300 | [diff] [blame] | 222 | static void dw8250_set_termios(struct uart_port *p, struct ktermios *termios, |
| 223 | struct ktermios *old) |
| 224 | { |
| 225 | unsigned int baud = tty_termios_baud_rate(termios); |
| 226 | struct dw8250_data *d = p->private_data; |
| 227 | unsigned int rate; |
| 228 | int ret; |
| 229 | |
| 230 | if (IS_ERR(d->clk) || !old) |
| 231 | goto out; |
| 232 | |
| 233 | /* Not requesting clock rates below 1.8432Mhz */ |
| 234 | if (baud < 115200) |
| 235 | baud = 115200; |
| 236 | |
| 237 | clk_disable_unprepare(d->clk); |
| 238 | rate = clk_round_rate(d->clk, baud * 16); |
| 239 | ret = clk_set_rate(d->clk, rate); |
| 240 | clk_prepare_enable(d->clk); |
| 241 | |
| 242 | if (!ret) |
| 243 | p->uartclk = rate; |
| 244 | out: |
| 245 | serial8250_do_set_termios(p, termios, old); |
| 246 | } |
| 247 | |
Heikki Krogerus | 7fb8c56 | 2013-09-05 17:34:54 +0300 | [diff] [blame] | 248 | static bool dw8250_dma_filter(struct dma_chan *chan, void *param) |
| 249 | { |
Andy Shevchenko | 9a1870c | 2014-08-19 20:29:22 +0300 | [diff] [blame] | 250 | return false; |
Heikki Krogerus | 7fb8c56 | 2013-09-05 17:34:54 +0300 | [diff] [blame] | 251 | } |
| 252 | |
Heikki Krogerus | 30046df | 2013-01-10 11:25:09 +0200 | [diff] [blame] | 253 | static void dw8250_setup_port(struct uart_8250_port *up) |
| 254 | { |
| 255 | struct uart_port *p = &up->port; |
| 256 | u32 reg = readl(p->membase + DW_UART_UCV); |
| 257 | |
| 258 | /* |
| 259 | * If the Component Version Register returns zero, we know that |
| 260 | * ADDITIONAL_FEATURES are not enabled. No need to go any further. |
| 261 | */ |
| 262 | if (!reg) |
| 263 | return; |
| 264 | |
| 265 | dev_dbg_ratelimited(p->dev, "Designware UART version %c.%c%c\n", |
| 266 | (reg >> 24) & 0xff, (reg >> 16) & 0xff, (reg >> 8) & 0xff); |
| 267 | |
| 268 | reg = readl(p->membase + DW_UART_CPR); |
| 269 | if (!reg) |
| 270 | return; |
| 271 | |
| 272 | /* Select the type based on fifo */ |
| 273 | if (reg & DW_UART_CPR_FIFO_MODE) { |
| 274 | p->type = PORT_16550A; |
| 275 | p->flags |= UPF_FIXED_TYPE; |
| 276 | p->fifosize = DW_UART_CPR_FIFO_SIZE(reg); |
| 277 | up->tx_loadsz = p->fifosize; |
Heikki Krogerus | 2920adb | 2013-04-10 16:58:31 +0300 | [diff] [blame] | 278 | up->capabilities = UART_CAP_FIFO; |
Heikki Krogerus | 30046df | 2013-01-10 11:25:09 +0200 | [diff] [blame] | 279 | } |
Heikki Krogerus | 2920adb | 2013-04-10 16:58:31 +0300 | [diff] [blame] | 280 | |
| 281 | if (reg & DW_UART_CPR_AFCE_MODE) |
| 282 | up->capabilities |= UART_CAP_AFE; |
Heikki Krogerus | 30046df | 2013-01-10 11:25:09 +0200 | [diff] [blame] | 283 | } |
| 284 | |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 285 | static int dw8250_probe_of(struct uart_port *p, |
| 286 | struct dw8250_data *data) |
| 287 | { |
| 288 | struct device_node *np = p->dev->of_node; |
Andy Shevchenko | b1261c8 | 2014-07-14 14:26:14 +0300 | [diff] [blame] | 289 | struct uart_8250_port *up = up_to_u8250p(p); |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 290 | u32 val; |
| 291 | bool has_ucv = true; |
Julien CHAUVEAU | f77d55a | 2014-11-04 11:45:55 +0100 | [diff] [blame] | 292 | int id; |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 293 | |
David Daney | bca2092 | 2014-11-14 17:26:19 +0300 | [diff] [blame] | 294 | #ifdef CONFIG_64BIT |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 295 | if (of_device_is_compatible(np, "cavium,octeon-3860-uart")) { |
David Daney | bca2092 | 2014-11-14 17:26:19 +0300 | [diff] [blame] | 296 | p->serial_in = dw8250_serial_inq; |
| 297 | p->serial_out = dw8250_serial_outq; |
Andy Shevchenko | d8782c7 | 2014-06-06 15:24:10 +0300 | [diff] [blame] | 298 | p->flags = UPF_SKIP_TEST | UPF_SHARE_IRQ | UPF_FIXED_TYPE; |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 299 | p->type = PORT_OCTEON; |
| 300 | data->usr_reg = 0x27; |
| 301 | has_ucv = false; |
David Daney | bca2092 | 2014-11-14 17:26:19 +0300 | [diff] [blame] | 302 | } else |
| 303 | #endif |
| 304 | if (!of_property_read_u32(np, "reg-io-width", &val)) { |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 305 | switch (val) { |
| 306 | case 1: |
| 307 | break; |
| 308 | case 4: |
| 309 | p->iotype = UPIO_MEM32; |
| 310 | p->serial_in = dw8250_serial_in32; |
| 311 | p->serial_out = dw8250_serial_out32; |
| 312 | break; |
| 313 | default: |
| 314 | dev_err(p->dev, "unsupported reg-io-width (%u)\n", val); |
| 315 | return -EINVAL; |
| 316 | } |
| 317 | } |
| 318 | if (has_ucv) |
Andy Shevchenko | b1261c8 | 2014-07-14 14:26:14 +0300 | [diff] [blame] | 319 | dw8250_setup_port(up); |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 320 | |
Ray Jui | a8b26e1 | 2014-10-07 17:35:47 -0700 | [diff] [blame] | 321 | /* if we have a valid fifosize, try hooking up DMA here */ |
| 322 | if (p->fifosize) { |
| 323 | up->dma = &data->dma; |
| 324 | |
| 325 | up->dma->rxconf.src_maxburst = p->fifosize / 4; |
| 326 | up->dma->txconf.dst_maxburst = p->fifosize / 4; |
| 327 | } |
| 328 | |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 329 | if (!of_property_read_u32(np, "reg-shift", &val)) |
| 330 | p->regshift = val; |
| 331 | |
Julien CHAUVEAU | f77d55a | 2014-11-04 11:45:55 +0100 | [diff] [blame] | 332 | /* get index of serial line, if found in DT aliases */ |
| 333 | id = of_alias_get_id(np, "serial"); |
| 334 | if (id >= 0) |
| 335 | p->line = id; |
| 336 | |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 337 | /* clock got configured through clk api, all done */ |
| 338 | if (p->uartclk) |
| 339 | return 0; |
| 340 | |
| 341 | /* try to find out clock frequency from DT as fallback */ |
| 342 | if (of_property_read_u32(np, "clock-frequency", &val)) { |
| 343 | dev_err(p->dev, "clk or clock-frequency not defined\n"); |
| 344 | return -EINVAL; |
| 345 | } |
| 346 | p->uartclk = val; |
| 347 | |
| 348 | return 0; |
| 349 | } |
| 350 | |
Heikki Krogerus | fe9585553 | 2013-09-05 17:34:53 +0300 | [diff] [blame] | 351 | static int dw8250_probe_acpi(struct uart_8250_port *up, |
| 352 | struct dw8250_data *data) |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 353 | { |
Feng Kan | 5e1aeea | 2014-12-05 17:45:57 -0800 | [diff] [blame] | 354 | const struct acpi_device_id *id; |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 355 | struct uart_port *p = &up->port; |
| 356 | |
| 357 | dw8250_setup_port(up); |
| 358 | |
Feng Kan | 5e1aeea | 2014-12-05 17:45:57 -0800 | [diff] [blame] | 359 | id = acpi_match_device(p->dev->driver->acpi_match_table, p->dev); |
| 360 | if (!id) |
| 361 | return -ENODEV; |
| 362 | |
| 363 | if (!p->uartclk) |
| 364 | if (device_property_read_u32(p->dev, "clock-frequency", |
| 365 | &p->uartclk)) |
| 366 | return -EINVAL; |
| 367 | |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 368 | p->iotype = UPIO_MEM32; |
| 369 | p->serial_in = dw8250_serial_in32; |
| 370 | p->serial_out = dw8250_serial_out32; |
| 371 | p->regshift = 2; |
| 372 | |
Heikki Krogerus | fe9585553 | 2013-09-05 17:34:53 +0300 | [diff] [blame] | 373 | up->dma = &data->dma; |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 374 | |
| 375 | up->dma->rxconf.src_maxburst = p->fifosize / 4; |
| 376 | up->dma->txconf.dst_maxburst = p->fifosize / 4; |
| 377 | |
Heikki Krogerus | 4e26b13 | 2014-06-05 16:51:40 +0300 | [diff] [blame] | 378 | up->port.set_termios = dw8250_set_termios; |
Loic Poulain | c439c33 | 2014-04-24 11:46:14 +0200 | [diff] [blame] | 379 | |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 380 | return 0; |
| 381 | } |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 382 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 383 | static int dw8250_probe(struct platform_device *pdev) |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 384 | { |
Alan Cox | 2655a2c | 2012-07-12 12:59:50 +0100 | [diff] [blame] | 385 | struct uart_8250_port uart = {}; |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 386 | struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 387 | struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 388 | struct dw8250_data *data; |
Heikki Krogerus | a7260c8 | 2013-01-10 11:25:08 +0200 | [diff] [blame] | 389 | int err; |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 390 | |
| 391 | if (!regs || !irq) { |
| 392 | dev_err(&pdev->dev, "no registers/irq defined\n"); |
| 393 | return -EINVAL; |
| 394 | } |
| 395 | |
Alan Cox | 2655a2c | 2012-07-12 12:59:50 +0100 | [diff] [blame] | 396 | spin_lock_init(&uart.port.lock); |
| 397 | uart.port.mapbase = regs->start; |
| 398 | uart.port.irq = irq->start; |
| 399 | uart.port.handle_irq = dw8250_handle_irq; |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 400 | uart.port.pm = dw8250_do_pm; |
Alan Cox | 2655a2c | 2012-07-12 12:59:50 +0100 | [diff] [blame] | 401 | uart.port.type = PORT_8250; |
Heikki Krogerus | f93366f | 2013-01-10 11:25:07 +0200 | [diff] [blame] | 402 | uart.port.flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT; |
Alan Cox | 2655a2c | 2012-07-12 12:59:50 +0100 | [diff] [blame] | 403 | uart.port.dev = &pdev->dev; |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 404 | |
Heikki Krogerus | b88d082 | 2013-04-11 15:43:21 +0300 | [diff] [blame] | 405 | uart.port.membase = devm_ioremap(&pdev->dev, regs->start, |
| 406 | resource_size(regs)); |
Heikki Krogerus | f93366f | 2013-01-10 11:25:07 +0200 | [diff] [blame] | 407 | if (!uart.port.membase) |
| 408 | return -ENOMEM; |
| 409 | |
Emilio López | e302cd9 | 2013-03-29 00:15:49 +0100 | [diff] [blame] | 410 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); |
| 411 | if (!data) |
| 412 | return -ENOMEM; |
| 413 | |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 414 | data->usr_reg = DW_UART_USR; |
Heiko Stübner | 7d78cbe | 2014-06-16 15:25:17 +0200 | [diff] [blame] | 415 | data->clk = devm_clk_get(&pdev->dev, "baudclk"); |
Chen-Yu Tsai | c8ed99d | 2014-07-23 23:33:07 +0800 | [diff] [blame] | 416 | if (IS_ERR(data->clk) && PTR_ERR(data->clk) != -EPROBE_DEFER) |
Heiko Stübner | 7d78cbe | 2014-06-16 15:25:17 +0200 | [diff] [blame] | 417 | data->clk = devm_clk_get(&pdev->dev, NULL); |
Chen-Yu Tsai | c8ed99d | 2014-07-23 23:33:07 +0800 | [diff] [blame] | 418 | if (IS_ERR(data->clk) && PTR_ERR(data->clk) == -EPROBE_DEFER) |
| 419 | return -EPROBE_DEFER; |
Emilio López | e302cd9 | 2013-03-29 00:15:49 +0100 | [diff] [blame] | 420 | if (!IS_ERR(data->clk)) { |
Heiko Stübner | 7d78cbe | 2014-06-16 15:25:17 +0200 | [diff] [blame] | 421 | err = clk_prepare_enable(data->clk); |
| 422 | if (err) |
| 423 | dev_warn(&pdev->dev, "could not enable optional baudclk: %d\n", |
| 424 | err); |
| 425 | else |
| 426 | uart.port.uartclk = clk_get_rate(data->clk); |
| 427 | } |
| 428 | |
| 429 | data->pclk = devm_clk_get(&pdev->dev, "apb_pclk"); |
Chen-Yu Tsai | c8ed99d | 2014-07-23 23:33:07 +0800 | [diff] [blame] | 430 | if (IS_ERR(data->clk) && PTR_ERR(data->clk) == -EPROBE_DEFER) { |
| 431 | err = -EPROBE_DEFER; |
| 432 | goto err_clk; |
| 433 | } |
Heiko Stübner | 7d78cbe | 2014-06-16 15:25:17 +0200 | [diff] [blame] | 434 | if (!IS_ERR(data->pclk)) { |
| 435 | err = clk_prepare_enable(data->pclk); |
| 436 | if (err) { |
| 437 | dev_err(&pdev->dev, "could not enable apb_pclk\n"); |
Chen-Yu Tsai | c8ed99d | 2014-07-23 23:33:07 +0800 | [diff] [blame] | 438 | goto err_clk; |
Heiko Stübner | 7d78cbe | 2014-06-16 15:25:17 +0200 | [diff] [blame] | 439 | } |
Emilio López | e302cd9 | 2013-03-29 00:15:49 +0100 | [diff] [blame] | 440 | } |
| 441 | |
Chen-Yu Tsai | 7fe090b | 2014-07-23 23:33:06 +0800 | [diff] [blame] | 442 | data->rst = devm_reset_control_get_optional(&pdev->dev, NULL); |
Chen-Yu Tsai | c8ed99d | 2014-07-23 23:33:07 +0800 | [diff] [blame] | 443 | if (IS_ERR(data->rst) && PTR_ERR(data->rst) == -EPROBE_DEFER) { |
| 444 | err = -EPROBE_DEFER; |
| 445 | goto err_pclk; |
| 446 | } |
Chen-Yu Tsai | 7fe090b | 2014-07-23 23:33:06 +0800 | [diff] [blame] | 447 | if (!IS_ERR(data->rst)) |
| 448 | reset_control_deassert(data->rst); |
| 449 | |
Heikki Krogerus | 7fb8c56 | 2013-09-05 17:34:54 +0300 | [diff] [blame] | 450 | data->dma.rx_param = data; |
| 451 | data->dma.tx_param = data; |
| 452 | data->dma.fn = dw8250_dma_filter; |
| 453 | |
Alan Cox | 2655a2c | 2012-07-12 12:59:50 +0100 | [diff] [blame] | 454 | uart.port.iotype = UPIO_MEM; |
| 455 | uart.port.serial_in = dw8250_serial_in; |
| 456 | uart.port.serial_out = dw8250_serial_out; |
Emilio López | e302cd9 | 2013-03-29 00:15:49 +0100 | [diff] [blame] | 457 | uart.port.private_data = data; |
Heikki Krogerus | a7260c8 | 2013-01-10 11:25:08 +0200 | [diff] [blame] | 458 | |
| 459 | if (pdev->dev.of_node) { |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 460 | err = dw8250_probe_of(&uart.port, data); |
Heikki Krogerus | a7260c8 | 2013-01-10 11:25:08 +0200 | [diff] [blame] | 461 | if (err) |
Chen-Yu Tsai | c8ed99d | 2014-07-23 23:33:07 +0800 | [diff] [blame] | 462 | goto err_reset; |
Heikki Krogerus | 6a7320c | 2013-01-10 11:25:10 +0200 | [diff] [blame] | 463 | } else if (ACPI_HANDLE(&pdev->dev)) { |
Heikki Krogerus | fe9585553 | 2013-09-05 17:34:53 +0300 | [diff] [blame] | 464 | err = dw8250_probe_acpi(&uart, data); |
Heikki Krogerus | 6a7320c | 2013-01-10 11:25:10 +0200 | [diff] [blame] | 465 | if (err) |
Chen-Yu Tsai | c8ed99d | 2014-07-23 23:33:07 +0800 | [diff] [blame] | 466 | goto err_reset; |
Heikki Krogerus | a7260c8 | 2013-01-10 11:25:08 +0200 | [diff] [blame] | 467 | } else { |
Chen-Yu Tsai | c8ed99d | 2014-07-23 23:33:07 +0800 | [diff] [blame] | 468 | err = -ENODEV; |
| 469 | goto err_reset; |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 470 | } |
| 471 | |
Alan Cox | 2655a2c | 2012-07-12 12:59:50 +0100 | [diff] [blame] | 472 | data->line = serial8250_register_8250_port(&uart); |
Chen-Yu Tsai | c8ed99d | 2014-07-23 23:33:07 +0800 | [diff] [blame] | 473 | if (data->line < 0) { |
| 474 | err = data->line; |
| 475 | goto err_reset; |
| 476 | } |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 477 | |
| 478 | platform_set_drvdata(pdev, data); |
| 479 | |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 480 | pm_runtime_set_active(&pdev->dev); |
| 481 | pm_runtime_enable(&pdev->dev); |
| 482 | |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 483 | return 0; |
Chen-Yu Tsai | c8ed99d | 2014-07-23 23:33:07 +0800 | [diff] [blame] | 484 | |
| 485 | err_reset: |
| 486 | if (!IS_ERR(data->rst)) |
| 487 | reset_control_assert(data->rst); |
| 488 | |
| 489 | err_pclk: |
| 490 | if (!IS_ERR(data->pclk)) |
| 491 | clk_disable_unprepare(data->pclk); |
| 492 | |
| 493 | err_clk: |
| 494 | if (!IS_ERR(data->clk)) |
| 495 | clk_disable_unprepare(data->clk); |
| 496 | |
| 497 | return err; |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 498 | } |
| 499 | |
Bill Pemberton | ae8d8a1 | 2012-11-19 13:26:18 -0500 | [diff] [blame] | 500 | static int dw8250_remove(struct platform_device *pdev) |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 501 | { |
| 502 | struct dw8250_data *data = platform_get_drvdata(pdev); |
| 503 | |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 504 | pm_runtime_get_sync(&pdev->dev); |
| 505 | |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 506 | serial8250_unregister_port(data->line); |
| 507 | |
Chen-Yu Tsai | 7fe090b | 2014-07-23 23:33:06 +0800 | [diff] [blame] | 508 | if (!IS_ERR(data->rst)) |
| 509 | reset_control_assert(data->rst); |
| 510 | |
Heiko Stübner | 7d78cbe | 2014-06-16 15:25:17 +0200 | [diff] [blame] | 511 | if (!IS_ERR(data->pclk)) |
| 512 | clk_disable_unprepare(data->pclk); |
| 513 | |
Emilio López | e302cd9 | 2013-03-29 00:15:49 +0100 | [diff] [blame] | 514 | if (!IS_ERR(data->clk)) |
| 515 | clk_disable_unprepare(data->clk); |
| 516 | |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 517 | pm_runtime_disable(&pdev->dev); |
| 518 | pm_runtime_put_noidle(&pdev->dev); |
| 519 | |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 520 | return 0; |
| 521 | } |
| 522 | |
Mika Westerberg | 13b949f | 2014-01-16 14:55:57 +0200 | [diff] [blame] | 523 | #ifdef CONFIG_PM_SLEEP |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 524 | static int dw8250_suspend(struct device *dev) |
James Hogan | b61c5ed | 2012-10-15 10:25:58 +0100 | [diff] [blame] | 525 | { |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 526 | struct dw8250_data *data = dev_get_drvdata(dev); |
James Hogan | b61c5ed | 2012-10-15 10:25:58 +0100 | [diff] [blame] | 527 | |
| 528 | serial8250_suspend_port(data->line); |
| 529 | |
| 530 | return 0; |
| 531 | } |
| 532 | |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 533 | static int dw8250_resume(struct device *dev) |
James Hogan | b61c5ed | 2012-10-15 10:25:58 +0100 | [diff] [blame] | 534 | { |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 535 | struct dw8250_data *data = dev_get_drvdata(dev); |
James Hogan | b61c5ed | 2012-10-15 10:25:58 +0100 | [diff] [blame] | 536 | |
| 537 | serial8250_resume_port(data->line); |
| 538 | |
| 539 | return 0; |
| 540 | } |
Mika Westerberg | 13b949f | 2014-01-16 14:55:57 +0200 | [diff] [blame] | 541 | #endif /* CONFIG_PM_SLEEP */ |
James Hogan | b61c5ed | 2012-10-15 10:25:58 +0100 | [diff] [blame] | 542 | |
Rafael J. Wysocki | d39fe4e | 2014-12-13 00:41:36 +0100 | [diff] [blame] | 543 | #ifdef CONFIG_PM |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 544 | static int dw8250_runtime_suspend(struct device *dev) |
| 545 | { |
| 546 | struct dw8250_data *data = dev_get_drvdata(dev); |
| 547 | |
Ezequiel Garcia | dbd2df8 | 2013-05-07 08:27:16 -0300 | [diff] [blame] | 548 | if (!IS_ERR(data->clk)) |
| 549 | clk_disable_unprepare(data->clk); |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 550 | |
Heiko Stübner | 7d78cbe | 2014-06-16 15:25:17 +0200 | [diff] [blame] | 551 | if (!IS_ERR(data->pclk)) |
| 552 | clk_disable_unprepare(data->pclk); |
| 553 | |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 554 | return 0; |
| 555 | } |
| 556 | |
| 557 | static int dw8250_runtime_resume(struct device *dev) |
| 558 | { |
| 559 | struct dw8250_data *data = dev_get_drvdata(dev); |
| 560 | |
Heiko Stübner | 7d78cbe | 2014-06-16 15:25:17 +0200 | [diff] [blame] | 561 | if (!IS_ERR(data->pclk)) |
| 562 | clk_prepare_enable(data->pclk); |
| 563 | |
Ezequiel Garcia | dbd2df8 | 2013-05-07 08:27:16 -0300 | [diff] [blame] | 564 | if (!IS_ERR(data->clk)) |
| 565 | clk_prepare_enable(data->clk); |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 566 | |
| 567 | return 0; |
| 568 | } |
| 569 | #endif |
| 570 | |
| 571 | static const struct dev_pm_ops dw8250_pm_ops = { |
| 572 | SET_SYSTEM_SLEEP_PM_OPS(dw8250_suspend, dw8250_resume) |
| 573 | SET_RUNTIME_PM_OPS(dw8250_runtime_suspend, dw8250_runtime_resume, NULL) |
| 574 | }; |
| 575 | |
Heikki Krogerus | a7260c8 | 2013-01-10 11:25:08 +0200 | [diff] [blame] | 576 | static const struct of_device_id dw8250_of_match[] = { |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 577 | { .compatible = "snps,dw-apb-uart" }, |
David Daney | d5f1af7 | 2013-06-19 20:37:27 +0000 | [diff] [blame] | 578 | { .compatible = "cavium,octeon-3860-uart" }, |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 579 | { /* Sentinel */ } |
| 580 | }; |
Heikki Krogerus | a7260c8 | 2013-01-10 11:25:08 +0200 | [diff] [blame] | 581 | MODULE_DEVICE_TABLE(of, dw8250_of_match); |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 582 | |
Heikki Krogerus | 6a7320c | 2013-01-10 11:25:10 +0200 | [diff] [blame] | 583 | static const struct acpi_device_id dw8250_acpi_match[] = { |
Heikki Krogerus | aea02e8 | 2013-04-10 16:58:29 +0300 | [diff] [blame] | 584 | { "INT33C4", 0 }, |
| 585 | { "INT33C5", 0 }, |
Mika Westerberg | d24c195 | 2013-12-10 12:56:59 +0200 | [diff] [blame] | 586 | { "INT3434", 0 }, |
| 587 | { "INT3435", 0 }, |
Heikki Krogerus | 4e26b13 | 2014-06-05 16:51:40 +0300 | [diff] [blame] | 588 | { "80860F0A", 0 }, |
Alan Cox | f174442 | 2014-08-19 16:34:49 +0300 | [diff] [blame] | 589 | { "8086228A", 0 }, |
Feng Kan | 5e1aeea | 2014-12-05 17:45:57 -0800 | [diff] [blame] | 590 | { "APMC0D08", 0}, |
Heikki Krogerus | 6a7320c | 2013-01-10 11:25:10 +0200 | [diff] [blame] | 591 | { }, |
| 592 | }; |
| 593 | MODULE_DEVICE_TABLE(acpi, dw8250_acpi_match); |
| 594 | |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 595 | static struct platform_driver dw8250_platform_driver = { |
| 596 | .driver = { |
| 597 | .name = "dw-apb-uart", |
Heikki Krogerus | ffc3ae6 | 2013-04-10 16:58:28 +0300 | [diff] [blame] | 598 | .pm = &dw8250_pm_ops, |
Heikki Krogerus | a7260c8 | 2013-01-10 11:25:08 +0200 | [diff] [blame] | 599 | .of_match_table = dw8250_of_match, |
Heikki Krogerus | 6a7320c | 2013-01-10 11:25:10 +0200 | [diff] [blame] | 600 | .acpi_match_table = ACPI_PTR(dw8250_acpi_match), |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 601 | }, |
| 602 | .probe = dw8250_probe, |
Bill Pemberton | 2d47b71 | 2012-11-19 13:21:34 -0500 | [diff] [blame] | 603 | .remove = dw8250_remove, |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 604 | }; |
| 605 | |
Axel Lin | c8381c15 | 2011-11-28 19:22:15 +0800 | [diff] [blame] | 606 | module_platform_driver(dw8250_platform_driver); |
Jamie Iles | 7d4008e | 2011-08-26 19:04:50 +0100 | [diff] [blame] | 607 | |
| 608 | MODULE_AUTHOR("Jamie Iles"); |
| 609 | MODULE_LICENSE("GPL"); |
| 610 | MODULE_DESCRIPTION("Synopsys DesignWare 8250 serial port driver"); |