Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/include/asm/outercache.h |
| 3 | * |
| 4 | * Copyright (C) 2010 ARM Ltd. |
| 5 | * Written by Catalin Marinas <catalin.marinas@arm.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | |
| 21 | #ifndef __ASM_OUTERCACHE_H |
| 22 | #define __ASM_OUTERCACHE_H |
| 23 | |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 24 | #include <linux/types.h> |
| 25 | |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 26 | struct outer_cache_fns { |
| 27 | void (*inv_range)(unsigned long, unsigned long); |
| 28 | void (*clean_range)(unsigned long, unsigned long); |
| 29 | void (*flush_range)(unsigned long, unsigned long); |
Thomas Gleixner | ae360a7 | 2010-07-31 21:06:06 +0530 | [diff] [blame] | 30 | void (*flush_all)(void); |
Thomas Gleixner | ae360a7 | 2010-07-31 21:06:06 +0530 | [diff] [blame] | 31 | void (*disable)(void); |
Catalin Marinas | 319f551 | 2010-03-24 16:47:53 +0100 | [diff] [blame] | 32 | #ifdef CONFIG_OUTER_CACHE_SYNC |
| 33 | void (*sync)(void); |
| 34 | #endif |
Barry Song | 91c2ebb | 2011-09-30 14:43:12 +0100 | [diff] [blame] | 35 | void (*resume)(void); |
Russell King | 8abd259 | 2014-03-16 17:38:08 +0000 | [diff] [blame] | 36 | |
| 37 | /* This is an ARM L2C thing */ |
Russell King | 8abd259 | 2014-03-16 17:38:08 +0000 | [diff] [blame] | 38 | void (*write_sec)(unsigned long, unsigned); |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 39 | }; |
| 40 | |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 41 | extern struct outer_cache_fns outer_cache; |
| 42 | |
Rob Herring | 0b53c11 | 2013-08-17 20:12:57 -0500 | [diff] [blame] | 43 | #ifdef CONFIG_OUTER_CACHE |
Russell King | bc4f94d | 2014-03-16 10:52:55 +0000 | [diff] [blame] | 44 | /** |
| 45 | * outer_inv_range - invalidate range of outer cache lines |
| 46 | * @start: starting physical address, inclusive |
| 47 | * @end: end physical address, exclusive |
| 48 | */ |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 49 | static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 50 | { |
| 51 | if (outer_cache.inv_range) |
| 52 | outer_cache.inv_range(start, end); |
| 53 | } |
Russell King | bc4f94d | 2014-03-16 10:52:55 +0000 | [diff] [blame] | 54 | |
| 55 | /** |
| 56 | * outer_clean_range - clean dirty outer cache lines |
| 57 | * @start: starting physical address, inclusive |
| 58 | * @end: end physical address, exclusive |
| 59 | */ |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 60 | static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 61 | { |
| 62 | if (outer_cache.clean_range) |
| 63 | outer_cache.clean_range(start, end); |
| 64 | } |
Russell King | bc4f94d | 2014-03-16 10:52:55 +0000 | [diff] [blame] | 65 | |
| 66 | /** |
| 67 | * outer_flush_range - clean and invalidate outer cache lines |
| 68 | * @start: starting physical address, inclusive |
| 69 | * @end: end physical address, exclusive |
| 70 | */ |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 71 | static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 72 | { |
| 73 | if (outer_cache.flush_range) |
| 74 | outer_cache.flush_range(start, end); |
| 75 | } |
| 76 | |
Russell King | bc4f94d | 2014-03-16 10:52:55 +0000 | [diff] [blame] | 77 | /** |
| 78 | * outer_flush_all - clean and invalidate all cache lines in the outer cache |
| 79 | * |
| 80 | * Note: depending on implementation, this may not be atomic - it must |
| 81 | * only be called with interrupts disabled and no other active outer |
| 82 | * cache masters. |
| 83 | * |
| 84 | * It is intended that this function is only used by implementations |
| 85 | * needing to override the outer_cache.disable() method due to security. |
| 86 | * (Some implementations perform this as a clean followed by an invalidate.) |
| 87 | */ |
Thomas Gleixner | ae360a7 | 2010-07-31 21:06:06 +0530 | [diff] [blame] | 88 | static inline void outer_flush_all(void) |
| 89 | { |
| 90 | if (outer_cache.flush_all) |
| 91 | outer_cache.flush_all(); |
| 92 | } |
| 93 | |
Russell King | bc4f94d | 2014-03-16 10:52:55 +0000 | [diff] [blame] | 94 | /** |
| 95 | * outer_disable - clean, invalidate and disable the outer cache |
| 96 | * |
| 97 | * Disable the outer cache, ensuring that any data contained in the outer |
| 98 | * cache is pushed out to lower levels of system memory. The note and |
| 99 | * conditions above concerning outer_flush_all() applies here. |
| 100 | */ |
Russell King | 1f1d5b7 | 2014-03-16 13:14:38 +0000 | [diff] [blame] | 101 | extern void outer_disable(void); |
Thomas Gleixner | ae360a7 | 2010-07-31 21:06:06 +0530 | [diff] [blame] | 102 | |
Russell King | bc4f94d | 2014-03-16 10:52:55 +0000 | [diff] [blame] | 103 | /** |
| 104 | * outer_resume - restore the cache configuration and re-enable outer cache |
| 105 | * |
| 106 | * Restore any configuration that the cache had when previously enabled, |
| 107 | * and re-enable the outer cache. |
| 108 | */ |
Barry Song | 91c2ebb | 2011-09-30 14:43:12 +0100 | [diff] [blame] | 109 | static inline void outer_resume(void) |
| 110 | { |
| 111 | if (outer_cache.resume) |
| 112 | outer_cache.resume(); |
| 113 | } |
| 114 | |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 115 | #else |
| 116 | |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 117 | static inline void outer_inv_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 118 | { } |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 119 | static inline void outer_clean_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 120 | { } |
Will Deacon | ad6b9c9 | 2011-02-15 12:41:49 +0100 | [diff] [blame] | 121 | static inline void outer_flush_range(phys_addr_t start, phys_addr_t end) |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 122 | { } |
Thomas Gleixner | ae360a7 | 2010-07-31 21:06:06 +0530 | [diff] [blame] | 123 | static inline void outer_flush_all(void) { } |
Thomas Gleixner | ae360a7 | 2010-07-31 21:06:06 +0530 | [diff] [blame] | 124 | static inline void outer_disable(void) { } |
Barry Song | 4e79a62 | 2013-02-04 07:46:57 +0100 | [diff] [blame] | 125 | static inline void outer_resume(void) { } |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 126 | |
| 127 | #endif |
| 128 | |
Catalin Marinas | 319f551 | 2010-03-24 16:47:53 +0100 | [diff] [blame] | 129 | #ifdef CONFIG_OUTER_CACHE_SYNC |
Russell King | bc4f94d | 2014-03-16 10:52:55 +0000 | [diff] [blame] | 130 | /** |
| 131 | * outer_sync - perform a sync point for outer cache |
| 132 | * |
| 133 | * Ensure that all outer cache operations are complete and any store |
| 134 | * buffers are drained. |
| 135 | */ |
Catalin Marinas | 319f551 | 2010-03-24 16:47:53 +0100 | [diff] [blame] | 136 | static inline void outer_sync(void) |
| 137 | { |
| 138 | if (outer_cache.sync) |
| 139 | outer_cache.sync(); |
| 140 | } |
| 141 | #else |
| 142 | static inline void outer_sync(void) |
| 143 | { } |
| 144 | #endif |
| 145 | |
Catalin Marinas | 33f663f | 2010-03-24 16:46:52 +0100 | [diff] [blame] | 146 | #endif /* __ASM_OUTERCACHE_H */ |