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Tomi Valkeinen559d6702009-11-03 11:23:50 +02001/*
Tomi Valkeinen559d6702009-11-03 11:23:50 +02002 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030018#ifndef __OMAP_OMAPDSS_H
19#define __OMAP_OMAPDSS_H
Tomi Valkeinen559d6702009-11-03 11:23:50 +020020
21#include <linux/list.h>
22#include <linux/kobject.h>
23#include <linux/device.h>
Tomi Valkeinen348be692012-11-07 18:17:35 +020024#include <linux/interrupt.h>
Tomi Valkeinen559d6702009-11-03 11:23:50 +020025
Tomi Valkeinen6fcd4852013-05-10 13:02:32 +030026#include <video/videomode.h>
27
Tomi Valkeinen559d6702009-11-03 11:23:50 +020028#define DISPC_IRQ_FRAMEDONE (1 << 0)
29#define DISPC_IRQ_VSYNC (1 << 1)
30#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
31#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
32#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
33#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
34#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
35#define DISPC_IRQ_GFX_END_WIN (1 << 7)
36#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
37#define DISPC_IRQ_OCP_ERR (1 << 9)
38#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
39#define DISPC_IRQ_VID1_END_WIN (1 << 11)
40#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
41#define DISPC_IRQ_VID2_END_WIN (1 << 13)
42#define DISPC_IRQ_SYNC_LOST (1 << 14)
43#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
44#define DISPC_IRQ_WAKEUP (1 << 16)
Sumit Semwal2a205f32010-12-02 11:27:12 +000045#define DISPC_IRQ_SYNC_LOST2 (1 << 17)
46#define DISPC_IRQ_VSYNC2 (1 << 18)
Archit Tanejab8c095b2011-09-13 18:20:33 +053047#define DISPC_IRQ_VID3_END_WIN (1 << 19)
48#define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
Sumit Semwal2a205f32010-12-02 11:27:12 +000049#define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
50#define DISPC_IRQ_FRAMEDONE2 (1 << 22)
Tomi Valkeinen7f6f3c42011-08-31 13:39:03 +030051#define DISPC_IRQ_FRAMEDONEWB (1 << 23)
52#define DISPC_IRQ_FRAMEDONETV (1 << 24)
53#define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
Chandrabhanu Mahapatra14d33d32012-08-27 14:23:19 +053054#define DISPC_IRQ_SYNC_LOST3 (1 << 27)
55#define DISPC_IRQ_VSYNC3 (1 << 28)
56#define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
57#define DISPC_IRQ_FRAMEDONE3 (1 << 30)
Tomi Valkeinen559d6702009-11-03 11:23:50 +020058
59struct omap_dss_device;
60struct omap_overlay_manager;
Tomi Valkeinena97a9632012-10-24 13:52:40 +030061struct dss_lcd_mgr_config;
Ricardo Neri9c0b8422012-03-06 18:20:37 -060062struct snd_aes_iec958;
63struct snd_cea_861_aud_if;
Tomi Valkeinen559d6702009-11-03 11:23:50 +020064
65enum omap_display_type {
66 OMAP_DISPLAY_TYPE_NONE = 0,
67 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
68 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
69 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
70 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
71 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
Mythri P Kb1196012011-03-08 17:15:54 +053072 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
Tomi Valkeinenbc24b8b2013-05-13 13:40:33 +030073 OMAP_DISPLAY_TYPE_DVI = 1 << 6,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020074};
75
76enum omap_plane {
77 OMAP_DSS_GFX = 0,
78 OMAP_DSS_VIDEO1 = 1,
Archit Tanejab8c095b2011-09-13 18:20:33 +053079 OMAP_DSS_VIDEO2 = 2,
80 OMAP_DSS_VIDEO3 = 3,
Tomi Valkeinen66a0f9e2012-08-22 16:57:02 +030081 OMAP_DSS_WB = 4,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020082};
83
84enum omap_channel {
85 OMAP_DSS_CHANNEL_LCD = 0,
86 OMAP_DSS_CHANNEL_DIGIT = 1,
Sumit Semwal8613b002010-12-02 11:27:09 +000087 OMAP_DSS_CHANNEL_LCD2 = 2,
Chandrabhanu Mahapatraff6331e2012-06-19 15:08:16 +053088 OMAP_DSS_CHANNEL_LCD3 = 3,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020089};
90
91enum omap_color_mode {
92 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
93 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
94 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
95 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
96 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
97 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
98 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
99 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
100 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
101 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
102 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
103 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
104 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
105 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
Amber Jainf20e4222011-05-19 19:47:50 +0530106 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
107 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
108 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
109 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
110 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200111};
112
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200113enum omap_dss_load_mode {
114 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
115 OMAP_DSS_LOAD_CLUT_ONLY = 1,
116 OMAP_DSS_LOAD_FRAME_ONLY = 2,
117 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
118};
119
120enum omap_dss_trans_key_type {
121 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
122 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
123};
124
125enum omap_rfbi_te_mode {
126 OMAP_DSS_RFBI_TE_MODE_1 = 1,
127 OMAP_DSS_RFBI_TE_MODE_2 = 2,
128};
129
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530130enum omap_dss_signal_level {
131 OMAPDSS_SIG_ACTIVE_HIGH = 0,
132 OMAPDSS_SIG_ACTIVE_LOW = 1,
133};
134
135enum omap_dss_signal_edge {
136 OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
137 OMAPDSS_DRIVE_SIG_RISING_EDGE,
138 OMAPDSS_DRIVE_SIG_FALLING_EDGE,
139};
140
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200141enum omap_dss_venc_type {
142 OMAP_DSS_VENC_TYPE_COMPOSITE,
143 OMAP_DSS_VENC_TYPE_SVIDEO,
144};
145
Archit Tanejaa3b3cc22011-09-08 18:42:16 +0530146enum omap_dss_dsi_pixel_format {
147 OMAP_DSS_DSI_FMT_RGB888,
148 OMAP_DSS_DSI_FMT_RGB666,
149 OMAP_DSS_DSI_FMT_RGB666_PACKED,
150 OMAP_DSS_DSI_FMT_RGB565,
151};
152
Archit Taneja7e951ee2011-07-22 12:45:04 +0530153enum omap_dss_dsi_mode {
154 OMAP_DSS_DSI_CMD_MODE = 0,
155 OMAP_DSS_DSI_VIDEO_MODE,
156};
157
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200158enum omap_display_caps {
159 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
160 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
161};
162
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200163enum omap_dss_display_state {
164 OMAP_DSS_DISPLAY_DISABLED = 0,
165 OMAP_DSS_DISPLAY_ACTIVE,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200166};
167
Ricardo Neri9c0b8422012-03-06 18:20:37 -0600168enum omap_dss_audio_state {
169 OMAP_DSS_AUDIO_DISABLED = 0,
170 OMAP_DSS_AUDIO_ENABLED,
171 OMAP_DSS_AUDIO_CONFIGURED,
172 OMAP_DSS_AUDIO_PLAYING,
173};
174
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300175struct omap_dss_audio {
176 struct snd_aes_iec958 *iec;
177 struct snd_cea_861_aud_if *cea;
178};
179
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200180enum omap_dss_rotation_type {
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530181 OMAP_DSS_ROT_DMA = 1 << 0,
182 OMAP_DSS_ROT_VRFB = 1 << 1,
183 OMAP_DSS_ROT_TILER = 1 << 2,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200184};
185
186/* clockwise rotation angle */
187enum omap_dss_rotation_angle {
188 OMAP_DSS_ROT_0 = 0,
189 OMAP_DSS_ROT_90 = 1,
190 OMAP_DSS_ROT_180 = 2,
191 OMAP_DSS_ROT_270 = 3,
192};
193
194enum omap_overlay_caps {
195 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
Tomi Valkeinenf6dc8152011-08-15 15:18:20 +0300196 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
197 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
Archit Taneja11354dd2011-09-26 11:47:29 +0530198 OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
Archit Tanejad79db852012-09-22 12:30:17 +0530199 OMAP_DSS_OVL_CAP_POS = 1 << 4,
200 OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200201};
202
203enum omap_overlay_manager_caps {
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300204 OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200205};
206
Archit Taneja89a35e52011-04-12 13:52:23 +0530207enum omap_dss_clk_source {
208 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
209 * OMAP4: DSS_FCLK */
210 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
211 * OMAP4: PLL1_CLK1 */
212 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
213 * OMAP4: PLL1_CLK2 */
Archit Taneja5a8b5722011-05-12 17:26:29 +0530214 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
215 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
Archit Taneja89a35e52011-04-12 13:52:23 +0530216};
217
Mythri P K9a901682012-01-02 14:02:38 +0530218enum omap_hdmi_flags {
219 OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
220};
221
Archit Taneja484dc402012-09-07 17:38:00 +0530222enum omap_dss_output_id {
223 OMAP_DSS_OUTPUT_DPI = 1 << 0,
224 OMAP_DSS_OUTPUT_DBI = 1 << 1,
225 OMAP_DSS_OUTPUT_SDI = 1 << 2,
226 OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
227 OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
228 OMAP_DSS_OUTPUT_VENC = 1 << 5,
229 OMAP_DSS_OUTPUT_HDMI = 1 << 6,
230};
231
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200232/* RFBI */
233
234struct rfbi_timings {
235 int cs_on_time;
236 int cs_off_time;
237 int we_on_time;
238 int we_off_time;
239 int re_on_time;
240 int re_off_time;
241 int we_cycle_time;
242 int re_cycle_time;
243 int cs_pulse_width;
244 int access_time;
245
246 int clk_div;
247
248 u32 tim[5]; /* set by rfbi_convert_timings() */
249
250 int converted;
251};
252
253void omap_rfbi_write_command(const void *buf, u32 len);
254void omap_rfbi_read_data(void *buf, u32 len);
255void omap_rfbi_write_data(const void *buf, u32 len);
256void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
257 u16 x, u16 y,
258 u16 w, u16 h);
259int omap_rfbi_enable_te(bool enable, unsigned line);
260int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
261 unsigned hs_pulse_time, unsigned vs_pulse_time,
262 int hs_pol_inv, int vs_pol_inv, int extif_div);
Tomi Valkeinen773139f2011-04-21 19:50:31 +0300263void rfbi_bus_lock(void);
264void rfbi_bus_unlock(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200265
266/* DSI */
Archit Taneja8af6ff02011-09-05 16:48:27 +0530267
Tomi Valkeinen478d7df2013-03-05 16:29:36 +0200268enum omap_dss_dsi_trans_mode {
269 /* Sync Pulses: both sync start and end packets sent */
270 OMAP_DSS_DSI_PULSE_MODE,
271 /* Sync Events: only sync start packets sent */
272 OMAP_DSS_DSI_EVENT_MODE,
273 /* Burst: only sync start packets sent, pixels are time compressed */
274 OMAP_DSS_DSI_BURST_MODE,
275};
276
Archit Taneja6b8493752012-08-13 22:12:24 +0530277struct omap_dss_dsi_videomode_timings {
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200278 unsigned long hsclk;
279
280 unsigned ndl;
281 unsigned bitspp;
282
283 /* pixels */
284 u16 hact;
285 /* lines */
286 u16 vact;
287
Archit Taneja8af6ff02011-09-05 16:48:27 +0530288 /* DSI video mode blanking data */
289 /* Unit: byte clock cycles */
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200290 u16 hss;
Archit Taneja8af6ff02011-09-05 16:48:27 +0530291 u16 hsa;
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200292 u16 hse;
Archit Taneja8af6ff02011-09-05 16:48:27 +0530293 u16 hfp;
294 u16 hbp;
295 /* Unit: line clocks */
296 u16 vsa;
297 u16 vfp;
298 u16 vbp;
299
300 /* DSI blanking modes */
301 int blanking_mode;
302 int hsa_blanking_mode;
303 int hbp_blanking_mode;
304 int hfp_blanking_mode;
305
Tomi Valkeinen478d7df2013-03-05 16:29:36 +0200306 enum omap_dss_dsi_trans_mode trans_mode;
Archit Taneja8af6ff02011-09-05 16:48:27 +0530307
308 bool ddr_clk_always_on;
309 int window_sync;
310};
311
Tomi Valkeinen777f05c2013-03-06 11:10:29 +0200312struct omap_dss_dsi_config {
313 enum omap_dss_dsi_mode mode;
314 enum omap_dss_dsi_pixel_format pixel_format;
315 const struct omap_video_timings *timings;
Tomi Valkeinen777f05c2013-03-06 11:10:29 +0200316
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200317 unsigned long hs_clk_min, hs_clk_max;
318 unsigned long lp_clk_min, lp_clk_max;
319
320 bool ddr_clk_always_on;
321 enum omap_dss_dsi_trans_mode trans_mode;
Tomi Valkeinen777f05c2013-03-06 11:10:29 +0200322};
323
Archit Taneja1ffefe72011-05-12 17:26:24 +0530324void dsi_bus_lock(struct omap_dss_device *dssdev);
325void dsi_bus_unlock(struct omap_dss_device *dssdev);
326int dsi_vc_dcs_write(struct omap_dss_device *dssdev, int channel, u8 *data,
327 int len);
Archit Taneja6ff8aa32011-08-25 18:35:58 +0530328int dsi_vc_generic_write(struct omap_dss_device *dssdev, int channel, u8 *data,
329 int len);
330int dsi_vc_dcs_write_0(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd);
331int dsi_vc_generic_write_0(struct omap_dss_device *dssdev, int channel);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530332int dsi_vc_dcs_write_1(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
333 u8 param);
Archit Taneja6ff8aa32011-08-25 18:35:58 +0530334int dsi_vc_generic_write_1(struct omap_dss_device *dssdev, int channel,
335 u8 param);
336int dsi_vc_generic_write_2(struct omap_dss_device *dssdev, int channel,
337 u8 param1, u8 param2);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530338int dsi_vc_dcs_write_nosync(struct omap_dss_device *dssdev, int channel,
339 u8 *data, int len);
Archit Taneja6ff8aa32011-08-25 18:35:58 +0530340int dsi_vc_generic_write_nosync(struct omap_dss_device *dssdev, int channel,
341 u8 *data, int len);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530342int dsi_vc_dcs_read(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
343 u8 *buf, int buflen);
Archit Tanejab3b89c02011-08-30 16:07:39 +0530344int dsi_vc_generic_read_0(struct omap_dss_device *dssdev, int channel, u8 *buf,
345 int buflen);
346int dsi_vc_generic_read_1(struct omap_dss_device *dssdev, int channel, u8 param,
347 u8 *buf, int buflen);
348int dsi_vc_generic_read_2(struct omap_dss_device *dssdev, int channel,
349 u8 param1, u8 param2, u8 *buf, int buflen);
Archit Taneja1ffefe72011-05-12 17:26:24 +0530350int dsi_vc_set_max_rx_packet_size(struct omap_dss_device *dssdev, int channel,
351 u16 len);
352int dsi_vc_send_null(struct omap_dss_device *dssdev, int channel);
353int dsi_vc_send_bta_sync(struct omap_dss_device *dssdev, int channel);
Tomi Valkeinen9a147a62011-11-09 15:30:11 +0200354int dsi_enable_video_output(struct omap_dss_device *dssdev, int channel);
355void dsi_disable_video_output(struct omap_dss_device *dssdev, int channel);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200356
Tomi Valkeinenacd18af2012-09-28 12:42:28 +0300357enum omapdss_version {
358 OMAPDSS_VER_UNKNOWN = 0,
359 OMAPDSS_VER_OMAP24xx,
360 OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
361 OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
362 OMAPDSS_VER_OMAP3630,
363 OMAPDSS_VER_AM35xx,
364 OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
365 OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
366 OMAPDSS_VER_OMAP4, /* All other OMAP4s */
367 OMAPDSS_VER_OMAP5,
368};
369
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200370/* Board specific data */
371struct omap_dss_board_info {
Tomi Valkeinenaac927c2011-05-23 15:46:54 +0300372 int (*get_context_loss_count)(struct device *dev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200373 int num_devices;
374 struct omap_dss_device **devices;
375 struct omap_dss_device *default_device;
Tomi Valkeinen0a200122012-11-16 14:59:56 +0200376 const char *default_display_name;
Tomi Valkeinen5bc416c2011-06-15 15:21:12 +0300377 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
378 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
Tomi Valkeinen62c1dcf2012-03-08 12:37:58 +0200379 int (*set_min_bus_tput)(struct device *dev, unsigned long r);
Tomi Valkeinenacd18af2012-09-28 12:42:28 +0300380 enum omapdss_version version;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200381};
382
Sumit Semwalb7ee79a2011-01-24 06:21:54 +0000383/* Init with the board info */
384extern int omap_display_init(struct omap_dss_board_info *board_data);
Mythri P Kee9dfd82012-01-02 14:02:37 +0530385/* HDMI mux init*/
Mythri P K9a901682012-01-02 14:02:38 +0530386extern int omap_hdmi_init(enum omap_hdmi_flags flags);
Sumit Semwalb7ee79a2011-01-24 06:21:54 +0000387
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200388struct omap_video_timings {
389 /* Unit: pixels */
390 u16 x_res;
391 /* Unit: pixels */
392 u16 y_res;
393 /* Unit: KHz */
394 u32 pixel_clock;
395 /* Unit: pixel clocks */
396 u16 hsw; /* Horizontal synchronization pulse width */
397 /* Unit: pixel clocks */
398 u16 hfp; /* Horizontal front porch */
399 /* Unit: pixel clocks */
400 u16 hbp; /* Horizontal back porch */
401 /* Unit: line clocks */
402 u16 vsw; /* Vertical synchronization pulse width */
403 /* Unit: line clocks */
404 u16 vfp; /* Vertical front porch */
405 /* Unit: line clocks */
406 u16 vbp; /* Vertical back porch */
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530407
408 /* Vsync logic level */
409 enum omap_dss_signal_level vsync_level;
410 /* Hsync logic level */
411 enum omap_dss_signal_level hsync_level;
Archit Taneja23c8f882012-06-28 11:15:51 +0530412 /* Interlaced or Progressive timings */
413 bool interlace;
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530414 /* Pixel clock edge to drive LCD data */
415 enum omap_dss_signal_edge data_pclk_edge;
416 /* Data enable logic level */
417 enum omap_dss_signal_level de_level;
418 /* Pixel clock edges to drive HSYNC and VSYNC signals */
419 enum omap_dss_signal_edge sync_pclk_edge;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200420};
421
422#ifdef CONFIG_OMAP2_DSS_VENC
423/* Hardcoded timings for tv modes. Venc only uses these to
424 * identify the mode, and does not actually use the configs
425 * itself. However, the configs should be something that
426 * a normal monitor can also show */
Tobias Klauser5a1819e2010-05-20 17:12:52 +0200427extern const struct omap_video_timings omap_dss_pal_timings;
428extern const struct omap_video_timings omap_dss_ntsc_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200429#endif
430
Tomi Valkeinen3c07cae2011-06-21 09:34:30 +0300431struct omap_dss_cpr_coefs {
432 s16 rr, rg, rb;
433 s16 gr, gg, gb;
434 s16 br, bg, bb;
435};
436
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200437struct omap_overlay_info {
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200438 u32 paddr;
Amber Jain0d66cbb2011-05-19 19:47:54 +0530439 u32 p_uv_addr; /* for NV12 format */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200440 u16 screen_width;
441 u16 width;
442 u16 height;
443 enum omap_color_mode color_mode;
444 u8 rotation;
445 enum omap_dss_rotation_type rotation_type;
446 bool mirror;
447
448 u16 pos_x;
449 u16 pos_y;
450 u16 out_width; /* if 0, out_width == width */
451 u16 out_height; /* if 0, out_height == height */
452 u8 global_alpha;
Rajkumar Nfd28a392010-11-04 12:28:42 +0100453 u8 pre_mult_alpha;
Archit Taneja54128702011-09-08 11:29:17 +0530454 u8 zorder;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200455};
456
457struct omap_overlay {
458 struct kobject kobj;
459 struct list_head list;
460
461 /* static fields */
462 const char *name;
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300463 enum omap_plane id;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200464 enum omap_color_mode supported_modes;
465 enum omap_overlay_caps caps;
466
467 /* dynamic fields */
468 struct omap_overlay_manager *manager;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200469
Tomi Valkeinen9d11c322011-11-18 12:38:38 +0200470 /*
471 * The following functions do not block:
472 *
473 * is_enabled
474 * set_overlay_info
475 * get_overlay_info
476 *
477 * The rest of the functions may block and cannot be called from
478 * interrupt context
479 */
480
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200481 int (*enable)(struct omap_overlay *ovl);
482 int (*disable)(struct omap_overlay *ovl);
483 bool (*is_enabled)(struct omap_overlay *ovl);
484
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200485 int (*set_manager)(struct omap_overlay *ovl,
486 struct omap_overlay_manager *mgr);
487 int (*unset_manager)(struct omap_overlay *ovl);
488
489 int (*set_overlay_info)(struct omap_overlay *ovl,
490 struct omap_overlay_info *info);
491 void (*get_overlay_info)(struct omap_overlay *ovl,
492 struct omap_overlay_info *info);
493
494 int (*wait_for_go)(struct omap_overlay *ovl);
Archit Taneja794bc4e2012-09-07 17:44:51 +0530495
496 struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200497};
498
499struct omap_overlay_manager_info {
500 u32 default_color;
501
502 enum omap_dss_trans_key_type trans_key_type;
503 u32 trans_key;
504 bool trans_enabled;
505
Archit Taneja11354dd2011-09-26 11:47:29 +0530506 bool partial_alpha_enabled;
Tomi Valkeinen3c07cae2011-06-21 09:34:30 +0300507
508 bool cpr_enable;
509 struct omap_dss_cpr_coefs cpr_coefs;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200510};
511
512struct omap_overlay_manager {
513 struct kobject kobj;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200514
515 /* static fields */
516 const char *name;
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300517 enum omap_channel id;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200518 enum omap_overlay_manager_caps caps;
Tomi Valkeinen07e327c2011-11-05 10:59:59 +0200519 struct list_head overlays;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200520 enum omap_display_type supported_displays;
Archit Taneja97f01b32012-09-26 16:42:39 +0530521 enum omap_dss_output_id supported_outputs;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200522
523 /* dynamic fields */
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300524 struct omap_dss_device *output;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200525
Tomi Valkeinen9d11c322011-11-18 12:38:38 +0200526 /*
527 * The following functions do not block:
528 *
529 * set_manager_info
530 * get_manager_info
531 * apply
532 *
533 * The rest of the functions may block and cannot be called from
534 * interrupt context
535 */
536
Archit Taneja97f01b32012-09-26 16:42:39 +0530537 int (*set_output)(struct omap_overlay_manager *mgr,
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300538 struct omap_dss_device *output);
Archit Taneja97f01b32012-09-26 16:42:39 +0530539 int (*unset_output)(struct omap_overlay_manager *mgr);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200540
541 int (*set_manager_info)(struct omap_overlay_manager *mgr,
542 struct omap_overlay_manager_info *info);
543 void (*get_manager_info)(struct omap_overlay_manager *mgr,
544 struct omap_overlay_manager_info *info);
545
546 int (*apply)(struct omap_overlay_manager *mgr);
547 int (*wait_for_go)(struct omap_overlay_manager *mgr);
Tomi Valkeinen3f71cbe2010-01-08 17:06:04 +0200548 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
Archit Taneja794bc4e2012-09-07 17:44:51 +0530549
550 struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200551};
552
Tomi Valkeinene4a9e942012-03-28 15:58:56 +0300553/* 22 pins means 1 clk lane and 10 data lanes */
554#define OMAP_DSS_MAX_DSI_PINS 22
555
556struct omap_dsi_pin_config {
557 int num_pins;
558 /*
559 * pin numbers in the following order:
560 * clk+, clk-
561 * data1+, data1-
562 * data2+, data2-
563 * ...
564 */
565 int pins[OMAP_DSS_MAX_DSI_PINS];
566};
567
Archit Taneja749feff2012-08-31 12:32:52 +0530568struct omap_dss_writeback_info {
569 u32 paddr;
570 u32 p_uv_addr;
571 u16 buf_width;
572 u16 width;
573 u16 height;
574 enum omap_color_mode color_mode;
575 u8 rotation;
576 enum omap_dss_rotation_type rotation_type;
577 bool mirror;
578 u8 pre_mult_alpha;
579};
580
Tomi Valkeinen0b24edb2013-05-24 13:18:52 +0300581struct omapdss_dpi_ops {
582 int (*connect)(struct omap_dss_device *dssdev,
583 struct omap_dss_device *dst);
584 void (*disconnect)(struct omap_dss_device *dssdev,
585 struct omap_dss_device *dst);
586
587 int (*enable)(struct omap_dss_device *dssdev);
588 void (*disable)(struct omap_dss_device *dssdev);
589
590 int (*check_timings)(struct omap_dss_device *dssdev,
591 struct omap_video_timings *timings);
592 void (*set_timings)(struct omap_dss_device *dssdev,
593 struct omap_video_timings *timings);
594 void (*get_timings)(struct omap_dss_device *dssdev,
595 struct omap_video_timings *timings);
596
597 void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
598};
599
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300600struct omapdss_sdi_ops {
601 int (*connect)(struct omap_dss_device *dssdev,
602 struct omap_dss_device *dst);
603 void (*disconnect)(struct omap_dss_device *dssdev,
604 struct omap_dss_device *dst);
605
606 int (*enable)(struct omap_dss_device *dssdev);
607 void (*disable)(struct omap_dss_device *dssdev);
608
609 int (*check_timings)(struct omap_dss_device *dssdev,
610 struct omap_video_timings *timings);
611 void (*set_timings)(struct omap_dss_device *dssdev,
612 struct omap_video_timings *timings);
613 void (*get_timings)(struct omap_dss_device *dssdev,
614 struct omap_video_timings *timings);
615
616 void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
617};
618
Tomi Valkeinen7700c2d2013-05-24 13:19:30 +0300619struct omapdss_dvi_ops {
620 int (*connect)(struct omap_dss_device *dssdev,
621 struct omap_dss_device *dst);
622 void (*disconnect)(struct omap_dss_device *dssdev,
623 struct omap_dss_device *dst);
624
625 int (*enable)(struct omap_dss_device *dssdev);
626 void (*disable)(struct omap_dss_device *dssdev);
627
628 int (*check_timings)(struct omap_dss_device *dssdev,
629 struct omap_video_timings *timings);
630 void (*set_timings)(struct omap_dss_device *dssdev,
631 struct omap_video_timings *timings);
632 void (*get_timings)(struct omap_dss_device *dssdev,
633 struct omap_video_timings *timings);
634};
635
Tomi Valkeinenfb8efa42013-05-24 13:19:50 +0300636struct omapdss_atv_ops {
637 int (*connect)(struct omap_dss_device *dssdev,
638 struct omap_dss_device *dst);
639 void (*disconnect)(struct omap_dss_device *dssdev,
640 struct omap_dss_device *dst);
641
642 int (*enable)(struct omap_dss_device *dssdev);
643 void (*disable)(struct omap_dss_device *dssdev);
644
645 int (*check_timings)(struct omap_dss_device *dssdev,
646 struct omap_video_timings *timings);
647 void (*set_timings)(struct omap_dss_device *dssdev,
648 struct omap_video_timings *timings);
649 void (*get_timings)(struct omap_dss_device *dssdev,
650 struct omap_video_timings *timings);
651
652 void (*set_type)(struct omap_dss_device *dssdev,
653 enum omap_dss_venc_type type);
654 void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
655 bool invert_polarity);
656
657 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
658 u32 (*get_wss)(struct omap_dss_device *dssdev);
659};
660
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300661struct omapdss_hdmi_ops {
662 int (*connect)(struct omap_dss_device *dssdev,
663 struct omap_dss_device *dst);
664 void (*disconnect)(struct omap_dss_device *dssdev,
665 struct omap_dss_device *dst);
666
667 int (*enable)(struct omap_dss_device *dssdev);
668 void (*disable)(struct omap_dss_device *dssdev);
669
670 int (*check_timings)(struct omap_dss_device *dssdev,
671 struct omap_video_timings *timings);
672 void (*set_timings)(struct omap_dss_device *dssdev,
673 struct omap_video_timings *timings);
674 void (*get_timings)(struct omap_dss_device *dssdev,
675 struct omap_video_timings *timings);
676
677 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
678 bool (*detect)(struct omap_dss_device *dssdev);
679
680 /*
681 * Note: These functions might sleep. Do not call while
682 * holding a spinlock/readlock.
683 */
684 int (*audio_enable)(struct omap_dss_device *dssdev);
685 void (*audio_disable)(struct omap_dss_device *dssdev);
686 bool (*audio_supported)(struct omap_dss_device *dssdev);
687 int (*audio_config)(struct omap_dss_device *dssdev,
688 struct omap_dss_audio *audio);
689 /* Note: These functions may not sleep */
690 int (*audio_start)(struct omap_dss_device *dssdev);
691 void (*audio_stop)(struct omap_dss_device *dssdev);
692};
693
Tomi Valkeinendeb16df2013-05-24 13:20:27 +0300694struct omapdss_dsi_ops {
695 int (*connect)(struct omap_dss_device *dssdev,
696 struct omap_dss_device *dst);
697 void (*disconnect)(struct omap_dss_device *dssdev,
698 struct omap_dss_device *dst);
699
700 int (*enable)(struct omap_dss_device *dssdev);
701 void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
702 bool enter_ulps);
703
704 /* bus configuration */
705 int (*set_config)(struct omap_dss_device *dssdev,
706 const struct omap_dss_dsi_config *cfg);
707 int (*configure_pins)(struct omap_dss_device *dssdev,
708 const struct omap_dsi_pin_config *pin_cfg);
709
710 void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
711 bool enable);
712 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
713
714 int (*update)(struct omap_dss_device *dssdev, int channel,
715 void (*callback)(int, void *), void *data);
716
717 void (*bus_lock)(struct omap_dss_device *dssdev);
718 void (*bus_unlock)(struct omap_dss_device *dssdev);
719
720 int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
721 void (*disable_video_output)(struct omap_dss_device *dssdev,
722 int channel);
723
724 int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
725 int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
726 int vc_id);
727 void (*release_vc)(struct omap_dss_device *dssdev, int channel);
728
729 /* data transfer */
730 int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
731 u8 *data, int len);
732 int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
733 u8 *data, int len);
734 int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
735 u8 *data, int len);
736
737 int (*gen_write)(struct omap_dss_device *dssdev, int channel,
738 u8 *data, int len);
739 int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
740 u8 *data, int len);
741 int (*gen_read)(struct omap_dss_device *dssdev, int channel,
742 u8 *reqdata, int reqlen,
743 u8 *data, int len);
744
745 int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
746
747 int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
748 int channel, u16 plen);
749};
750
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200751struct omap_dss_device {
Tomi Valkeinenecc8b372013-02-14 14:17:28 +0200752 /* old device, to be removed */
753 struct device old_dev;
754
755 /* new device, pointer to panel device */
756 struct device *dev;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200757
Tomi Valkeinen4f3e44e2013-05-03 11:35:43 +0300758 struct module *owner;
759
Tomi Valkeinen2e7e3dc2012-11-16 15:45:26 +0200760 struct list_head panel_list;
761
762 /* alias in the form of "display%d" */
763 char alias[16];
764
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200765 enum omap_display_type type;
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300766 enum omap_display_type output_type;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200767
Tomi Valkeinen2eea5ae2013-02-13 11:23:54 +0200768 /* obsolete, to be removed */
Sumit Semwal18faa1b2010-12-02 11:27:14 +0000769 enum omap_channel channel;
770
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200771 union {
772 struct {
773 u8 data_lines;
774 } dpi;
775
776 struct {
777 u8 channel;
778 u8 data_lines;
779 } rfbi;
780
781 struct {
782 u8 datapairs;
783 } sdi;
784
785 struct {
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530786 int module;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200787 } dsi;
788
789 struct {
790 enum omap_dss_venc_type type;
791 bool invert_polarity;
792 } venc;
793 } phy;
794
795 struct {
796 struct omap_video_timings timings;
797
Archit Tanejaa3b3cc22011-09-08 18:42:16 +0530798 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
Archit Taneja7e951ee2011-07-22 12:45:04 +0530799 enum omap_dss_dsi_mode dsi_mode;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200800 } panel;
801
802 struct {
803 u8 pixel_size;
804 struct rfbi_timings rfbi_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200805 } ctrl;
806
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200807 const char *name;
808
809 /* used to match device to driver */
810 const char *driver_name;
811
812 void *data;
813
814 struct omap_dss_driver *driver;
815
Tomi Valkeinen0b24edb2013-05-24 13:18:52 +0300816 union {
817 const struct omapdss_dpi_ops *dpi;
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300818 const struct omapdss_sdi_ops *sdi;
Tomi Valkeinen7700c2d2013-05-24 13:19:30 +0300819 const struct omapdss_dvi_ops *dvi;
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300820 const struct omapdss_hdmi_ops *hdmi;
Tomi Valkeinenfb8efa42013-05-24 13:19:50 +0300821 const struct omapdss_atv_ops *atv;
Tomi Valkeinendeb16df2013-05-24 13:20:27 +0300822 const struct omapdss_dsi_ops *dsi;
Tomi Valkeinen0b24edb2013-05-24 13:18:52 +0300823 } ops;
824
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200825 /* helper variable for driver suspend/resume */
826 bool activate_after_resume;
827
828 enum omap_display_caps caps;
829
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300830 struct omap_dss_device *output;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200831
832 enum omap_dss_display_state state;
833
Ricardo Neri9c0b8422012-03-06 18:20:37 -0600834 enum omap_dss_audio_state audio_state;
835
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300836 /* OMAP DSS output specific fields */
837
838 struct list_head list;
839
840 /* DISPC channel for this output */
841 enum omap_channel dispc_channel;
842
843 /* output instance */
844 enum omap_dss_output_id id;
845
846 /* dynamic fields */
847 struct omap_overlay_manager *manager;
848
849 struct omap_dss_device *device;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200850};
851
Tomi Valkeinenc49d0052012-01-17 11:09:57 +0200852struct omap_dss_hdmi_data
853{
Tomi Valkeinencca35012012-04-26 14:48:32 +0300854 int ct_cp_hpd_gpio;
855 int ls_oe_gpio;
Tomi Valkeinenc49d0052012-01-17 11:09:57 +0200856 int hpd_gpio;
857};
858
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200859struct omap_dss_driver {
860 struct device_driver driver;
861
862 int (*probe)(struct omap_dss_device *);
863 void (*remove)(struct omap_dss_device *);
864
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300865 int (*connect)(struct omap_dss_device *dssdev);
866 void (*disconnect)(struct omap_dss_device *dssdev);
867
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200868 int (*enable)(struct omap_dss_device *display);
869 void (*disable)(struct omap_dss_device *display);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200870 int (*run_test)(struct omap_dss_device *display, int test);
871
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200872 int (*update)(struct omap_dss_device *dssdev,
873 u16 x, u16 y, u16 w, u16 h);
874 int (*sync)(struct omap_dss_device *dssdev);
875
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200876 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +0200877 int (*get_te)(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200878
879 u8 (*get_rotate)(struct omap_dss_device *dssdev);
880 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
881
882 bool (*get_mirror)(struct omap_dss_device *dssdev);
883 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
884
885 int (*memory_read)(struct omap_dss_device *dssdev,
886 void *buf, size_t size,
887 u16 x, u16 y, u16 w, u16 h);
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200888
889 void (*get_resolution)(struct omap_dss_device *dssdev,
890 u16 *xres, u16 *yres);
Jani Nikula7a0987b2010-06-16 15:26:36 +0300891 void (*get_dimensions)(struct omap_dss_device *dssdev,
892 u32 *width, u32 *height);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200893 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
Tomi Valkeinen36511312010-01-19 15:53:16 +0200894
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200895 int (*check_timings)(struct omap_dss_device *dssdev,
896 struct omap_video_timings *timings);
897 void (*set_timings)(struct omap_dss_device *dssdev,
898 struct omap_video_timings *timings);
899 void (*get_timings)(struct omap_dss_device *dssdev,
900 struct omap_video_timings *timings);
901
Tomi Valkeinen36511312010-01-19 15:53:16 +0200902 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
903 u32 (*get_wss)(struct omap_dss_device *dssdev);
Tomi Valkeinen3d5e0ef2011-08-25 17:10:41 +0300904
905 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
Tomi Valkeinendf4769c2011-08-29 17:26:01 +0300906 bool (*detect)(struct omap_dss_device *dssdev);
Ricardo Neri9c0b8422012-03-06 18:20:37 -0600907
908 /*
909 * For display drivers that support audio. This encompasses
910 * HDMI and DisplayPort at the moment.
911 */
912 /*
913 * Note: These functions might sleep. Do not call while
914 * holding a spinlock/readlock.
915 */
916 int (*audio_enable)(struct omap_dss_device *dssdev);
917 void (*audio_disable)(struct omap_dss_device *dssdev);
918 bool (*audio_supported)(struct omap_dss_device *dssdev);
919 int (*audio_config)(struct omap_dss_device *dssdev,
920 struct omap_dss_audio *audio);
921 /* Note: These functions may not sleep */
922 int (*audio_start)(struct omap_dss_device *dssdev);
923 void (*audio_stop)(struct omap_dss_device *dssdev);
924
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200925};
926
Tomi Valkeinenb2c7d542012-10-18 13:46:29 +0300927enum omapdss_version omapdss_get_version(void);
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300928bool omapdss_is_initialized(void);
Tomi Valkeinenb2c7d542012-10-18 13:46:29 +0300929
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200930int omap_dss_register_driver(struct omap_dss_driver *);
931void omap_dss_unregister_driver(struct omap_dss_driver *);
932
Tomi Valkeinen2e7e3dc2012-11-16 15:45:26 +0200933int omapdss_register_display(struct omap_dss_device *dssdev);
934void omapdss_unregister_display(struct omap_dss_device *dssdev);
935
Tomi Valkeinend35317a2013-05-03 11:40:54 +0300936struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200937void omap_dss_put_device(struct omap_dss_device *dssdev);
938#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
939struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
940struct omap_dss_device *omap_dss_find_device(void *data,
941 int (*match)(struct omap_dss_device *dssdev, void *data));
Tomi Valkeinen2bbcce52012-10-29 12:40:46 +0200942const char *omapdss_get_default_display_name(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200943
Tomi Valkeinen6fcd4852013-05-10 13:02:32 +0300944void videomode_to_omap_video_timings(const struct videomode *vm,
945 struct omap_video_timings *ovt);
946void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
947 struct videomode *vm);
948
Tomi Valkeineneda34272012-11-07 16:26:11 +0200949int dss_feat_get_num_mgrs(void);
950int dss_feat_get_num_ovls(void);
951enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
952enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
953enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
954
955
956
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200957int omap_dss_get_num_overlay_managers(void);
958struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
959
960int omap_dss_get_num_overlays(void);
961struct omap_overlay *omap_dss_get_overlay(int num);
962
Tomi Valkeinen5d47dbc2013-04-24 13:32:51 +0300963int omapdss_register_output(struct omap_dss_device *output);
964void omapdss_unregister_output(struct omap_dss_device *output);
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300965struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
966struct omap_dss_device *omap_dss_find_output(const char *name);
967struct omap_dss_device *omap_dss_find_output_by_node(struct device_node *node);
968int omapdss_output_set_device(struct omap_dss_device *out,
Archit Taneja6d71b922012-08-29 13:30:15 +0530969 struct omap_dss_device *dssdev);
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300970int omapdss_output_unset_device(struct omap_dss_device *out);
Archit Taneja484dc402012-09-07 17:38:00 +0530971
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300972struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300973struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
974
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200975void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
976 u16 *xres, u16 *yres);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200977int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
Grazvydas Ignotas4b6430f2012-03-15 20:00:23 +0200978void omapdss_default_get_timings(struct omap_dss_device *dssdev,
979 struct omap_video_timings *timings);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200980
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200981typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
982int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
983int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
984
Tomi Valkeinen348be692012-11-07 18:17:35 +0200985u32 dispc_read_irqstatus(void);
986void dispc_clear_irqstatus(u32 mask);
987u32 dispc_read_irqenable(void);
988void dispc_write_irqenable(u32 mask);
989
990int dispc_request_irq(irq_handler_t handler, void *dev_id);
991void dispc_free_irq(void *dev_id);
992
993int dispc_runtime_get(void);
994void dispc_runtime_put(void);
995
996void dispc_mgr_enable(enum omap_channel channel, bool enable);
997bool dispc_mgr_is_enabled(enum omap_channel channel);
998u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
999u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
1000u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
1001bool dispc_mgr_go_busy(enum omap_channel channel);
1002void dispc_mgr_go(enum omap_channel channel);
1003void dispc_mgr_set_lcd_config(enum omap_channel channel,
1004 const struct dss_lcd_mgr_config *config);
1005void dispc_mgr_set_timings(enum omap_channel channel,
1006 const struct omap_video_timings *timings);
1007void dispc_mgr_setup(enum omap_channel channel,
1008 const struct omap_overlay_manager_info *info);
1009
1010int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
1011 const struct omap_overlay_info *oi,
1012 const struct omap_video_timings *timings,
1013 int *x_predecim, int *y_predecim);
1014
1015int dispc_ovl_enable(enum omap_plane plane, bool enable);
1016bool dispc_ovl_enabled(enum omap_plane plane);
1017void dispc_ovl_set_channel_out(enum omap_plane plane,
1018 enum omap_channel channel);
1019int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
1020 bool replication, const struct omap_video_timings *mgr_timings,
1021 bool mem_to_mem);
1022
Tomi Valkeinen559d6702009-11-03 11:23:50 +02001023#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
Tomi Valkeinenecc8b372013-02-14 14:17:28 +02001024#define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
Tomi Valkeinen559d6702009-11-03 11:23:50 +02001025
Archit Taneja1ffefe72011-05-12 17:26:24 +05301026void omapdss_dsi_vc_enable_hs(struct omap_dss_device *dssdev, int channel,
1027 bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +02001028int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen777f05c2013-03-06 11:10:29 +02001029int omapdss_dsi_set_config(struct omap_dss_device *dssdev,
1030 const struct omap_dss_dsi_config *config);
Tomi Valkeinen61140c92010-01-12 16:00:30 +02001031
Tomi Valkeinen5476e742011-11-03 16:34:20 +02001032int omap_dsi_update(struct omap_dss_device *dssdev, int channel,
Tomi Valkeinen18946f62010-01-12 14:16:41 +02001033 void (*callback)(int, void *), void *data);
Archit Taneja5ee3c142011-03-02 12:35:53 +05301034int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
1035int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
1036void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
Tomi Valkeinene4a9e942012-03-28 15:58:56 +03001037int omapdss_dsi_configure_pins(struct omap_dss_device *dssdev,
1038 const struct omap_dsi_pin_config *pin_cfg);
Tomi Valkeinen18946f62010-01-12 14:16:41 +02001039
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +02001040int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
Tomi Valkeinen2a89dc12010-07-30 12:39:34 +03001041void omapdss_dsi_display_disable(struct omap_dss_device *dssdev,
Tomi Valkeinen22d6d672010-10-11 11:33:30 +03001042 bool disconnect_lanes, bool enter_ulps);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +02001043
1044int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
1045void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
Archit Tanejac4991442012-08-08 14:28:54 +05301046void omapdss_dpi_set_timings(struct omap_dss_device *dssdev,
1047 struct omap_video_timings *timings);
Tomi Valkeinen69b20482010-01-20 12:11:25 +02001048int dpi_check_timings(struct omap_dss_device *dssdev,
1049 struct omap_video_timings *timings);
Archit Tanejac6b393d2012-07-06 15:30:52 +05301050void omapdss_dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +02001051
1052int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
1053void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
Archit Tanejac7833f72012-07-05 17:11:12 +05301054void omapdss_sdi_set_timings(struct omap_dss_device *dssdev,
1055 struct omap_video_timings *timings);
Archit Taneja889b4fd2012-07-20 17:18:49 +05301056void omapdss_sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs);
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +02001057
1058int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
1059void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
Archit Taneja43eab862012-08-13 12:24:53 +05301060int omap_rfbi_update(struct omap_dss_device *dssdev, void (*callback)(void *),
1061 void *data);
Archit Taneja475989b2012-08-13 15:28:15 +05301062int omap_rfbi_configure(struct omap_dss_device *dssdev);
Archit Taneja6ff9dd52012-08-13 15:12:10 +05301063void omapdss_rfbi_set_size(struct omap_dss_device *dssdev, u16 w, u16 h);
Archit Tanejab02875b2012-08-13 15:26:49 +05301064void omapdss_rfbi_set_pixel_size(struct omap_dss_device *dssdev,
1065 int pixel_size);
Archit Taneja475989b2012-08-13 15:28:15 +05301066void omapdss_rfbi_set_data_lines(struct omap_dss_device *dssdev,
1067 int data_lines);
Archit Taneja6e883322012-08-13 22:23:29 +05301068void omapdss_rfbi_set_interface_timings(struct omap_dss_device *dssdev,
1069 struct rfbi_timings *timings);
Tomi Valkeinen18946f62010-01-12 14:16:41 +02001070
Tomi Valkeinen8dd24912012-10-10 10:26:45 +03001071int omapdss_compat_init(void);
1072void omapdss_compat_uninit(void);
1073
Tomi Valkeinena97a9632012-10-24 13:52:40 +03001074struct dss_mgr_ops {
Tomi Valkeinena7e71e72013-05-08 16:23:32 +03001075 int (*connect)(struct omap_overlay_manager *mgr,
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +03001076 struct omap_dss_device *dst);
Tomi Valkeinena7e71e72013-05-08 16:23:32 +03001077 void (*disconnect)(struct omap_overlay_manager *mgr,
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +03001078 struct omap_dss_device *dst);
Tomi Valkeinena7e71e72013-05-08 16:23:32 +03001079
Tomi Valkeinena97a9632012-10-24 13:52:40 +03001080 void (*start_update)(struct omap_overlay_manager *mgr);
1081 int (*enable)(struct omap_overlay_manager *mgr);
1082 void (*disable)(struct omap_overlay_manager *mgr);
1083 void (*set_timings)(struct omap_overlay_manager *mgr,
1084 const struct omap_video_timings *timings);
1085 void (*set_lcd_config)(struct omap_overlay_manager *mgr,
1086 const struct dss_lcd_mgr_config *config);
1087 int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
1088 void (*handler)(void *), void *data);
1089 void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
1090 void (*handler)(void *), void *data);
1091};
1092
1093int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
1094void dss_uninstall_mgr_ops(void);
1095
Tomi Valkeinena7e71e72013-05-08 16:23:32 +03001096int dss_mgr_connect(struct omap_overlay_manager *mgr,
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +03001097 struct omap_dss_device *dst);
Tomi Valkeinena7e71e72013-05-08 16:23:32 +03001098void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +03001099 struct omap_dss_device *dst);
Tomi Valkeinena97a9632012-10-24 13:52:40 +03001100void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
1101 const struct omap_video_timings *timings);
1102void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
1103 const struct dss_lcd_mgr_config *config);
1104int dss_mgr_enable(struct omap_overlay_manager *mgr);
1105void dss_mgr_disable(struct omap_overlay_manager *mgr);
1106void dss_mgr_start_update(struct omap_overlay_manager *mgr);
1107int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
1108 void (*handler)(void *), void *data);
1109void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
1110 void (*handler)(void *), void *data);
Tomi Valkeinena7e71e72013-05-08 16:23:32 +03001111
1112static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
1113{
1114 return dssdev->output;
1115}
1116
1117static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
1118{
1119 return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
1120}
1121
Tomi Valkeinen559d6702009-11-03 11:23:50 +02001122#endif