Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 1 | /* |
| 2 | * ARC On-Chip(fpga) UART Driver |
| 3 | * |
| 4 | * Copyright (C) 2010-2012 Synopsys, Inc. (www.synopsys.com) |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * vineetg: July 10th 2012 |
| 11 | * -Decoupled the driver from arch/arc |
| 12 | * +Using platform_get_resource() for irq/membase (thx to bfin_uart.c) |
| 13 | * +Using early_platform_xxx() for early console (thx to mach-shmobile/xxx) |
| 14 | * |
| 15 | * Vineetg: Aug 21st 2010 |
| 16 | * -Is uart_tx_stopped() not done in tty write path as it has already been |
| 17 | * taken care of, in serial core |
| 18 | * |
| 19 | * Vineetg: Aug 18th 2010 |
| 20 | * -New Serial Core based ARC UART driver |
| 21 | * -Derived largely from blackfin driver albiet with some major tweaks |
| 22 | * |
| 23 | * TODO: |
| 24 | * -check if sysreq works |
| 25 | */ |
| 26 | |
| 27 | #if defined(CONFIG_SERIAL_ARC_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) |
| 28 | #define SUPPORT_SYSRQ |
| 29 | #endif |
| 30 | |
| 31 | #include <linux/module.h> |
| 32 | #include <linux/serial.h> |
| 33 | #include <linux/console.h> |
| 34 | #include <linux/sysrq.h> |
| 35 | #include <linux/platform_device.h> |
| 36 | #include <linux/tty.h> |
| 37 | #include <linux/tty_flip.h> |
| 38 | #include <linux/serial_core.h> |
| 39 | #include <linux/io.h> |
Vineet Gupta | ea28fd5 | 2013-01-11 11:50:23 +0530 | [diff] [blame] | 40 | #include <linux/of.h> |
| 41 | #include <linux/of_platform.h> |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 42 | |
| 43 | /************************************* |
| 44 | * ARC UART Hardware Specs |
| 45 | ************************************/ |
| 46 | #define ARC_UART_TX_FIFO_SIZE 1 |
| 47 | |
| 48 | /* |
| 49 | * UART Register set (this is not a Standards Compliant IP) |
| 50 | * Also each reg is Word aligned, but only 8 bits wide |
| 51 | */ |
| 52 | #define R_ID0 0 |
| 53 | #define R_ID1 4 |
| 54 | #define R_ID2 8 |
| 55 | #define R_ID3 12 |
| 56 | #define R_DATA 16 |
| 57 | #define R_STS 20 |
| 58 | #define R_BAUDL 24 |
| 59 | #define R_BAUDH 28 |
| 60 | |
| 61 | /* Bits for UART Status Reg (R/W) */ |
| 62 | #define RXIENB 0x04 /* Receive Interrupt Enable */ |
| 63 | #define TXIENB 0x40 /* Transmit Interrupt Enable */ |
| 64 | |
| 65 | #define RXEMPTY 0x20 /* Receive FIFO Empty: No char receivede */ |
| 66 | #define TXEMPTY 0x80 /* Transmit FIFO Empty, thus char can be written into */ |
| 67 | |
| 68 | #define RXFULL 0x08 /* Receive FIFO full */ |
| 69 | #define RXFULL1 0x10 /* Receive FIFO has space for 1 char (tot space=4) */ |
| 70 | |
| 71 | #define RXFERR 0x01 /* Frame Error: Stop Bit not detected */ |
| 72 | #define RXOERR 0x02 /* OverFlow Err: Char recv but RXFULL still set */ |
| 73 | |
| 74 | /* Uart bit fiddling helpers: lowest level */ |
| 75 | #define RBASE(uart, reg) (uart->port.membase + reg) |
| 76 | #define UART_REG_SET(u, r, v) writeb((v), RBASE(u, r)) |
| 77 | #define UART_REG_GET(u, r) readb(RBASE(u, r)) |
| 78 | |
| 79 | #define UART_REG_OR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) | (v)) |
| 80 | #define UART_REG_CLR(u, r, v) UART_REG_SET(u, r, UART_REG_GET(u, r) & ~(v)) |
| 81 | |
| 82 | /* Uart bit fiddling helpers: API level */ |
| 83 | #define UART_SET_DATA(uart, val) UART_REG_SET(uart, R_DATA, val) |
| 84 | #define UART_GET_DATA(uart) UART_REG_GET(uart, R_DATA) |
| 85 | |
| 86 | #define UART_SET_BAUDH(uart, val) UART_REG_SET(uart, R_BAUDH, val) |
| 87 | #define UART_SET_BAUDL(uart, val) UART_REG_SET(uart, R_BAUDL, val) |
| 88 | |
| 89 | #define UART_CLR_STATUS(uart, val) UART_REG_CLR(uart, R_STS, val) |
| 90 | #define UART_GET_STATUS(uart) UART_REG_GET(uart, R_STS) |
| 91 | |
| 92 | #define UART_ALL_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB|TXIENB) |
| 93 | #define UART_RX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, RXIENB) |
| 94 | #define UART_TX_IRQ_DISABLE(uart) UART_REG_CLR(uart, R_STS, TXIENB) |
| 95 | |
| 96 | #define UART_ALL_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB|TXIENB) |
| 97 | #define UART_RX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, RXIENB) |
| 98 | #define UART_TX_IRQ_ENABLE(uart) UART_REG_OR(uart, R_STS, TXIENB) |
| 99 | |
| 100 | #define ARC_SERIAL_DEV_NAME "ttyARC" |
| 101 | |
| 102 | struct arc_uart_port { |
| 103 | struct uart_port port; |
| 104 | unsigned long baud; |
| 105 | int is_emulated; /* H/w vs. Instruction Set Simulator */ |
| 106 | }; |
| 107 | |
| 108 | #define to_arc_port(uport) container_of(uport, struct arc_uart_port, port) |
| 109 | |
| 110 | static struct arc_uart_port arc_uart_ports[CONFIG_SERIAL_ARC_NR_PORTS]; |
| 111 | |
| 112 | #ifdef CONFIG_SERIAL_ARC_CONSOLE |
| 113 | static struct console arc_console; |
| 114 | #endif |
| 115 | |
| 116 | #define DRIVER_NAME "arc-uart" |
| 117 | |
| 118 | static struct uart_driver arc_uart_driver = { |
| 119 | .owner = THIS_MODULE, |
| 120 | .driver_name = DRIVER_NAME, |
| 121 | .dev_name = ARC_SERIAL_DEV_NAME, |
| 122 | .major = 0, |
| 123 | .minor = 0, |
| 124 | .nr = CONFIG_SERIAL_ARC_NR_PORTS, |
| 125 | #ifdef CONFIG_SERIAL_ARC_CONSOLE |
| 126 | .cons = &arc_console, |
| 127 | #endif |
| 128 | }; |
| 129 | |
| 130 | static void arc_serial_stop_rx(struct uart_port *port) |
| 131 | { |
| 132 | struct arc_uart_port *uart = to_arc_port(port); |
| 133 | |
| 134 | UART_RX_IRQ_DISABLE(uart); |
| 135 | } |
| 136 | |
| 137 | static void arc_serial_stop_tx(struct uart_port *port) |
| 138 | { |
| 139 | struct arc_uart_port *uart = to_arc_port(port); |
| 140 | |
| 141 | while (!(UART_GET_STATUS(uart) & TXEMPTY)) |
| 142 | cpu_relax(); |
| 143 | |
| 144 | UART_TX_IRQ_DISABLE(uart); |
| 145 | } |
| 146 | |
| 147 | /* |
| 148 | * Return TIOCSER_TEMT when transmitter is not busy. |
| 149 | */ |
| 150 | static unsigned int arc_serial_tx_empty(struct uart_port *port) |
| 151 | { |
| 152 | struct arc_uart_port *uart = to_arc_port(port); |
| 153 | unsigned int stat; |
| 154 | |
| 155 | stat = UART_GET_STATUS(uart); |
| 156 | if (stat & TXEMPTY) |
| 157 | return TIOCSER_TEMT; |
| 158 | |
| 159 | return 0; |
| 160 | } |
| 161 | |
| 162 | /* |
| 163 | * Driver internal routine, used by both tty(serial core) as well as tx-isr |
| 164 | * -Called under spinlock in either cases |
| 165 | * -also tty->stopped / tty->hw_stopped has already been checked |
| 166 | * = by uart_start( ) before calling us |
| 167 | * = tx_ist checks that too before calling |
| 168 | */ |
| 169 | static void arc_serial_tx_chars(struct arc_uart_port *uart) |
| 170 | { |
| 171 | struct circ_buf *xmit = &uart->port.state->xmit; |
| 172 | int sent = 0; |
| 173 | unsigned char ch; |
| 174 | |
| 175 | if (unlikely(uart->port.x_char)) { |
| 176 | UART_SET_DATA(uart, uart->port.x_char); |
| 177 | uart->port.icount.tx++; |
| 178 | uart->port.x_char = 0; |
| 179 | sent = 1; |
| 180 | } else if (xmit->tail != xmit->head) { /* TODO: uart_circ_empty */ |
| 181 | ch = xmit->buf[xmit->tail]; |
| 182 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
| 183 | uart->port.icount.tx++; |
| 184 | while (!(UART_GET_STATUS(uart) & TXEMPTY)) |
| 185 | cpu_relax(); |
| 186 | UART_SET_DATA(uart, ch); |
| 187 | sent = 1; |
| 188 | } |
| 189 | |
| 190 | /* |
| 191 | * If num chars in xmit buffer are too few, ask tty layer for more. |
| 192 | * By Hard ISR to schedule processing in software interrupt part |
| 193 | */ |
| 194 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 195 | uart_write_wakeup(&uart->port); |
| 196 | |
| 197 | if (sent) |
| 198 | UART_TX_IRQ_ENABLE(uart); |
| 199 | } |
| 200 | |
| 201 | /* |
| 202 | * port is locked and interrupts are disabled |
| 203 | * uart_start( ) calls us under the port spinlock irqsave |
| 204 | */ |
| 205 | static void arc_serial_start_tx(struct uart_port *port) |
| 206 | { |
| 207 | struct arc_uart_port *uart = to_arc_port(port); |
| 208 | |
| 209 | arc_serial_tx_chars(uart); |
| 210 | } |
| 211 | |
| 212 | static void arc_serial_rx_chars(struct arc_uart_port *uart) |
| 213 | { |
| 214 | struct tty_struct *tty = tty_port_tty_get(&uart->port.state->port); |
| 215 | unsigned int status, ch, flg = 0; |
| 216 | |
| 217 | if (!tty) |
| 218 | return; |
| 219 | |
| 220 | /* |
| 221 | * UART has 4 deep RX-FIFO. Driver's recongnition of this fact |
| 222 | * is very subtle. Here's how ... |
| 223 | * Upon getting a RX-Intr, such that RX-EMPTY=0, meaning data available, |
| 224 | * driver reads the DATA Reg and keeps doing that in a loop, until |
| 225 | * RX-EMPTY=1. Multiple chars being avail, with a single Interrupt, |
| 226 | * before RX-EMPTY=0, implies some sort of buffering going on in the |
| 227 | * controller, which is indeed the Rx-FIFO. |
| 228 | */ |
| 229 | while (!((status = UART_GET_STATUS(uart)) & RXEMPTY)) { |
| 230 | |
| 231 | ch = UART_GET_DATA(uart); |
| 232 | uart->port.icount.rx++; |
| 233 | |
| 234 | if (unlikely(status & (RXOERR | RXFERR))) { |
| 235 | if (status & RXOERR) { |
| 236 | uart->port.icount.overrun++; |
| 237 | flg = TTY_OVERRUN; |
| 238 | UART_CLR_STATUS(uart, RXOERR); |
| 239 | } |
| 240 | |
| 241 | if (status & RXFERR) { |
| 242 | uart->port.icount.frame++; |
| 243 | flg = TTY_FRAME; |
| 244 | UART_CLR_STATUS(uart, RXFERR); |
| 245 | } |
| 246 | } else |
| 247 | flg = TTY_NORMAL; |
| 248 | |
| 249 | if (unlikely(uart_handle_sysrq_char(&uart->port, ch))) |
| 250 | goto done; |
| 251 | |
| 252 | uart_insert_char(&uart->port, status, RXOERR, ch, flg); |
| 253 | |
| 254 | done: |
| 255 | tty_flip_buffer_push(tty); |
| 256 | } |
| 257 | |
| 258 | tty_kref_put(tty); |
| 259 | } |
| 260 | |
| 261 | /* |
| 262 | * A note on the Interrupt handling state machine of this driver |
| 263 | * |
| 264 | * kernel printk writes funnel thru the console driver framework and in order |
| 265 | * to keep things simple as well as efficient, it writes to UART in polled |
| 266 | * mode, in one shot, and exits. |
| 267 | * |
| 268 | * OTOH, Userland output (via tty layer), uses interrupt based writes as there |
| 269 | * can be undeterministic delay between char writes. |
| 270 | * |
| 271 | * Thus Rx-interrupts are always enabled, while tx-interrupts are by default |
| 272 | * disabled. |
| 273 | * |
| 274 | * When tty has some data to send out, serial core calls driver's start_tx |
| 275 | * which |
| 276 | * -checks-if-tty-buffer-has-char-to-send |
| 277 | * -writes-data-to-uart |
| 278 | * -enable-tx-intr |
| 279 | * |
| 280 | * Once data bits are pushed out, controller raises the Tx-room-avail-Interrupt. |
| 281 | * The first thing Tx ISR does is disable further Tx interrupts (as this could |
| 282 | * be the last char to send, before settling down into the quiet polled mode). |
| 283 | * It then calls the exact routine used by tty layer write to send out any |
| 284 | * more char in tty buffer. In case of sending, it re-enables Tx-intr. In case |
| 285 | * of no data, it remains disabled. |
| 286 | * This is how the transmit state machine is dynamically switched on/off |
| 287 | */ |
| 288 | |
| 289 | static irqreturn_t arc_serial_isr(int irq, void *dev_id) |
| 290 | { |
| 291 | struct arc_uart_port *uart = dev_id; |
| 292 | unsigned int status; |
| 293 | |
| 294 | status = UART_GET_STATUS(uart); |
| 295 | |
| 296 | /* |
| 297 | * Single IRQ for both Rx (data available) Tx (room available) Interrupt |
| 298 | * notifications from the UART Controller. |
| 299 | * To demultiplex between the two, we check the relevant bits |
| 300 | */ |
| 301 | if ((status & RXIENB) && !(status & RXEMPTY)) { |
| 302 | |
| 303 | /* already in ISR, no need of xx_irqsave */ |
| 304 | spin_lock(&uart->port.lock); |
| 305 | arc_serial_rx_chars(uart); |
| 306 | spin_unlock(&uart->port.lock); |
| 307 | } |
| 308 | |
| 309 | if ((status & TXIENB) && (status & TXEMPTY)) { |
| 310 | |
| 311 | /* Unconditionally disable further Tx-Interrupts. |
| 312 | * will be enabled by tx_chars() if needed. |
| 313 | */ |
| 314 | UART_TX_IRQ_DISABLE(uart); |
| 315 | |
| 316 | spin_lock(&uart->port.lock); |
| 317 | |
| 318 | if (!uart_tx_stopped(&uart->port)) |
| 319 | arc_serial_tx_chars(uart); |
| 320 | |
| 321 | spin_unlock(&uart->port.lock); |
| 322 | } |
| 323 | |
| 324 | return IRQ_HANDLED; |
| 325 | } |
| 326 | |
| 327 | static unsigned int arc_serial_get_mctrl(struct uart_port *port) |
| 328 | { |
| 329 | /* |
| 330 | * Pretend we have a Modem status reg and following bits are |
| 331 | * always set, to satify the serial core state machine |
| 332 | * (DSR) Data Set Ready |
| 333 | * (CTS) Clear To Send |
| 334 | * (CAR) Carrier Detect |
| 335 | */ |
| 336 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; |
| 337 | } |
| 338 | |
| 339 | static void arc_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) |
| 340 | { |
| 341 | /* MCR not present */ |
| 342 | } |
| 343 | |
| 344 | /* Enable Modem Status Interrupts */ |
| 345 | |
| 346 | static void arc_serial_enable_ms(struct uart_port *port) |
| 347 | { |
| 348 | /* MSR not present */ |
| 349 | } |
| 350 | |
| 351 | static void arc_serial_break_ctl(struct uart_port *port, int break_state) |
| 352 | { |
| 353 | /* ARC UART doesn't support sending Break signal */ |
| 354 | } |
| 355 | |
| 356 | static int arc_serial_startup(struct uart_port *port) |
| 357 | { |
| 358 | struct arc_uart_port *uart = to_arc_port(port); |
| 359 | |
| 360 | /* Before we hook up the ISR, Disable all UART Interrupts */ |
| 361 | UART_ALL_IRQ_DISABLE(uart); |
| 362 | |
| 363 | if (request_irq(uart->port.irq, arc_serial_isr, 0, "arc uart rx-tx", |
| 364 | uart)) { |
| 365 | dev_warn(uart->port.dev, "Unable to attach ARC UART intr\n"); |
| 366 | return -EBUSY; |
| 367 | } |
| 368 | |
| 369 | UART_RX_IRQ_ENABLE(uart); /* Only Rx IRQ enabled to begin with */ |
| 370 | |
| 371 | return 0; |
| 372 | } |
| 373 | |
| 374 | /* This is not really needed */ |
| 375 | static void arc_serial_shutdown(struct uart_port *port) |
| 376 | { |
| 377 | struct arc_uart_port *uart = to_arc_port(port); |
| 378 | free_irq(uart->port.irq, uart); |
| 379 | } |
| 380 | |
| 381 | static void |
| 382 | arc_serial_set_termios(struct uart_port *port, struct ktermios *new, |
| 383 | struct ktermios *old) |
| 384 | { |
| 385 | struct arc_uart_port *uart = to_arc_port(port); |
| 386 | unsigned int baud, uartl, uarth, hw_val; |
| 387 | unsigned long flags; |
| 388 | |
| 389 | /* |
| 390 | * Use the generic handler so that any specially encoded baud rates |
| 391 | * such as SPD_xx flags or "%B0" can be handled |
| 392 | * Max Baud I suppose will not be more than current 115K * 4 |
| 393 | * Formula for ARC UART is: hw-val = ((CLK/(BAUD*4)) -1) |
| 394 | * spread over two 8-bit registers |
| 395 | */ |
| 396 | baud = uart_get_baud_rate(port, new, old, 0, 460800); |
| 397 | |
| 398 | hw_val = port->uartclk / (uart->baud * 4) - 1; |
| 399 | uartl = hw_val & 0xFF; |
| 400 | uarth = (hw_val >> 8) & 0xFF; |
| 401 | |
| 402 | /* |
| 403 | * UART ISS(Instruction Set simulator) emulation has a subtle bug: |
| 404 | * A existing value of Baudh = 0 is used as a indication to startup |
| 405 | * it's internal state machine. |
| 406 | * Thus if baudh is set to 0, 2 times, it chokes. |
| 407 | * This happens with BAUD=115200 and the formaula above |
| 408 | * Until that is fixed, when running on ISS, we will set baudh to !0 |
| 409 | */ |
| 410 | if (uart->is_emulated) |
| 411 | uarth = 1; |
| 412 | |
| 413 | spin_lock_irqsave(&port->lock, flags); |
| 414 | |
| 415 | UART_ALL_IRQ_DISABLE(uart); |
| 416 | |
| 417 | UART_SET_BAUDL(uart, uartl); |
| 418 | UART_SET_BAUDH(uart, uarth); |
| 419 | |
| 420 | UART_RX_IRQ_ENABLE(uart); |
| 421 | |
| 422 | /* |
| 423 | * UART doesn't support Parity/Hardware Flow Control; |
| 424 | * Only supports 8N1 character size |
| 425 | */ |
| 426 | new->c_cflag &= ~(CMSPAR|CRTSCTS|CSIZE); |
| 427 | new->c_cflag |= CS8; |
| 428 | |
| 429 | if (old) |
| 430 | tty_termios_copy_hw(new, old); |
| 431 | |
| 432 | /* Don't rewrite B0 */ |
| 433 | if (tty_termios_baud_rate(new)) |
| 434 | tty_termios_encode_baud_rate(new, baud, baud); |
| 435 | |
| 436 | uart_update_timeout(port, new->c_cflag, baud); |
| 437 | |
| 438 | spin_unlock_irqrestore(&port->lock, flags); |
| 439 | } |
| 440 | |
| 441 | static const char *arc_serial_type(struct uart_port *port) |
| 442 | { |
| 443 | struct arc_uart_port *uart = to_arc_port(port); |
| 444 | |
| 445 | return uart->port.type == PORT_ARC ? DRIVER_NAME : NULL; |
| 446 | } |
| 447 | |
| 448 | static void arc_serial_release_port(struct uart_port *port) |
| 449 | { |
| 450 | } |
| 451 | |
| 452 | static int arc_serial_request_port(struct uart_port *port) |
| 453 | { |
| 454 | return 0; |
| 455 | } |
| 456 | |
| 457 | /* |
| 458 | * Verify the new serial_struct (for TIOCSSERIAL). |
| 459 | */ |
| 460 | static int |
| 461 | arc_serial_verify_port(struct uart_port *port, struct serial_struct *ser) |
| 462 | { |
| 463 | if (port->type != PORT_UNKNOWN && ser->type != PORT_ARC) |
| 464 | return -EINVAL; |
| 465 | |
| 466 | return 0; |
| 467 | } |
| 468 | |
| 469 | /* |
| 470 | * Configure/autoconfigure the port. |
| 471 | */ |
| 472 | static void arc_serial_config_port(struct uart_port *port, int flags) |
| 473 | { |
| 474 | struct arc_uart_port *uart = to_arc_port(port); |
| 475 | |
| 476 | if (flags & UART_CONFIG_TYPE) |
| 477 | uart->port.type = PORT_ARC; |
| 478 | } |
| 479 | |
| 480 | #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_ARC_CONSOLE) |
| 481 | |
| 482 | static void arc_serial_poll_putchar(struct uart_port *port, unsigned char chr) |
| 483 | { |
| 484 | struct arc_uart_port *uart = to_arc_port(port); |
| 485 | |
| 486 | while (!(UART_GET_STATUS(uart) & TXEMPTY)) |
| 487 | cpu_relax(); |
| 488 | |
| 489 | UART_SET_DATA(uart, chr); |
| 490 | } |
| 491 | #endif |
| 492 | |
| 493 | #ifdef CONFIG_CONSOLE_POLL |
| 494 | static int arc_serial_poll_getchar(struct uart_port *port) |
| 495 | { |
| 496 | struct arc_uart_port *uart = to_arc_port(port); |
| 497 | unsigned char chr; |
| 498 | |
| 499 | while (!(UART_GET_STATUS(uart) & RXEMPTY)) |
| 500 | cpu_relax(); |
| 501 | |
| 502 | chr = UART_GET_DATA(uart); |
| 503 | return chr; |
| 504 | } |
| 505 | #endif |
| 506 | |
| 507 | static struct uart_ops arc_serial_pops = { |
| 508 | .tx_empty = arc_serial_tx_empty, |
| 509 | .set_mctrl = arc_serial_set_mctrl, |
| 510 | .get_mctrl = arc_serial_get_mctrl, |
| 511 | .stop_tx = arc_serial_stop_tx, |
| 512 | .start_tx = arc_serial_start_tx, |
| 513 | .stop_rx = arc_serial_stop_rx, |
| 514 | .enable_ms = arc_serial_enable_ms, |
| 515 | .break_ctl = arc_serial_break_ctl, |
| 516 | .startup = arc_serial_startup, |
| 517 | .shutdown = arc_serial_shutdown, |
| 518 | .set_termios = arc_serial_set_termios, |
| 519 | .type = arc_serial_type, |
| 520 | .release_port = arc_serial_release_port, |
| 521 | .request_port = arc_serial_request_port, |
| 522 | .config_port = arc_serial_config_port, |
| 523 | .verify_port = arc_serial_verify_port, |
| 524 | #ifdef CONFIG_CONSOLE_POLL |
| 525 | .poll_put_char = arc_serial_poll_putchar, |
| 526 | .poll_get_char = arc_serial_poll_getchar, |
| 527 | #endif |
| 528 | }; |
| 529 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 530 | static int |
Vineet Gupta | 026bb29 | 2013-01-11 11:50:20 +0530 | [diff] [blame] | 531 | arc_uart_init_one(struct platform_device *pdev, int dev_id) |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 532 | { |
| 533 | struct resource *res, *res2; |
| 534 | unsigned long *plat_data; |
Vineet Gupta | 026bb29 | 2013-01-11 11:50:20 +0530 | [diff] [blame] | 535 | struct arc_uart_port *uart = &arc_uart_ports[dev_id]; |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 536 | |
| 537 | plat_data = ((unsigned long *)(pdev->dev.platform_data)); |
Vineet Gupta | d6c0d06 | 2013-01-11 11:50:22 +0530 | [diff] [blame] | 538 | if (!plat_data) |
| 539 | return -ENODEV; |
| 540 | |
| 541 | uart->is_emulated = !!plat_data[0]; /* workaround ISS bug */ |
Vineet Gupta | ea28fd5 | 2013-01-11 11:50:23 +0530 | [diff] [blame] | 542 | |
| 543 | if (is_early_platform_device(pdev)) { |
| 544 | uart->port.uartclk = plat_data[1]; |
| 545 | uart->baud = plat_data[2]; |
| 546 | } else { |
| 547 | struct device_node *np = pdev->dev.of_node; |
| 548 | u32 val; |
| 549 | |
| 550 | if (of_property_read_u32(np, "clock-frequency", &val)) { |
| 551 | dev_err(&pdev->dev, "clock-frequency property NOTset\n"); |
| 552 | return -EINVAL; |
| 553 | } |
| 554 | uart->port.uartclk = val; |
| 555 | |
| 556 | if (of_property_read_u32(np, "baud", &val)) { |
| 557 | dev_err(&pdev->dev, "baud property NOT set\n"); |
| 558 | return -EINVAL; |
| 559 | } |
| 560 | uart->baud = val; |
| 561 | } |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 562 | |
| 563 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 564 | if (!res) |
| 565 | return -ENODEV; |
| 566 | |
| 567 | res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 568 | if (!res2) |
| 569 | return -ENODEV; |
| 570 | |
| 571 | uart->port.mapbase = res->start; |
| 572 | uart->port.membase = ioremap_nocache(res->start, resource_size(res)); |
| 573 | if (!uart->port.membase) |
| 574 | /* No point of dev_err since UART itself is hosed here */ |
| 575 | return -ENXIO; |
| 576 | |
| 577 | uart->port.irq = res2->start; |
| 578 | uart->port.dev = &pdev->dev; |
| 579 | uart->port.iotype = UPIO_MEM; |
| 580 | uart->port.flags = UPF_BOOT_AUTOCONF; |
Vineet Gupta | 026bb29 | 2013-01-11 11:50:20 +0530 | [diff] [blame] | 581 | uart->port.line = dev_id; |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 582 | uart->port.ops = &arc_serial_pops; |
| 583 | |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 584 | uart->port.fifosize = ARC_UART_TX_FIFO_SIZE; |
| 585 | |
| 586 | /* |
| 587 | * uart_insert_char( ) uses it in decideding whether to ignore a |
| 588 | * char or not. Explicitly setting it here, removes the subtelty |
| 589 | */ |
| 590 | uart->port.ignore_status_mask = 0; |
| 591 | |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 592 | return 0; |
| 593 | } |
| 594 | |
| 595 | #ifdef CONFIG_SERIAL_ARC_CONSOLE |
| 596 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 597 | static int arc_serial_console_setup(struct console *co, char *options) |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 598 | { |
| 599 | struct uart_port *port; |
| 600 | int baud = 115200; |
| 601 | int bits = 8; |
| 602 | int parity = 'n'; |
| 603 | int flow = 'n'; |
| 604 | |
| 605 | if (co->index < 0 || co->index >= CONFIG_SERIAL_ARC_NR_PORTS) |
| 606 | return -ENODEV; |
| 607 | |
| 608 | /* |
| 609 | * The uart port backing the console (e.g. ttyARC1) might not have been |
| 610 | * init yet. If so, defer the console setup to after the port. |
| 611 | */ |
| 612 | port = &arc_uart_ports[co->index].port; |
| 613 | if (!port->membase) |
| 614 | return -ENODEV; |
| 615 | |
| 616 | if (options) |
| 617 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| 618 | |
| 619 | /* |
| 620 | * Serial core will call port->ops->set_termios( ) |
| 621 | * which will set the baud reg |
| 622 | */ |
| 623 | return uart_set_options(port, co, baud, parity, bits, flow); |
| 624 | } |
| 625 | |
| 626 | static void arc_serial_console_putchar(struct uart_port *port, int ch) |
| 627 | { |
| 628 | arc_serial_poll_putchar(port, (unsigned char)ch); |
| 629 | } |
| 630 | |
| 631 | /* |
| 632 | * Interrupts are disabled on entering |
| 633 | */ |
| 634 | static void arc_serial_console_write(struct console *co, const char *s, |
| 635 | unsigned int count) |
| 636 | { |
| 637 | struct uart_port *port = &arc_uart_ports[co->index].port; |
| 638 | unsigned long flags; |
| 639 | |
| 640 | spin_lock_irqsave(&port->lock, flags); |
| 641 | uart_console_write(port, s, count, arc_serial_console_putchar); |
| 642 | spin_unlock_irqrestore(&port->lock, flags); |
| 643 | } |
| 644 | |
| 645 | static struct console arc_console = { |
| 646 | .name = ARC_SERIAL_DEV_NAME, |
| 647 | .write = arc_serial_console_write, |
| 648 | .device = uart_console_device, |
| 649 | .setup = arc_serial_console_setup, |
| 650 | .flags = CON_PRINTBUFFER, |
| 651 | .index = -1, |
| 652 | .data = &arc_uart_driver |
| 653 | }; |
| 654 | |
| 655 | static __init void early_serial_write(struct console *con, const char *s, |
| 656 | unsigned int n) |
| 657 | { |
| 658 | struct uart_port *port = &arc_uart_ports[con->index].port; |
| 659 | unsigned int i; |
| 660 | |
| 661 | for (i = 0; i < n; i++, s++) { |
| 662 | if (*s == '\n') |
| 663 | arc_serial_poll_putchar(port, '\r'); |
| 664 | arc_serial_poll_putchar(port, *s); |
| 665 | } |
| 666 | } |
| 667 | |
| 668 | static struct __initdata console arc_early_serial_console = { |
| 669 | .name = "early_ARCuart", |
| 670 | .write = early_serial_write, |
| 671 | .flags = CON_PRINTBUFFER | CON_BOOT, |
| 672 | .index = -1 |
| 673 | }; |
| 674 | |
Vineet Gupta | e163d1f | 2013-01-11 11:50:21 +0530 | [diff] [blame] | 675 | static int __init arc_serial_probe_earlyprintk(struct platform_device *pdev) |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 676 | { |
Vineet Gupta | 026bb29 | 2013-01-11 11:50:20 +0530 | [diff] [blame] | 677 | int dev_id = pdev->id < 0 ? 0 : pdev->id; |
| 678 | int rc; |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 679 | |
Vineet Gupta | 026bb29 | 2013-01-11 11:50:20 +0530 | [diff] [blame] | 680 | arc_early_serial_console.index = dev_id; |
| 681 | |
| 682 | rc = arc_uart_init_one(pdev, dev_id); |
| 683 | if (rc) |
| 684 | panic("early console init failed\n"); |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 685 | |
| 686 | arc_serial_console_setup(&arc_early_serial_console, NULL); |
| 687 | |
| 688 | register_console(&arc_early_serial_console); |
| 689 | return 0; |
| 690 | } |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 691 | #endif /* CONFIG_SERIAL_ARC_CONSOLE */ |
| 692 | |
Bill Pemberton | 9671f09 | 2012-11-19 13:21:50 -0500 | [diff] [blame] | 693 | static int arc_serial_probe(struct platform_device *pdev) |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 694 | { |
Vineet Gupta | 026bb29 | 2013-01-11 11:50:20 +0530 | [diff] [blame] | 695 | int rc, dev_id; |
Vineet Gupta | ea28fd5 | 2013-01-11 11:50:23 +0530 | [diff] [blame] | 696 | struct device_node *np = pdev->dev.of_node; |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 697 | |
Vineet Gupta | ea28fd5 | 2013-01-11 11:50:23 +0530 | [diff] [blame] | 698 | /* no device tree device */ |
| 699 | if (!np) |
| 700 | return -ENODEV; |
| 701 | |
| 702 | dev_id = of_alias_get_id(np, "serial"); |
| 703 | if (dev_id < 0) { |
| 704 | dev_err(&pdev->dev, "failed to get alias id: %d\n", dev_id); |
| 705 | return dev_id; |
| 706 | } |
| 707 | |
Vineet Gupta | 026bb29 | 2013-01-11 11:50:20 +0530 | [diff] [blame] | 708 | rc = arc_uart_init_one(pdev, dev_id); |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 709 | if (rc) |
| 710 | return rc; |
| 711 | |
Vineet Gupta | 026bb29 | 2013-01-11 11:50:20 +0530 | [diff] [blame] | 712 | rc = uart_add_one_port(&arc_uart_driver, &arc_uart_ports[dev_id].port); |
| 713 | return rc; |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 714 | } |
| 715 | |
Bill Pemberton | ae8d8a1 | 2012-11-19 13:26:18 -0500 | [diff] [blame] | 716 | static int arc_serial_remove(struct platform_device *pdev) |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 717 | { |
| 718 | /* This will never be called */ |
| 719 | return 0; |
| 720 | } |
| 721 | |
Vineet Gupta | ea28fd5 | 2013-01-11 11:50:23 +0530 | [diff] [blame] | 722 | static const struct of_device_id arc_uart_dt_ids[] = { |
| 723 | { .compatible = "snps,arc-uart" }, |
| 724 | { /* Sentinel */ } |
| 725 | }; |
| 726 | MODULE_DEVICE_TABLE(of, arc_uart_dt_ids); |
| 727 | |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 728 | static struct platform_driver arc_platform_driver = { |
| 729 | .probe = arc_serial_probe, |
Bill Pemberton | 2d47b71 | 2012-11-19 13:21:34 -0500 | [diff] [blame] | 730 | .remove = arc_serial_remove, |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 731 | .driver = { |
| 732 | .name = DRIVER_NAME, |
| 733 | .owner = THIS_MODULE, |
Vineet Gupta | ea28fd5 | 2013-01-11 11:50:23 +0530 | [diff] [blame] | 734 | .of_match_table = arc_uart_dt_ids, |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 735 | }, |
| 736 | }; |
| 737 | |
| 738 | #ifdef CONFIG_SERIAL_ARC_CONSOLE |
Vineet Gupta | e163d1f | 2013-01-11 11:50:21 +0530 | [diff] [blame] | 739 | |
| 740 | static struct platform_driver early_arc_platform_driver = { |
| 741 | .probe = arc_serial_probe_earlyprintk, |
| 742 | .remove = arc_serial_remove, |
| 743 | .driver = { |
| 744 | .name = DRIVER_NAME, |
| 745 | .owner = THIS_MODULE, |
| 746 | }, |
| 747 | }; |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 748 | /* |
| 749 | * Register an early platform driver of "earlyprintk" class. |
| 750 | * ARCH platform code installs the driver and probes the early devices |
| 751 | * The installation could rely on user specifying earlyprintk=xyx in cmd line |
| 752 | * or it could be done independently, for all "earlyprintk" class drivers. |
| 753 | * [see arch/arc/plat-arcfpga/platform.c] |
| 754 | */ |
Vineet Gupta | e163d1f | 2013-01-11 11:50:21 +0530 | [diff] [blame] | 755 | early_platform_init("earlyprintk", &early_arc_platform_driver); |
Vineet Gupta | 2ac4ad2 | 2012-10-27 12:47:12 +0530 | [diff] [blame] | 756 | |
| 757 | #endif /* CONFIG_SERIAL_ARC_CONSOLE */ |
| 758 | |
| 759 | static int __init arc_serial_init(void) |
| 760 | { |
| 761 | int ret; |
| 762 | |
| 763 | ret = uart_register_driver(&arc_uart_driver); |
| 764 | if (ret) |
| 765 | return ret; |
| 766 | |
| 767 | ret = platform_driver_register(&arc_platform_driver); |
| 768 | if (ret) |
| 769 | uart_unregister_driver(&arc_uart_driver); |
| 770 | |
| 771 | return ret; |
| 772 | } |
| 773 | |
| 774 | static void __exit arc_serial_exit(void) |
| 775 | { |
| 776 | platform_driver_unregister(&arc_platform_driver); |
| 777 | uart_unregister_driver(&arc_uart_driver); |
| 778 | } |
| 779 | |
| 780 | module_init(arc_serial_init); |
| 781 | module_exit(arc_serial_exit); |
| 782 | |
| 783 | MODULE_LICENSE("GPL"); |
| 784 | MODULE_ALIAS("plat-arcfpga/uart"); |
| 785 | MODULE_AUTHOR("Vineet Gupta"); |
| 786 | MODULE_DESCRIPTION("ARC(Synopsys) On-Chip(fpga) serial driver"); |