blob: 794335188a26dc7e3104d6ca07041e368a4b9bd5 [file] [log] [blame]
Dhananjay Phadked9e651b2008-07-21 19:44:08 -07001/*
Dhananjay Phadke5d242f12009-02-25 15:57:56 +00002 * Copyright (C) 2003 - 2009 NetXen, Inc.
Dhananjay Phadked9e651b2008-07-21 19:44:08 -07003 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
Dhananjay Phadke5d242f12009-02-25 15:57:56 +000025 * NetXen Inc,
26 * 18922 Forge Drive
27 * Cupertino, CA 95014-0701
Dhananjay Phadked9e651b2008-07-21 19:44:08 -070028 *
29 */
30
31#include "netxen_nic_hw.h"
32#include "netxen_nic.h"
33#include "netxen_nic_phan_reg.h"
34
35#define NXHAL_VERSION 1
36
37static int
38netxen_api_lock(struct netxen_adapter *adapter)
39{
40 u32 done = 0, timeout = 0;
41
42 for (;;) {
43 /* Acquire PCIE HW semaphore5 */
44 netxen_nic_read_w0(adapter,
45 NETXEN_PCIE_REG(PCIE_SEM5_LOCK), &done);
46
47 if (done == 1)
48 break;
49
50 if (++timeout >= NX_OS_CRB_RETRY_COUNT) {
51 printk(KERN_ERR "%s: lock timeout.\n", __func__);
52 return -1;
53 }
54
55 msleep(1);
56 }
57
58#if 0
59 netxen_nic_write_w1(adapter,
60 NETXEN_API_LOCK_ID, NX_OS_API_LOCK_DRIVER);
61#endif
62 return 0;
63}
64
65static int
66netxen_api_unlock(struct netxen_adapter *adapter)
67{
68 u32 val;
69
70 /* Release PCIE HW semaphore5 */
71 netxen_nic_read_w0(adapter,
72 NETXEN_PCIE_REG(PCIE_SEM5_UNLOCK), &val);
73 return 0;
74}
75
76static u32
77netxen_poll_rsp(struct netxen_adapter *adapter)
78{
Dhananjay Phadke2edbb452009-01-14 20:47:30 -080079 u32 rsp = NX_CDRP_RSP_OK;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -070080 int timeout = 0;
81
82 do {
83 /* give atleast 1ms for firmware to respond */
84 msleep(1);
85
86 if (++timeout > NX_OS_CRB_RETRY_COUNT)
87 return NX_CDRP_RSP_TIMEOUT;
88
Dhananjay Phadke2edbb452009-01-14 20:47:30 -080089 netxen_nic_read_w1(adapter, NX_CDRP_CRB_OFFSET, &rsp);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -070090 } while (!NX_CDRP_IS_RSP(rsp));
91
92 return rsp;
93}
94
95static u32
96netxen_issue_cmd(struct netxen_adapter *adapter,
97 u32 pci_fn, u32 version, u32 arg1, u32 arg2, u32 arg3, u32 cmd)
98{
99 u32 rsp;
100 u32 signature = 0;
101 u32 rcode = NX_RCODE_SUCCESS;
102
103 signature = NX_CDRP_SIGNATURE_MAKE(pci_fn, version);
104
105 /* Acquire semaphore before accessing CRB */
106 if (netxen_api_lock(adapter))
107 return NX_RCODE_TIMEOUT;
108
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800109 netxen_nic_write_w1(adapter, NX_SIGN_CRB_OFFSET, signature);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700110
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800111 netxen_nic_write_w1(adapter, NX_ARG1_CRB_OFFSET, arg1);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700112
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800113 netxen_nic_write_w1(adapter, NX_ARG2_CRB_OFFSET, arg2);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700114
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800115 netxen_nic_write_w1(adapter, NX_ARG3_CRB_OFFSET, arg3);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700116
117 netxen_nic_write_w1(adapter, NX_CDRP_CRB_OFFSET,
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800118 NX_CDRP_FORM_CMD(cmd));
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700119
120 rsp = netxen_poll_rsp(adapter);
121
122 if (rsp == NX_CDRP_RSP_TIMEOUT) {
123 printk(KERN_ERR "%s: card response timeout.\n",
124 netxen_nic_driver_name);
125
126 rcode = NX_RCODE_TIMEOUT;
127 } else if (rsp == NX_CDRP_RSP_FAIL) {
128 netxen_nic_read_w1(adapter, NX_ARG1_CRB_OFFSET, &rcode);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700129
130 printk(KERN_ERR "%s: failed card response code:0x%x\n",
131 netxen_nic_driver_name, rcode);
132 }
133
134 /* Release semaphore */
135 netxen_api_unlock(adapter);
136
137 return rcode;
138}
139
Dhananjay Phadke9ad27642008-08-01 03:14:59 -0700140int
141nx_fw_cmd_set_mtu(struct netxen_adapter *adapter, int mtu)
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700142{
143 u32 rcode = NX_RCODE_SUCCESS;
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000144 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700145
146 if (recv_ctx->state == NX_HOST_CTX_STATE_ACTIVE)
147 rcode = netxen_issue_cmd(adapter,
148 adapter->ahw.pci_func,
149 NXHAL_VERSION,
150 recv_ctx->context_id,
151 mtu,
152 0,
153 NX_CDRP_CMD_SET_MTU);
154
Dhananjay Phadke9ad27642008-08-01 03:14:59 -0700155 if (rcode != NX_RCODE_SUCCESS)
156 return -EIO;
157
158 return 0;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700159}
160
161static int
162nx_fw_cmd_create_rx_ctx(struct netxen_adapter *adapter)
163{
164 void *addr;
165 nx_hostrq_rx_ctx_t *prq;
166 nx_cardrsp_rx_ctx_t *prsp;
167 nx_hostrq_rds_ring_t *prq_rds;
168 nx_hostrq_sds_ring_t *prq_sds;
169 nx_cardrsp_rds_ring_t *prsp_rds;
170 nx_cardrsp_sds_ring_t *prsp_sds;
171 struct nx_host_rds_ring *rds_ring;
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000172 struct nx_host_sds_ring *sds_ring;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700173
174 dma_addr_t hostrq_phys_addr, cardrsp_phys_addr;
175 u64 phys_addr;
176
177 int i, nrds_rings, nsds_rings;
178 size_t rq_size, rsp_size;
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800179 u32 cap, reg, val;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700180
181 int err;
182
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000183 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700184
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700185 nrds_rings = adapter->max_rds_rings;
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000186 nsds_rings = adapter->max_sds_rings;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700187
188 rq_size =
189 SIZEOF_HOSTRQ_RX(nx_hostrq_rx_ctx_t, nrds_rings, nsds_rings);
190 rsp_size =
191 SIZEOF_CARDRSP_RX(nx_cardrsp_rx_ctx_t, nrds_rings, nsds_rings);
192
193 addr = pci_alloc_consistent(adapter->pdev,
194 rq_size, &hostrq_phys_addr);
195 if (addr == NULL)
196 return -ENOMEM;
197 prq = (nx_hostrq_rx_ctx_t *)addr;
198
199 addr = pci_alloc_consistent(adapter->pdev,
200 rsp_size, &cardrsp_phys_addr);
201 if (addr == NULL) {
202 err = -ENOMEM;
203 goto out_free_rq;
204 }
205 prsp = (nx_cardrsp_rx_ctx_t *)addr;
206
207 prq->host_rsp_dma_addr = cpu_to_le64(cardrsp_phys_addr);
208
209 cap = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN);
210 cap |= (NX_CAP0_JUMBO_CONTIGUOUS | NX_CAP0_LRO_CONTIGUOUS);
211
212 prq->capabilities[0] = cpu_to_le32(cap);
213 prq->host_int_crb_mode =
214 cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
215 prq->host_rds_crb_mode =
216 cpu_to_le32(NX_HOST_RDS_CRB_MODE_UNIQUE);
217
218 prq->num_rds_rings = cpu_to_le16(nrds_rings);
219 prq->num_sds_rings = cpu_to_le16(nsds_rings);
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800220 prq->rds_ring_offset = cpu_to_le32(0);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700221
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800222 val = le32_to_cpu(prq->rds_ring_offset) +
223 (sizeof(nx_hostrq_rds_ring_t) * nrds_rings);
224 prq->sds_ring_offset = cpu_to_le32(val);
225
226 prq_rds = (nx_hostrq_rds_ring_t *)(prq->data +
227 le32_to_cpu(prq->rds_ring_offset));
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700228
229 for (i = 0; i < nrds_rings; i++) {
230
231 rds_ring = &recv_ctx->rds_rings[i];
232
233 prq_rds[i].host_phys_addr = cpu_to_le64(rds_ring->phys_addr);
Dhananjay Phadke438627c2009-03-13 14:52:03 +0000234 prq_rds[i].ring_size = cpu_to_le32(rds_ring->num_desc);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700235 prq_rds[i].ring_kind = cpu_to_le32(i);
236 prq_rds[i].buff_size = cpu_to_le64(rds_ring->dma_size);
237 }
238
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800239 prq_sds = (nx_hostrq_sds_ring_t *)(prq->data +
240 le32_to_cpu(prq->sds_ring_offset));
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700241
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000242 for (i = 0; i < nsds_rings; i++) {
243
244 sds_ring = &recv_ctx->sds_rings[i];
245
246 prq_sds[i].host_phys_addr = cpu_to_le64(sds_ring->phys_addr);
247 prq_sds[i].ring_size = cpu_to_le32(sds_ring->num_desc);
248 prq_sds[i].msi_index = cpu_to_le16(i);
249 }
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700250
251 phys_addr = hostrq_phys_addr;
252 err = netxen_issue_cmd(adapter,
253 adapter->ahw.pci_func,
254 NXHAL_VERSION,
255 (u32)(phys_addr >> 32),
256 (u32)(phys_addr & 0xffffffff),
257 rq_size,
258 NX_CDRP_CMD_CREATE_RX_CTX);
259 if (err) {
260 printk(KERN_WARNING
261 "Failed to create rx ctx in firmware%d\n", err);
262 goto out_free_rsp;
263 }
264
265
266 prsp_rds = ((nx_cardrsp_rds_ring_t *)
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800267 &prsp->data[le32_to_cpu(prsp->rds_ring_offset)]);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700268
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800269 for (i = 0; i < le16_to_cpu(prsp->num_rds_rings); i++) {
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700270 rds_ring = &recv_ctx->rds_rings[i];
271
272 reg = le32_to_cpu(prsp_rds[i].host_producer_crb);
273 rds_ring->crb_rcv_producer = NETXEN_NIC_REG(reg - 0x200);
274 }
275
276 prsp_sds = ((nx_cardrsp_sds_ring_t *)
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800277 &prsp->data[le32_to_cpu(prsp->sds_ring_offset)]);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700278
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000279 for (i = 0; i < le16_to_cpu(prsp->num_sds_rings); i++) {
280 sds_ring = &recv_ctx->sds_rings[i];
281
282 reg = le32_to_cpu(prsp_sds[i].host_consumer_crb);
283 sds_ring->crb_sts_consumer = NETXEN_NIC_REG(reg - 0x200);
284
285 reg = le32_to_cpu(prsp_sds[i].interrupt_crb);
286 sds_ring->crb_intr_mask = NETXEN_NIC_REG(reg - 0x200);
287 }
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700288
289 recv_ctx->state = le32_to_cpu(prsp->host_ctx_state);
290 recv_ctx->context_id = le16_to_cpu(prsp->context_id);
Dhananjay Phadke2edbb452009-01-14 20:47:30 -0800291 recv_ctx->virt_port = prsp->virt_port;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700292
293out_free_rsp:
294 pci_free_consistent(adapter->pdev, rsp_size, prsp, cardrsp_phys_addr);
295out_free_rq:
296 pci_free_consistent(adapter->pdev, rq_size, prq, hostrq_phys_addr);
297 return err;
298}
299
300static void
301nx_fw_cmd_destroy_rx_ctx(struct netxen_adapter *adapter)
302{
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000303 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700304
305 if (netxen_issue_cmd(adapter,
306 adapter->ahw.pci_func,
307 NXHAL_VERSION,
308 recv_ctx->context_id,
309 NX_DESTROY_CTX_RESET,
310 0,
311 NX_CDRP_CMD_DESTROY_RX_CTX)) {
312
313 printk(KERN_WARNING
314 "%s: Failed to destroy rx ctx in firmware\n",
315 netxen_nic_driver_name);
316 }
317}
318
319static int
320nx_fw_cmd_create_tx_ctx(struct netxen_adapter *adapter)
321{
322 nx_hostrq_tx_ctx_t *prq;
323 nx_hostrq_cds_ring_t *prq_cds;
324 nx_cardrsp_tx_ctx_t *prsp;
325 void *rq_addr, *rsp_addr;
326 size_t rq_size, rsp_size;
327 u32 temp;
328 int err = 0;
329 u64 offset, phys_addr;
330 dma_addr_t rq_phys_addr, rsp_phys_addr;
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000331 struct nx_host_tx_ring *tx_ring = &adapter->tx_ring;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700332
333 rq_size = SIZEOF_HOSTRQ_TX(nx_hostrq_tx_ctx_t);
334 rq_addr = pci_alloc_consistent(adapter->pdev,
335 rq_size, &rq_phys_addr);
336 if (!rq_addr)
337 return -ENOMEM;
338
339 rsp_size = SIZEOF_CARDRSP_TX(nx_cardrsp_tx_ctx_t);
340 rsp_addr = pci_alloc_consistent(adapter->pdev,
341 rsp_size, &rsp_phys_addr);
342 if (!rsp_addr) {
343 err = -ENOMEM;
344 goto out_free_rq;
345 }
346
347 memset(rq_addr, 0, rq_size);
348 prq = (nx_hostrq_tx_ctx_t *)rq_addr;
349
350 memset(rsp_addr, 0, rsp_size);
351 prsp = (nx_cardrsp_tx_ctx_t *)rsp_addr;
352
353 prq->host_rsp_dma_addr = cpu_to_le64(rsp_phys_addr);
354
355 temp = (NX_CAP0_LEGACY_CONTEXT | NX_CAP0_LEGACY_MN | NX_CAP0_LSO);
356 prq->capabilities[0] = cpu_to_le32(temp);
357
358 prq->host_int_crb_mode =
359 cpu_to_le32(NX_HOST_INT_CRB_MODE_SHARED);
360
361 prq->interrupt_ctl = 0;
362 prq->msi_index = 0;
363
364 prq->dummy_dma_addr = cpu_to_le64(adapter->dummy_dma.phys_addr);
365
366 offset = adapter->ctx_desc_phys_addr+sizeof(struct netxen_ring_ctx);
367 prq->cmd_cons_dma_addr = cpu_to_le64(offset);
368
369 prq_cds = &prq->cds_ring;
370
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000371 prq_cds->host_phys_addr = cpu_to_le64(tx_ring->phys_addr);
372 prq_cds->ring_size = cpu_to_le32(tx_ring->num_desc);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700373
374 phys_addr = rq_phys_addr;
375 err = netxen_issue_cmd(adapter,
376 adapter->ahw.pci_func,
377 NXHAL_VERSION,
378 (u32)(phys_addr >> 32),
379 ((u32)phys_addr & 0xffffffff),
380 rq_size,
381 NX_CDRP_CMD_CREATE_TX_CTX);
382
383 if (err == NX_RCODE_SUCCESS) {
384 temp = le32_to_cpu(prsp->cds_ring.host_producer_crb);
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000385 tx_ring->crb_cmd_producer = NETXEN_NIC_REG(temp - 0x200);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700386#if 0
387 adapter->tx_state =
388 le32_to_cpu(prsp->host_ctx_state);
389#endif
390 adapter->tx_context_id =
391 le16_to_cpu(prsp->context_id);
392 } else {
393 printk(KERN_WARNING
394 "Failed to create tx ctx in firmware%d\n", err);
395 err = -EIO;
396 }
397
398 pci_free_consistent(adapter->pdev, rsp_size, rsp_addr, rsp_phys_addr);
399
400out_free_rq:
401 pci_free_consistent(adapter->pdev, rq_size, rq_addr, rq_phys_addr);
402
403 return err;
404}
405
406static void
407nx_fw_cmd_destroy_tx_ctx(struct netxen_adapter *adapter)
408{
409 if (netxen_issue_cmd(adapter,
410 adapter->ahw.pci_func,
411 NXHAL_VERSION,
412 adapter->tx_context_id,
413 NX_DESTROY_CTX_RESET,
414 0,
415 NX_CDRP_CMD_DESTROY_TX_CTX)) {
416
417 printk(KERN_WARNING
418 "%s: Failed to destroy tx ctx in firmware\n",
419 netxen_nic_driver_name);
420 }
421}
422
423static u64 ctx_addr_sig_regs[][3] = {
424 {NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
425 {NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
426 {NETXEN_NIC_REG(0x198), NETXEN_NIC_REG(0x19c), NETXEN_NIC_REG(0x1c8)},
427 {NETXEN_NIC_REG(0x1a0), NETXEN_NIC_REG(0x1a4), NETXEN_NIC_REG(0x1cc)}
428};
429
430#define CRB_CTX_ADDR_REG_LO(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][0])
431#define CRB_CTX_ADDR_REG_HI(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][2])
432#define CRB_CTX_SIGNATURE_REG(FUNC_ID) (ctx_addr_sig_regs[FUNC_ID][1])
433
434#define lower32(x) ((u32)((x) & 0xffffffff))
435#define upper32(x) ((u32)(((u64)(x) >> 32) & 0xffffffff))
436
437static struct netxen_recv_crb recv_crb_registers[] = {
438 /* Instance 0 */
439 {
440 /* crb_rcv_producer: */
441 {
442 NETXEN_NIC_REG(0x100),
443 /* Jumbo frames */
444 NETXEN_NIC_REG(0x110),
445 /* LRO */
446 NETXEN_NIC_REG(0x120)
447 },
448 /* crb_sts_consumer: */
449 NETXEN_NIC_REG(0x138),
450 },
451 /* Instance 1 */
452 {
453 /* crb_rcv_producer: */
454 {
455 NETXEN_NIC_REG(0x144),
456 /* Jumbo frames */
457 NETXEN_NIC_REG(0x154),
458 /* LRO */
459 NETXEN_NIC_REG(0x164)
460 },
461 /* crb_sts_consumer: */
462 NETXEN_NIC_REG(0x17c),
463 },
464 /* Instance 2 */
465 {
466 /* crb_rcv_producer: */
467 {
468 NETXEN_NIC_REG(0x1d8),
469 /* Jumbo frames */
470 NETXEN_NIC_REG(0x1f8),
471 /* LRO */
472 NETXEN_NIC_REG(0x208)
473 },
474 /* crb_sts_consumer: */
475 NETXEN_NIC_REG(0x220),
476 },
477 /* Instance 3 */
478 {
479 /* crb_rcv_producer: */
480 {
481 NETXEN_NIC_REG(0x22c),
482 /* Jumbo frames */
483 NETXEN_NIC_REG(0x23c),
484 /* LRO */
485 NETXEN_NIC_REG(0x24c)
486 },
487 /* crb_sts_consumer: */
488 NETXEN_NIC_REG(0x264),
489 },
490};
491
492static int
493netxen_init_old_ctx(struct netxen_adapter *adapter)
494{
495 struct netxen_recv_context *recv_ctx;
496 struct nx_host_rds_ring *rds_ring;
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000497 struct nx_host_sds_ring *sds_ring;
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000498 struct nx_host_tx_ring *tx_ring;
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000499 int ring;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700500 int func_id = adapter->portnum;
501
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000502 tx_ring = &adapter->tx_ring;
503 adapter->ctx_desc->cmd_ring_addr = cpu_to_le64(tx_ring->phys_addr);
504 adapter->ctx_desc->cmd_ring_size = cpu_to_le32(tx_ring->num_desc);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700505
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000506 recv_ctx = &adapter->recv_ctx;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700507
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000508 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
509 rds_ring = &recv_ctx->rds_rings[ring];
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700510
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000511 adapter->ctx_desc->rcv_ctx[ring].rcv_ring_addr =
512 cpu_to_le64(rds_ring->phys_addr);
513 adapter->ctx_desc->rcv_ctx[ring].rcv_ring_size =
Dhananjay Phadke438627c2009-03-13 14:52:03 +0000514 cpu_to_le32(rds_ring->num_desc);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700515 }
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000516 sds_ring = &recv_ctx->sds_rings[0];
517 adapter->ctx_desc->sts_ring_addr = cpu_to_le64(sds_ring->phys_addr);
518 adapter->ctx_desc->sts_ring_size = cpu_to_le32(sds_ring->num_desc);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700519
520 adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_LO(func_id),
521 lower32(adapter->ctx_desc_phys_addr));
522 adapter->pci_write_normalize(adapter, CRB_CTX_ADDR_REG_HI(func_id),
523 upper32(adapter->ctx_desc_phys_addr));
524 adapter->pci_write_normalize(adapter, CRB_CTX_SIGNATURE_REG(func_id),
525 NETXEN_CTX_SIGNATURE | func_id);
526 return 0;
527}
528
529static uint32_t sw_int_mask[4] = {
530 CRB_SW_INT_MASK_0, CRB_SW_INT_MASK_1,
531 CRB_SW_INT_MASK_2, CRB_SW_INT_MASK_3
532};
533
534int netxen_alloc_hw_resources(struct netxen_adapter *adapter)
535{
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700536 void *addr;
537 int err = 0;
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000538 int ring;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700539 struct netxen_recv_context *recv_ctx;
540 struct nx_host_rds_ring *rds_ring;
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000541 struct nx_host_sds_ring *sds_ring;
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000542 struct nx_host_tx_ring *tx_ring = &adapter->tx_ring;
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000543
544 struct pci_dev *pdev = adapter->pdev;
545 struct net_device *netdev = adapter->netdev;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700546
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000547 addr = pci_alloc_consistent(pdev,
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700548 sizeof(struct netxen_ring_ctx) + sizeof(uint32_t),
549 &adapter->ctx_desc_phys_addr);
550
551 if (addr == NULL) {
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000552 dev_err(&pdev->dev, "failed to allocate hw context\n");
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700553 return -ENOMEM;
554 }
555 memset(addr, 0, sizeof(struct netxen_ring_ctx));
556 adapter->ctx_desc = (struct netxen_ring_ctx *)addr;
557 adapter->ctx_desc->ctx_id = cpu_to_le32(adapter->portnum);
558 adapter->ctx_desc->cmd_consumer_offset =
559 cpu_to_le64(adapter->ctx_desc_phys_addr +
560 sizeof(struct netxen_ring_ctx));
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000561 tx_ring->hw_consumer =
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700562 (__le32 *)(((char *)addr) + sizeof(struct netxen_ring_ctx));
563
564 /* cmd desc ring */
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000565 addr = pci_alloc_consistent(pdev, TX_DESC_RINGSIZE(tx_ring),
566 &tx_ring->phys_addr);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700567
568 if (addr == NULL) {
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000569 dev_err(&pdev->dev, "%s: failed to allocate tx desc ring\n",
570 netdev->name);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700571 return -ENOMEM;
572 }
573
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000574 tx_ring->desc_head = (struct cmd_desc_type0 *)addr;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700575
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000576 recv_ctx = &adapter->recv_ctx;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700577
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000578 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000579 rds_ring = &recv_ctx->rds_rings[ring];
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700580 addr = pci_alloc_consistent(adapter->pdev,
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000581 RCV_DESC_RINGSIZE(rds_ring),
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000582 &rds_ring->phys_addr);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700583 if (addr == NULL) {
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000584 dev_err(&pdev->dev,
585 "%s: failed to allocate rds ring [%d]\n",
586 netdev->name, ring);
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700587 err = -ENOMEM;
588 goto err_out_free;
589 }
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000590 rds_ring->desc_head = (struct rcv_desc *)addr;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700591
592 if (adapter->fw_major < 4)
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000593 rds_ring->crb_rcv_producer =
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700594 recv_crb_registers[adapter->portnum].
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000595 crb_rcv_producer[ring];
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700596 }
597
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000598 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
599 sds_ring = &recv_ctx->sds_rings[ring];
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000600
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000601 addr = pci_alloc_consistent(adapter->pdev,
602 STATUS_DESC_RINGSIZE(sds_ring),
603 &sds_ring->phys_addr);
604 if (addr == NULL) {
605 dev_err(&pdev->dev,
606 "%s: failed to allocate sds ring [%d]\n",
607 netdev->name, ring);
608 err = -ENOMEM;
609 goto err_out_free;
610 }
611 sds_ring->desc_head = (struct status_desc *)addr;
612 }
613
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000614
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700615 if (adapter->fw_major >= 4) {
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700616 err = nx_fw_cmd_create_rx_ctx(adapter);
617 if (err)
618 goto err_out_free;
619 err = nx_fw_cmd_create_tx_ctx(adapter);
620 if (err)
621 goto err_out_free;
622 } else {
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000623 sds_ring = &recv_ctx->sds_rings[0];
624 sds_ring->crb_sts_consumer =
625 recv_crb_registers[adapter->portnum].crb_sts_consumer;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700626
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000627 recv_ctx->sds_rings[0].crb_intr_mask =
628 sw_int_mask[adapter->portnum];
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700629
630 err = netxen_init_old_ctx(adapter);
631 if (err) {
632 netxen_free_hw_resources(adapter);
633 return err;
634 }
635
636 }
637
638 return 0;
639
640err_out_free:
641 netxen_free_hw_resources(adapter);
642 return err;
643}
644
645void netxen_free_hw_resources(struct netxen_adapter *adapter)
646{
647 struct netxen_recv_context *recv_ctx;
648 struct nx_host_rds_ring *rds_ring;
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000649 struct nx_host_sds_ring *sds_ring;
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000650 struct nx_host_tx_ring *tx_ring;
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000651 int ring;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700652
653 if (adapter->fw_major >= 4) {
654 nx_fw_cmd_destroy_tx_ctx(adapter);
655 nx_fw_cmd_destroy_rx_ctx(adapter);
656 }
657
658 if (adapter->ctx_desc != NULL) {
659 pci_free_consistent(adapter->pdev,
660 sizeof(struct netxen_ring_ctx) +
661 sizeof(uint32_t),
662 adapter->ctx_desc,
663 adapter->ctx_desc_phys_addr);
664 adapter->ctx_desc = NULL;
665 }
666
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000667 tx_ring = &adapter->tx_ring;
668 if (tx_ring->desc_head != NULL) {
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700669 pci_free_consistent(adapter->pdev,
Dhananjay Phadked877f1e2009-04-07 22:50:40 +0000670 TX_DESC_RINGSIZE(tx_ring),
671 tx_ring->desc_head, tx_ring->phys_addr);
672 tx_ring->desc_head = NULL;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700673 }
674
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000675 recv_ctx = &adapter->recv_ctx;
676 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
677 rds_ring = &recv_ctx->rds_rings[ring];
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700678
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000679 if (rds_ring->desc_head != NULL) {
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700680 pci_free_consistent(adapter->pdev,
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000681 RCV_DESC_RINGSIZE(rds_ring),
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000682 rds_ring->desc_head,
683 rds_ring->phys_addr);
684 rds_ring->desc_head = NULL;
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700685 }
686 }
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000687
Dhananjay Phadked8b100c2009-03-13 14:52:05 +0000688 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
689 sds_ring = &recv_ctx->sds_rings[ring];
690
691 if (sds_ring->desc_head != NULL) {
692 pci_free_consistent(adapter->pdev,
693 STATUS_DESC_RINGSIZE(sds_ring),
694 sds_ring->desc_head,
695 sds_ring->phys_addr);
696 sds_ring->desc_head = NULL;
697 }
Dhananjay Phadkebecf46a2009-03-09 08:50:55 +0000698 }
Dhananjay Phadked9e651b2008-07-21 19:44:08 -0700699}
700