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Kumar Galad0fc2ea2008-07-07 11:28:33 -05001* Freescale 83xx DMA Controller
2
3Freescale PowerPC 83xx have on chip general purpose DMA controllers.
4
5Required properties:
6
7- compatible : compatible list, contains 2 entries, first is
8 "fsl,CHIP-dma", where CHIP is the processor
9 (mpc8349, mpc8360, etc.) and the second is
10 "fsl,elo-dma"
11- reg : <registers mapping for DMA general status reg>
12- ranges : Should be defined as specified in 1) to describe the
13 DMA controller channels.
14- cell-index : controller index. 0 for controller @ 0x8100
15- interrupts : <interrupt mapping for DMA IRQ>
16- interrupt-parent : optional, if needed for interrupt mapping
17
18
19- DMA channel nodes:
20 - compatible : compatible list, contains 2 entries, first is
21 "fsl,CHIP-dma-channel", where CHIP is the processor
22 (mpc8349, mpc8350, etc.) and the second is
Timur Tabib56c2762008-10-10 11:52:31 -050023 "fsl,elo-dma-channel". However, see note below.
Kumar Galad0fc2ea2008-07-07 11:28:33 -050024 - reg : <registers mapping for channel>
25 - cell-index : dma channel index starts at 0.
26
27Optional properties:
28 - interrupts : <interrupt mapping for DMA channel IRQ>
29 (on 83xx this is expected to be identical to
30 the interrupts property of the parent node)
31 - interrupt-parent : optional, if needed for interrupt mapping
32
33Example:
34 dma@82a8 {
35 #address-cells = <1>;
36 #size-cells = <1>;
37 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +010038 reg = <0x82a8 4>;
39 ranges = <0 0x8100 0x1a4>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -050040 interrupt-parent = <&ipic>;
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +010041 interrupts = <71 8>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -050042 cell-index = <0>;
43 dma-channel@0 {
44 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
45 cell-index = <0>;
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +010046 reg = <0 0x80>;
Ira Snyderd3f620b2010-01-06 13:34:04 +000047 interrupt-parent = <&ipic>;
48 interrupts = <71 8>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -050049 };
50 dma-channel@80 {
51 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
52 cell-index = <1>;
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +010053 reg = <0x80 0x80>;
Ira Snyderd3f620b2010-01-06 13:34:04 +000054 interrupt-parent = <&ipic>;
55 interrupts = <71 8>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -050056 };
57 dma-channel@100 {
58 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
59 cell-index = <2>;
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +010060 reg = <0x100 0x80>;
Ira Snyderd3f620b2010-01-06 13:34:04 +000061 interrupt-parent = <&ipic>;
62 interrupts = <71 8>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -050063 };
64 dma-channel@180 {
65 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
66 cell-index = <3>;
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +010067 reg = <0x180 0x80>;
Ira Snyderd3f620b2010-01-06 13:34:04 +000068 interrupt-parent = <&ipic>;
69 interrupts = <71 8>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -050070 };
71 };
72
73* Freescale 85xx/86xx DMA Controller
74
75Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
76
77Required properties:
78
79- compatible : compatible list, contains 2 entries, first is
80 "fsl,CHIP-dma", where CHIP is the processor
81 (mpc8540, mpc8540, etc.) and the second is
82 "fsl,eloplus-dma"
83- reg : <registers mapping for DMA general status reg>
84- cell-index : controller index. 0 for controller @ 0x21000,
85 1 for controller @ 0xc000
86- ranges : Should be defined as specified in 1) to describe the
87 DMA controller channels.
88
89- DMA channel nodes:
90 - compatible : compatible list, contains 2 entries, first is
91 "fsl,CHIP-dma-channel", where CHIP is the processor
92 (mpc8540, mpc8560, etc.) and the second is
Timur Tabib56c2762008-10-10 11:52:31 -050093 "fsl,eloplus-dma-channel". However, see note below.
Kumar Galad0fc2ea2008-07-07 11:28:33 -050094 - cell-index : dma channel index starts at 0.
95 - reg : <registers mapping for channel>
96 - interrupts : <interrupt mapping for DMA channel IRQ>
97 - interrupt-parent : optional, if needed for interrupt mapping
98
99Example:
100 dma@21300 {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +0100104 reg = <0x21300 4>;
105 ranges = <0 0x21100 0x200>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -0500106 cell-index = <0>;
107 dma-channel@0 {
108 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +0100109 reg = <0 0x80>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -0500110 cell-index = <0>;
111 interrupt-parent = <&mpic>;
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +0100112 interrupts = <20 2>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -0500113 };
114 dma-channel@80 {
115 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +0100116 reg = <0x80 0x80>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -0500117 cell-index = <1>;
118 interrupt-parent = <&mpic>;
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +0100119 interrupts = <21 2>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -0500120 };
121 dma-channel@100 {
122 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +0100123 reg = <0x100 0x80>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -0500124 cell-index = <2>;
125 interrupt-parent = <&mpic>;
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +0100126 interrupts = <22 2>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -0500127 };
128 dma-channel@180 {
129 compatible = "fsl,mpc8540-dma-channel", "fsl,eloplus-dma-channel";
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +0100130 reg = <0x180 0x80>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -0500131 cell-index = <3>;
132 interrupt-parent = <&mpic>;
Peter Korsgaardb4f7ec42009-01-14 15:52:41 +0100133 interrupts = <23 2>;
Kumar Galad0fc2ea2008-07-07 11:28:33 -0500134 };
135 };
Timur Tabib56c2762008-10-10 11:52:31 -0500136
137Note on DMA channel compatible properties: The compatible property must say
138"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel" to be used by the Elo DMA
139driver (fsldma). Any DMA channel used by fsldma cannot be used by another
140DMA driver, such as the SSI sound drivers for the MPC8610. Therefore, any DMA
141channel that should be used for another driver should not use
142"fsl,elo-dma-channel" or "fsl,eloplus-dma-channel". For the SSI drivers, for
143example, the compatible property should be "fsl,ssi-dma-channel". See ssi.txt
144for more information.