Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2007 David Airlie |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 21 | * DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * David Airlie |
| 25 | */ |
| 26 | #include <linux/module.h> |
| 27 | #include <linux/slab.h> |
Alex Deucher | 7c1fa1d | 2016-08-27 12:37:22 -0400 | [diff] [blame] | 28 | #include <linux/pm_runtime.h> |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 29 | |
| 30 | #include <drm/drmP.h> |
| 31 | #include <drm/drm_crtc.h> |
| 32 | #include <drm/drm_crtc_helper.h> |
| 33 | #include <drm/amdgpu_drm.h> |
| 34 | #include "amdgpu.h" |
Marek Olšák | fbd76d5 | 2015-05-14 23:48:26 +0200 | [diff] [blame] | 35 | #include "cikd.h" |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 36 | |
| 37 | #include <drm/drm_fb_helper.h> |
| 38 | |
| 39 | #include <linux/vga_switcheroo.h> |
| 40 | |
| 41 | /* object hierarchy - |
| 42 | this contains a helper + a amdgpu fb |
| 43 | the helper contains a pointer to amdgpu framebuffer baseclass. |
| 44 | */ |
| 45 | struct amdgpu_fbdev { |
| 46 | struct drm_fb_helper helper; |
| 47 | struct amdgpu_framebuffer rfb; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 48 | struct amdgpu_device *adev; |
| 49 | }; |
| 50 | |
Alex Deucher | 7c1fa1d | 2016-08-27 12:37:22 -0400 | [diff] [blame] | 51 | static int |
| 52 | amdgpufb_open(struct fb_info *info, int user) |
| 53 | { |
| 54 | struct amdgpu_fbdev *rfbdev = info->par; |
| 55 | struct amdgpu_device *adev = rfbdev->adev; |
| 56 | int ret = pm_runtime_get_sync(adev->ddev->dev); |
| 57 | if (ret < 0 && ret != -EACCES) { |
| 58 | pm_runtime_mark_last_busy(adev->ddev->dev); |
| 59 | pm_runtime_put_autosuspend(adev->ddev->dev); |
| 60 | return ret; |
| 61 | } |
| 62 | return 0; |
| 63 | } |
| 64 | |
| 65 | static int |
| 66 | amdgpufb_release(struct fb_info *info, int user) |
| 67 | { |
| 68 | struct amdgpu_fbdev *rfbdev = info->par; |
| 69 | struct amdgpu_device *adev = rfbdev->adev; |
| 70 | |
| 71 | pm_runtime_mark_last_busy(adev->ddev->dev); |
| 72 | pm_runtime_put_autosuspend(adev->ddev->dev); |
| 73 | return 0; |
| 74 | } |
| 75 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 76 | static struct fb_ops amdgpufb_ops = { |
| 77 | .owner = THIS_MODULE, |
Stefan Christ | ea4ffff | 2016-11-14 00:03:13 +0100 | [diff] [blame] | 78 | DRM_FB_HELPER_DEFAULT_OPS, |
Alex Deucher | 7c1fa1d | 2016-08-27 12:37:22 -0400 | [diff] [blame] | 79 | .fb_open = amdgpufb_open, |
| 80 | .fb_release = amdgpufb_release, |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 81 | .fb_fillrect = drm_fb_helper_cfb_fillrect, |
| 82 | .fb_copyarea = drm_fb_helper_cfb_copyarea, |
| 83 | .fb_imageblit = drm_fb_helper_cfb_imageblit, |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 84 | }; |
| 85 | |
| 86 | |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 87 | int amdgpu_align_pitch(struct amdgpu_device *adev, int width, int cpp, bool tiled) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 88 | { |
| 89 | int aligned = width; |
| 90 | int pitch_mask = 0; |
| 91 | |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 92 | switch (cpp) { |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 93 | case 1: |
| 94 | pitch_mask = 255; |
| 95 | break; |
| 96 | case 2: |
| 97 | pitch_mask = 127; |
| 98 | break; |
| 99 | case 3: |
| 100 | case 4: |
| 101 | pitch_mask = 63; |
| 102 | break; |
| 103 | } |
| 104 | |
| 105 | aligned += pitch_mask; |
| 106 | aligned &= ~pitch_mask; |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 107 | return aligned * cpp; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 108 | } |
| 109 | |
| 110 | static void amdgpufb_destroy_pinned_object(struct drm_gem_object *gobj) |
| 111 | { |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 112 | struct amdgpu_bo *abo = gem_to_amdgpu_bo(gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 113 | int ret; |
| 114 | |
Michel Dänzer | c81a1a7 | 2017-04-28 17:28:14 +0900 | [diff] [blame] | 115 | ret = amdgpu_bo_reserve(abo, true); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 116 | if (likely(ret == 0)) { |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 117 | amdgpu_bo_kunmap(abo); |
| 118 | amdgpu_bo_unpin(abo); |
| 119 | amdgpu_bo_unreserve(abo); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 120 | } |
| 121 | drm_gem_object_unreference_unlocked(gobj); |
| 122 | } |
| 123 | |
| 124 | static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev, |
| 125 | struct drm_mode_fb_cmd2 *mode_cmd, |
| 126 | struct drm_gem_object **gobj_p) |
| 127 | { |
| 128 | struct amdgpu_device *adev = rfbdev->adev; |
| 129 | struct drm_gem_object *gobj = NULL; |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 130 | struct amdgpu_bo *abo = NULL; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 131 | bool fb_tiled = false; /* useful for testing */ |
| 132 | u32 tiling_flags = 0; |
| 133 | int ret; |
| 134 | int aligned_size, size; |
| 135 | int height = mode_cmd->height; |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 136 | u32 cpp; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 137 | |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 138 | cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 139 | |
| 140 | /* need to align pitch with crtc limits */ |
Laurent Pinchart | 8e911ab | 2016-10-18 01:41:17 +0300 | [diff] [blame] | 141 | mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp, |
| 142 | fb_tiled); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 143 | |
| 144 | height = ALIGN(mode_cmd->height, 8); |
| 145 | size = mode_cmd->pitches[0] * height; |
| 146 | aligned_size = ALIGN(size, PAGE_SIZE); |
| 147 | ret = amdgpu_gem_object_create(adev, aligned_size, 0, |
| 148 | AMDGPU_GEM_DOMAIN_VRAM, |
Christian König | 03f48dd | 2016-08-15 17:00:22 +0200 | [diff] [blame] | 149 | AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED | |
Pixel Ding | cbabc8b | 2017-01-24 11:39:48 +0800 | [diff] [blame] | 150 | AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS | |
| 151 | AMDGPU_GEM_CREATE_VRAM_CLEARED, |
Alex Deucher | 857d913 | 2015-08-27 00:14:16 -0400 | [diff] [blame] | 152 | true, &gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 153 | if (ret) { |
Joe Perches | 7ca8529 | 2017-02-28 04:55:52 -0800 | [diff] [blame] | 154 | pr_err("failed to allocate framebuffer (%d)\n", aligned_size); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 155 | return -ENOMEM; |
| 156 | } |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 157 | abo = gem_to_amdgpu_bo(gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 158 | |
| 159 | if (fb_tiled) |
Marek Olšák | fbd76d5 | 2015-05-14 23:48:26 +0200 | [diff] [blame] | 160 | tiling_flags = AMDGPU_TILING_SET(ARRAY_MODE, GRPH_ARRAY_2D_TILED_THIN1); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 161 | |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 162 | ret = amdgpu_bo_reserve(abo, false); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 163 | if (unlikely(ret != 0)) |
| 164 | goto out_unref; |
| 165 | |
| 166 | if (tiling_flags) { |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 167 | ret = amdgpu_bo_set_tiling_flags(abo, |
Marek Olšák | 63ab1c2 | 2015-05-14 23:03:57 +0200 | [diff] [blame] | 168 | tiling_flags); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 169 | if (ret) |
| 170 | dev_err(adev->dev, "FB failed to set tiling flags\n"); |
| 171 | } |
| 172 | |
| 173 | |
Alex Deucher | 7fe2857 | 2016-12-07 16:14:38 -0500 | [diff] [blame] | 174 | ret = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, NULL); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 175 | if (ret) { |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 176 | amdgpu_bo_unreserve(abo); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 177 | goto out_unref; |
| 178 | } |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 179 | ret = amdgpu_bo_kmap(abo, NULL); |
| 180 | amdgpu_bo_unreserve(abo); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 181 | if (ret) { |
| 182 | goto out_unref; |
| 183 | } |
| 184 | |
| 185 | *gobj_p = gobj; |
| 186 | return 0; |
| 187 | out_unref: |
| 188 | amdgpufb_destroy_pinned_object(gobj); |
| 189 | *gobj_p = NULL; |
| 190 | return ret; |
| 191 | } |
| 192 | |
| 193 | static int amdgpufb_create(struct drm_fb_helper *helper, |
| 194 | struct drm_fb_helper_surface_size *sizes) |
| 195 | { |
| 196 | struct amdgpu_fbdev *rfbdev = (struct amdgpu_fbdev *)helper; |
| 197 | struct amdgpu_device *adev = rfbdev->adev; |
| 198 | struct fb_info *info; |
| 199 | struct drm_framebuffer *fb = NULL; |
| 200 | struct drm_mode_fb_cmd2 mode_cmd; |
| 201 | struct drm_gem_object *gobj = NULL; |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 202 | struct amdgpu_bo *abo = NULL; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 203 | int ret; |
| 204 | unsigned long tmp; |
| 205 | |
| 206 | mode_cmd.width = sizes->surface_width; |
| 207 | mode_cmd.height = sizes->surface_height; |
| 208 | |
| 209 | if (sizes->surface_bpp == 24) |
| 210 | sizes->surface_bpp = 32; |
| 211 | |
| 212 | mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp, |
| 213 | sizes->surface_depth); |
| 214 | |
| 215 | ret = amdgpufb_create_pinned_object(rfbdev, &mode_cmd, &gobj); |
| 216 | if (ret) { |
| 217 | DRM_ERROR("failed to create fbcon object %d\n", ret); |
| 218 | return ret; |
| 219 | } |
| 220 | |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 221 | abo = gem_to_amdgpu_bo(gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 222 | |
| 223 | /* okay we have an object now allocate the framebuffer */ |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 224 | info = drm_fb_helper_alloc_fbi(helper); |
| 225 | if (IS_ERR(info)) { |
| 226 | ret = PTR_ERR(info); |
Daniel Vetter | da7bdda | 2017-02-07 17:16:03 +0100 | [diff] [blame] | 227 | goto out; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 228 | } |
| 229 | |
| 230 | info->par = rfbdev; |
Alex Deucher | df7989f | 2015-11-02 10:52:32 -0500 | [diff] [blame] | 231 | info->skip_vt_switch = true; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 232 | |
| 233 | ret = amdgpu_framebuffer_init(adev->ddev, &rfbdev->rfb, &mode_cmd, gobj); |
| 234 | if (ret) { |
| 235 | DRM_ERROR("failed to initialize framebuffer %d\n", ret); |
Daniel Vetter | da7bdda | 2017-02-07 17:16:03 +0100 | [diff] [blame] | 236 | goto out; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 237 | } |
| 238 | |
| 239 | fb = &rfbdev->rfb.base; |
| 240 | |
| 241 | /* setup helper */ |
| 242 | rfbdev->helper.fb = fb; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 243 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 244 | strcpy(info->fix.id, "amdgpudrmfb"); |
| 245 | |
Ville Syrjälä | b00c600 | 2016-12-14 23:31:35 +0200 | [diff] [blame] | 246 | drm_fb_helper_fill_fix(info, fb->pitches[0], fb->format->depth); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 247 | |
| 248 | info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT; |
| 249 | info->fbops = &amdgpufb_ops; |
| 250 | |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 251 | tmp = amdgpu_bo_gpu_offset(abo) - adev->mc.vram_start; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 252 | info->fix.smem_start = adev->mc.aper_base + tmp; |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 253 | info->fix.smem_len = amdgpu_bo_size(abo); |
| 254 | info->screen_base = abo->kptr; |
| 255 | info->screen_size = amdgpu_bo_size(abo); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 256 | |
| 257 | drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); |
| 258 | |
| 259 | /* setup aperture base/size for vesafb takeover */ |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 260 | info->apertures->ranges[0].base = adev->ddev->mode_config.fb_base; |
| 261 | info->apertures->ranges[0].size = adev->mc.aper_size; |
| 262 | |
| 263 | /* Use default scratch pixmap (info->pixmap.flags = FB_PIXMAP_SYSTEM) */ |
| 264 | |
| 265 | if (info->screen_base == NULL) { |
| 266 | ret = -ENOSPC; |
Daniel Vetter | da7bdda | 2017-02-07 17:16:03 +0100 | [diff] [blame] | 267 | goto out; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 268 | } |
| 269 | |
| 270 | DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); |
| 271 | DRM_INFO("vram apper at 0x%lX\n", (unsigned long)adev->mc.aper_base); |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 272 | DRM_INFO("size %lu\n", (unsigned long)amdgpu_bo_size(abo)); |
Ville Syrjälä | b00c600 | 2016-12-14 23:31:35 +0200 | [diff] [blame] | 273 | DRM_INFO("fb depth is %d\n", fb->format->depth); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 274 | DRM_INFO(" pitch is %d\n", fb->pitches[0]); |
| 275 | |
| 276 | vga_switcheroo_client_fb_set(adev->ddev->pdev, info); |
| 277 | return 0; |
| 278 | |
Daniel Vetter | da7bdda | 2017-02-07 17:16:03 +0100 | [diff] [blame] | 279 | out: |
Christian König | 765e7fb | 2016-09-15 15:06:50 +0200 | [diff] [blame] | 280 | if (abo) { |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 281 | |
| 282 | } |
| 283 | if (fb && ret) { |
Daniel Vetter | a9906fd | 2015-11-23 10:32:37 +0100 | [diff] [blame] | 284 | drm_gem_object_unreference_unlocked(gobj); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 285 | drm_framebuffer_unregister_private(fb); |
| 286 | drm_framebuffer_cleanup(fb); |
| 287 | kfree(fb); |
| 288 | } |
| 289 | return ret; |
| 290 | } |
| 291 | |
| 292 | void amdgpu_fb_output_poll_changed(struct amdgpu_device *adev) |
| 293 | { |
| 294 | if (adev->mode_info.rfbdev) |
| 295 | drm_fb_helper_hotplug_event(&adev->mode_info.rfbdev->helper); |
| 296 | } |
| 297 | |
| 298 | static int amdgpu_fbdev_destroy(struct drm_device *dev, struct amdgpu_fbdev *rfbdev) |
| 299 | { |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 300 | struct amdgpu_framebuffer *rfb = &rfbdev->rfb; |
| 301 | |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 302 | drm_fb_helper_unregister_fbi(&rfbdev->helper); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 303 | |
| 304 | if (rfb->obj) { |
| 305 | amdgpufb_destroy_pinned_object(rfb->obj); |
| 306 | rfb->obj = NULL; |
| 307 | } |
| 308 | drm_fb_helper_fini(&rfbdev->helper); |
| 309 | drm_framebuffer_unregister_private(&rfb->base); |
| 310 | drm_framebuffer_cleanup(&rfb->base); |
| 311 | |
| 312 | return 0; |
| 313 | } |
| 314 | |
| 315 | /** Sets the color ramps on behalf of fbcon */ |
| 316 | static void amdgpu_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
| 317 | u16 blue, int regno) |
| 318 | { |
| 319 | struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); |
| 320 | |
| 321 | amdgpu_crtc->lut_r[regno] = red >> 6; |
| 322 | amdgpu_crtc->lut_g[regno] = green >> 6; |
| 323 | amdgpu_crtc->lut_b[regno] = blue >> 6; |
| 324 | } |
| 325 | |
| 326 | /** Gets the color ramps on behalf of fbcon */ |
| 327 | static void amdgpu_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
| 328 | u16 *blue, int regno) |
| 329 | { |
| 330 | struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc); |
| 331 | |
| 332 | *red = amdgpu_crtc->lut_r[regno] << 6; |
| 333 | *green = amdgpu_crtc->lut_g[regno] << 6; |
| 334 | *blue = amdgpu_crtc->lut_b[regno] << 6; |
| 335 | } |
| 336 | |
| 337 | static const struct drm_fb_helper_funcs amdgpu_fb_helper_funcs = { |
| 338 | .gamma_set = amdgpu_crtc_fb_gamma_set, |
| 339 | .gamma_get = amdgpu_crtc_fb_gamma_get, |
| 340 | .fb_probe = amdgpufb_create, |
| 341 | }; |
| 342 | |
| 343 | int amdgpu_fbdev_init(struct amdgpu_device *adev) |
| 344 | { |
| 345 | struct amdgpu_fbdev *rfbdev; |
| 346 | int bpp_sel = 32; |
| 347 | int ret; |
| 348 | |
| 349 | /* don't init fbdev on hw without DCE */ |
| 350 | if (!adev->mode_info.mode_config_initialized) |
| 351 | return 0; |
| 352 | |
Alex Deucher | f49d45c | 2016-01-26 00:30:33 -0500 | [diff] [blame] | 353 | /* don't init fbdev if there are no connectors */ |
| 354 | if (list_empty(&adev->ddev->mode_config.connector_list)) |
| 355 | return 0; |
| 356 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 357 | /* select 8 bpp console on low vram cards */ |
| 358 | if (adev->mc.real_vram_size <= (32*1024*1024)) |
| 359 | bpp_sel = 8; |
| 360 | |
| 361 | rfbdev = kzalloc(sizeof(struct amdgpu_fbdev), GFP_KERNEL); |
| 362 | if (!rfbdev) |
| 363 | return -ENOMEM; |
| 364 | |
| 365 | rfbdev->adev = adev; |
| 366 | adev->mode_info.rfbdev = rfbdev; |
| 367 | |
| 368 | drm_fb_helper_prepare(adev->ddev, &rfbdev->helper, |
| 369 | &amdgpu_fb_helper_funcs); |
| 370 | |
| 371 | ret = drm_fb_helper_init(adev->ddev, &rfbdev->helper, |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 372 | AMDGPUFB_CONN_LIMIT); |
| 373 | if (ret) { |
| 374 | kfree(rfbdev); |
| 375 | return ret; |
| 376 | } |
| 377 | |
| 378 | drm_fb_helper_single_add_all_connectors(&rfbdev->helper); |
| 379 | |
| 380 | /* disable all the possible outputs/crtcs before entering KMS mode */ |
| 381 | drm_helper_disable_unused_functions(adev->ddev); |
| 382 | |
| 383 | drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); |
| 384 | return 0; |
| 385 | } |
| 386 | |
| 387 | void amdgpu_fbdev_fini(struct amdgpu_device *adev) |
| 388 | { |
| 389 | if (!adev->mode_info.rfbdev) |
| 390 | return; |
| 391 | |
| 392 | amdgpu_fbdev_destroy(adev->ddev, adev->mode_info.rfbdev); |
| 393 | kfree(adev->mode_info.rfbdev); |
| 394 | adev->mode_info.rfbdev = NULL; |
| 395 | } |
| 396 | |
| 397 | void amdgpu_fbdev_set_suspend(struct amdgpu_device *adev, int state) |
| 398 | { |
| 399 | if (adev->mode_info.rfbdev) |
Archit Taneja | 2dbaf392 | 2015-07-31 16:22:00 +0530 | [diff] [blame] | 400 | drm_fb_helper_set_suspend(&adev->mode_info.rfbdev->helper, |
| 401 | state); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 402 | } |
| 403 | |
| 404 | int amdgpu_fbdev_total_size(struct amdgpu_device *adev) |
| 405 | { |
| 406 | struct amdgpu_bo *robj; |
| 407 | int size = 0; |
| 408 | |
| 409 | if (!adev->mode_info.rfbdev) |
| 410 | return 0; |
| 411 | |
| 412 | robj = gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.obj); |
| 413 | size += amdgpu_bo_size(robj); |
| 414 | return size; |
| 415 | } |
| 416 | |
| 417 | bool amdgpu_fbdev_robj_is_fb(struct amdgpu_device *adev, struct amdgpu_bo *robj) |
| 418 | { |
| 419 | if (!adev->mode_info.rfbdev) |
| 420 | return false; |
| 421 | if (robj == gem_to_amdgpu_bo(adev->mode_info.rfbdev->rfb.obj)) |
| 422 | return true; |
| 423 | return false; |
| 424 | } |
Alex Deucher | 8b7530b | 2015-10-02 16:59:34 -0400 | [diff] [blame] | 425 | |
| 426 | void amdgpu_fbdev_restore_mode(struct amdgpu_device *adev) |
| 427 | { |
| 428 | struct amdgpu_fbdev *afbdev = adev->mode_info.rfbdev; |
| 429 | struct drm_fb_helper *fb_helper; |
| 430 | int ret; |
| 431 | |
| 432 | if (!afbdev) |
| 433 | return; |
| 434 | |
| 435 | fb_helper = &afbdev->helper; |
| 436 | |
| 437 | ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper); |
| 438 | if (ret) |
| 439 | DRM_DEBUG("failed to restore crtc mode\n"); |
| 440 | } |