Benjamin Gaignard | 8f9359c | 2017-01-20 10:15:02 +0100 | [diff] [blame] | 1 | STM32 Timers driver bindings |
| 2 | |
| 3 | This IP provides 3 types of timer along with PWM functionality: |
| 4 | - advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable |
| 5 | prescaler, break input feature, PWM outputs and complementary PWM ouputs channels. |
| 6 | - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a |
| 7 | programmable prescaler and PWM outputs. |
| 8 | - basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler. |
| 9 | |
| 10 | Required parameters: |
| 11 | - compatible: must be "st,stm32-timers" |
| 12 | |
| 13 | - reg: Physical base address and length of the controller's |
| 14 | registers. |
| 15 | - clock-names: Set to "int". |
| 16 | - clocks: Phandle to the clock used by the timer module. |
| 17 | For Clk properties, please refer to ../clock/clock-bindings.txt |
| 18 | |
| 19 | Optional parameters: |
| 20 | - resets: Phandle to the parent reset controller. |
| 21 | See ../reset/st,stm32-rcc.txt |
| 22 | |
| 23 | Optional subnodes: |
| 24 | - pwm: See ../pwm/pwm-stm32.txt |
| 25 | - timer: See ../iio/timer/stm32-timer-trigger.txt |
| 26 | |
| 27 | Example: |
| 28 | timers@40010000 { |
| 29 | #address-cells = <1>; |
| 30 | #size-cells = <0>; |
| 31 | compatible = "st,stm32-timers"; |
| 32 | reg = <0x40010000 0x400>; |
| 33 | clocks = <&rcc 0 160>; |
Fabrice Gasnier | 9e69672 | 2017-06-14 17:13:14 +0200 | [diff] [blame] | 34 | clock-names = "int"; |
Benjamin Gaignard | 8f9359c | 2017-01-20 10:15:02 +0100 | [diff] [blame] | 35 | |
| 36 | pwm { |
| 37 | compatible = "st,stm32-pwm"; |
| 38 | pinctrl-0 = <&pwm1_pins>; |
| 39 | pinctrl-names = "default"; |
| 40 | }; |
| 41 | |
| 42 | timer@0 { |
| 43 | compatible = "st,stm32-timer-trigger"; |
| 44 | reg = <0>; |
| 45 | }; |
| 46 | }; |