blob: 69b760d5b11d0cbfe10e17d006c97c3b6ebd83f7 [file] [log] [blame]
Andrew Lunn82bb2da2012-11-17 17:00:45 +01001/ {
2 ocp@f1000000 {
3
4 pinctrl: pinctrl@10000 {
5 compatible = "marvell,88f6282-pinctrl";
6 reg = <0x10000 0x20>;
7
Nobuhiro Iwamatsu92904692012-12-23 11:34:36 +09008 pmx_nand: pmx-nand {
9 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3",
10 "mpp4", "mpp5", "mpp18", "mpp19";
11 marvell,function = "nand";
12 };
13
Andrew Lunn82bb2da2012-11-17 17:00:45 +010014 pmx_sata0: pmx-sata0 {
15 marvell,pins = "mpp5", "mpp21", "mpp23";
16 marvell,function = "sata0";
17 };
18 pmx_sata1: pmx-sata1 {
19 marvell,pins = "mpp4", "mpp20", "mpp22";
20 marvell,function = "sata1";
21 };
22 pmx_spi: pmx-spi {
23 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
24 marvell,function = "spi";
25 };
26 pmx_twsi0: pmx-twsi0 {
27 marvell,pins = "mpp8", "mpp9";
28 marvell,function = "twsi0";
29 };
Nobuhiro Iwamatsu00211e92012-12-23 11:34:34 +090030
31 pmx_twsi1: pmx-twsi1 {
32 marvell,pins = "mpp36", "mpp37";
33 marvell,function = "twsi1";
34 };
35
Andrew Lunn82bb2da2012-11-17 17:00:45 +010036 pmx_uart0: pmx-uart0 {
37 marvell,pins = "mpp10", "mpp11";
38 marvell,function = "uart0";
39 };
40
41 pmx_uart1: pmx-uart1 {
42 marvell,pins = "mpp13", "mpp14";
43 marvell,function = "uart1";
44 };
Thomas Petazzoni8059fc12012-12-21 15:49:13 +010045 pmx_sdio: pmx-sdio {
46 marvell,pins = "mpp12", "mpp13", "mpp14",
47 "mpp15", "mpp16", "mpp17";
48 marvell,function = "sdio";
49 };
Andrew Lunn82bb2da2012-11-17 17:00:45 +010050 };
Nobuhiro Iwamatsu083651f2012-11-23 06:58:34 +090051
Valentin Longchampdf6bf2e2013-05-27 17:40:32 +020052 rtc@10300 {
53 compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
54 reg = <0x10300 0x20>;
55 interrupts = <53>;
56 clocks = <&gate_clk 7>;
57 };
58
59 sata@80000 {
60 compatible = "marvell,orion-sata";
61 reg = <0x80000 0x5000>;
62 interrupts = <21>;
63 clocks = <&gate_clk 14>, <&gate_clk 15>;
64 clock-names = "0", "1";
65 status = "disabled";
66 };
67
68 mvsdio@90000 {
69 compatible = "marvell,orion-sdio";
70 reg = <0x90000 0x200>;
71 interrupts = <28>;
72 clocks = <&gate_clk 4>;
73 bus-width = <4>;
74 cap-sdio-irq;
75 cap-sd-highspeed;
76 cap-mmc-highspeed;
77 status = "disabled";
78 };
79
Nobuhiro Iwamatsu590c96b2013-02-06 07:35:25 +010080 thermal@10078 {
81 compatible = "marvell,kirkwood-thermal";
82 reg = <0x10078 0x4>;
83 status = "okay";
84 };
85
Nobuhiro Iwamatsu083651f2012-11-23 06:58:34 +090086 i2c@11100 {
87 compatible = "marvell,mv64xxx-i2c";
88 reg = <0x11100 0x20>;
89 #address-cells = <1>;
90 #size-cells = <0>;
91 interrupts = <32>;
92 clock-frequency = <100000>;
Nobuhiro Iwamatsu107c21c2013-01-06 11:10:36 +010093 clocks = <&gate_clk 7>;
Nobuhiro Iwamatsu083651f2012-11-23 06:58:34 +090094 status = "disabled";
95 };
Andrew Lunn82bb2da2012-11-17 17:00:45 +010096 };
Nobuhiro Iwamatsu083651f2012-11-23 06:58:34 +090097};