Jean Delvare | 5839427 | 2014-06-16 11:48:45 +0200 | [diff] [blame] | 1 | menu "Clock Source drivers" |
| 2 | |
Stephen Warren | ae278a9 | 2012-11-19 16:41:20 -0700 | [diff] [blame] | 3 | config CLKSRC_OF |
| 4 | bool |
| 5 | |
Russell King | 89c0b8e | 2011-05-08 18:47:58 +0100 | [diff] [blame] | 6 | config CLKSRC_I8253 |
| 7 | bool |
Russell King | 442c817 | 2011-05-08 14:06:52 +0100 | [diff] [blame] | 8 | |
Thomas Gleixner | e6220bd | 2011-06-09 13:08:25 +0000 | [diff] [blame] | 9 | config CLKEVT_I8253 |
| 10 | bool |
| 11 | |
Ralf Baechle | 15f304b | 2011-06-01 19:04:59 +0100 | [diff] [blame] | 12 | config I8253_LOCK |
| 13 | bool |
| 14 | |
| 15 | config CLKBLD_I8253 |
Thomas Gleixner | e6220bd | 2011-06-09 13:08:25 +0000 | [diff] [blame] | 16 | def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK |
Ralf Baechle | 15f304b | 2011-06-01 19:04:59 +0100 | [diff] [blame] | 17 | |
Russell King | 442c817 | 2011-05-08 14:06:52 +0100 | [diff] [blame] | 18 | config CLKSRC_MMIO |
| 19 | bool |
Jamie Iles | 06c3df4 | 2011-06-06 12:43:07 +0100 | [diff] [blame] | 20 | |
Baruch Siach | 9b8bb77 | 2015-01-26 20:35:18 +0200 | [diff] [blame] | 21 | config DIGICOLOR_TIMER |
| 22 | bool |
| 23 | |
Jamie Iles | 06c3df4 | 2011-06-06 12:43:07 +0100 | [diff] [blame] | 24 | config DW_APB_TIMER |
| 25 | bool |
Mattias Wallin | 489bcce | 2011-05-27 10:30:12 +0200 | [diff] [blame] | 26 | |
Dinh Nguyen | cfda590 | 2012-07-11 15:13:16 -0500 | [diff] [blame] | 27 | config DW_APB_TIMER_OF |
| 28 | bool |
Heiko Stuebner | 1b4eca0 | 2013-06-04 11:38:11 +0200 | [diff] [blame] | 29 | select DW_APB_TIMER |
Heiko Stuebner | 1002148 | 2013-06-04 11:38:42 +0200 | [diff] [blame] | 30 | select CLKSRC_OF |
Dinh Nguyen | cfda590 | 2012-07-11 15:13:16 -0500 | [diff] [blame] | 31 | |
Daniel Lezcano | 468b8c4 | 2015-01-25 22:06:02 +0100 | [diff] [blame] | 32 | config ROCKCHIP_TIMER |
| 33 | bool |
| 34 | select CLKSRC_OF |
| 35 | |
Gregory CLEMENT | 6fe9cbd | 2012-06-13 18:58:09 +0200 | [diff] [blame] | 36 | config ARMADA_370_XP_TIMER |
| 37 | bool |
Jean Pihet | 7b0dd72 | 2013-09-18 20:55:09 +0200 | [diff] [blame] | 38 | select CLKSRC_OF |
Gregory CLEMENT | 6fe9cbd | 2012-06-13 18:58:09 +0200 | [diff] [blame] | 39 | |
Carlo Caione | e4a6b37 | 2014-09-29 01:50:05 +0200 | [diff] [blame] | 40 | config MESON6_TIMER |
| 41 | bool |
Beniamino Galvani | 7b6b0a4 | 2014-11-18 16:41:20 +0100 | [diff] [blame] | 42 | select CLKSRC_MMIO |
Carlo Caione | e4a6b37 | 2014-09-29 01:50:05 +0200 | [diff] [blame] | 43 | |
Sebastian Hesselbarth | 0c1dcfd | 2013-06-11 08:38:50 +0200 | [diff] [blame] | 44 | config ORION_TIMER |
| 45 | select CLKSRC_OF |
| 46 | select CLKSRC_MMIO |
| 47 | bool |
| 48 | |
Maxime Ripard | 119fd63 | 2013-03-24 11:49:25 +0100 | [diff] [blame] | 49 | config SUN4I_TIMER |
Maxime Ripard | 71c568c | 2013-10-14 21:07:46 +0200 | [diff] [blame] | 50 | select CLKSRC_MMIO |
Maxime Ripard | b2ac5d7 | 2012-11-12 15:07:50 +0100 | [diff] [blame] | 51 | bool |
| 52 | |
Maxime Ripard | 6790554 | 2013-11-07 12:01:48 +0100 | [diff] [blame] | 53 | config SUN5I_HSTIMER |
| 54 | select CLKSRC_MMIO |
| 55 | bool |
| 56 | |
Thierry Reding | 910978e7 | 2014-07-07 15:26:30 +0200 | [diff] [blame] | 57 | config TEGRA_TIMER |
| 58 | bool |
| 59 | |
Tony Prisk | ff7ec34 | 2013-01-14 17:58:21 +1300 | [diff] [blame] | 60 | config VT8500_TIMER |
| 61 | bool |
| 62 | |
Michal Simek | 4f0f234 | 2013-03-20 10:46:01 +0100 | [diff] [blame] | 63 | config CADENCE_TTC_TIMER |
| 64 | bool |
| 65 | |
Daniel Lezcano | a8b1b9f | 2015-02-23 19:54:16 +0100 | [diff] [blame] | 66 | config ASM9260_TIMER |
| 67 | bool |
| 68 | select CLKSRC_MMIO |
| 69 | select CLKSRC_OF |
| 70 | |
Linus Walleij | 694e33a | 2012-10-18 14:01:25 +0200 | [diff] [blame] | 71 | config CLKSRC_NOMADIK_MTU |
| 72 | bool |
| 73 | depends on (ARCH_NOMADIK || ARCH_U8500) |
| 74 | select CLKSRC_MMIO |
| 75 | help |
| 76 | Support for Multi Timer Unit. MTU provides access |
| 77 | to multiple interrupt generating programmable |
| 78 | 32-bit free running decrementing counters. |
| 79 | |
| 80 | config CLKSRC_NOMADIK_MTU_SCHED_CLOCK |
| 81 | bool |
| 82 | depends on CLKSRC_NOMADIK_MTU |
| 83 | help |
| 84 | Use the Multi Timer Unit as the sched_clock. |
| 85 | |
Mattias Wallin | 489bcce | 2011-05-27 10:30:12 +0200 | [diff] [blame] | 86 | config CLKSRC_DBX500_PRCMU |
| 87 | bool "Clocksource PRCMU Timer" |
Linus Walleij | 29746f4 | 2012-04-13 13:16:31 +0200 | [diff] [blame] | 88 | depends on UX500_SOC_DB8500 |
Mattias Wallin | 489bcce | 2011-05-27 10:30:12 +0200 | [diff] [blame] | 89 | default y |
| 90 | help |
| 91 | Use the always on PRCMU Timer as clocksource |
| 92 | |
| 93 | config CLKSRC_DBX500_PRCMU_SCHED_CLOCK |
| 94 | bool "Clocksource PRCMU Timer sched_clock" |
Linus Walleij | 694e33a | 2012-10-18 14:01:25 +0200 | [diff] [blame] | 95 | depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK) |
Mattias Wallin | 489bcce | 2011-05-27 10:30:12 +0200 | [diff] [blame] | 96 | default y |
| 97 | help |
| 98 | Use the always on PRCMU Timer as sched_clock |
Marc Zyngier | 985c067 | 2012-03-05 11:49:30 +0000 | [diff] [blame] | 99 | |
Uwe Kleine-König | 9c9b781 | 2013-10-03 21:56:29 +0200 | [diff] [blame] | 100 | config CLKSRC_EFM32 |
| 101 | bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32 |
| 102 | depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST) |
Axel Lin | 09ca275 | 2013-11-20 10:15:11 +0800 | [diff] [blame] | 103 | select CLKSRC_MMIO |
Uwe Kleine-König | 9c9b781 | 2013-10-03 21:56:29 +0200 | [diff] [blame] | 104 | default ARCH_EFM32 |
| 105 | help |
| 106 | Support to use the timers of EFM32 SoCs as clock source and clock |
| 107 | event device. |
| 108 | |
Joachim Eastwood | 050dd32 | 2015-05-12 00:00:48 +0200 | [diff] [blame] | 109 | config CLKSRC_LPC32XX |
| 110 | bool |
| 111 | select CLKSRC_MMIO |
| 112 | select CLKSRC_OF |
| 113 | |
Maxime Coquelin | e37e459 | 2015-05-22 23:03:33 +0200 | [diff] [blame] | 114 | config CLKSRC_STM32 |
Paul Gortmaker | 1cb6c21 | 2015-06-20 19:02:32 -0400 | [diff] [blame] | 115 | bool "Clocksource for STM32 SoCs" if !ARCH_STM32 |
| 116 | depends on OF && ARM && (ARCH_STM32 || COMPILE_TEST) |
Maxime Coquelin | e37e459 | 2015-05-22 23:03:33 +0200 | [diff] [blame] | 117 | select CLKSRC_MMIO |
| 118 | |
Mark Rutland | 8a4da6e | 2012-11-12 14:33:44 +0000 | [diff] [blame] | 119 | config ARM_ARCH_TIMER |
| 120 | bool |
Rob Herring | 0583fe4 | 2013-04-10 18:27:51 -0500 | [diff] [blame] | 121 | select CLKSRC_OF if OF |
James Hogan | a2c5d4e | 2012-10-09 10:54:39 +0100 | [diff] [blame] | 122 | |
Will Deacon | 037f637 | 2013-08-23 15:32:29 +0100 | [diff] [blame] | 123 | config ARM_ARCH_TIMER_EVTSTREAM |
| 124 | bool "Support for ARM architected timer event stream generation" |
| 125 | default y if ARM_ARCH_TIMER |
Stephen Boyd | 77f7ce9 | 2013-11-20 12:02:03 -0800 | [diff] [blame] | 126 | depends on ARM_ARCH_TIMER |
Will Deacon | 037f637 | 2013-08-23 15:32:29 +0100 | [diff] [blame] | 127 | help |
| 128 | This option enables support for event stream generation based on |
| 129 | the ARM architected timer. It is used for waking up CPUs executing |
| 130 | the wfe instruction at a frequency represented as a power-of-2 |
| 131 | divisor of the clock rate. |
| 132 | The main use of the event stream is wfe-based timeouts of userspace |
| 133 | locking implementations. It might also be useful for imposing timeout |
| 134 | on wfe to safeguard against any programming errors in case an expected |
| 135 | event is not generated. |
| 136 | This must be disabled for hardware validation purposes to detect any |
| 137 | hardware anomalies of missing events. |
| 138 | |
Stuart Menefy | c1b40e4 | 2013-06-26 12:48:38 +0100 | [diff] [blame] | 139 | config ARM_GLOBAL_TIMER |
| 140 | bool |
| 141 | select CLKSRC_OF if OF |
| 142 | help |
| 143 | This options enables support for the ARM global timer unit |
| 144 | |
Sudeep Holla | 0b7402d | 2015-05-18 16:29:40 +0100 | [diff] [blame] | 145 | config ARM_TIMER_SP804 |
| 146 | bool "Support for Dual Timer SP804 module" |
Guenter Roeck | 002af19 | 2015-06-23 20:49:05 -0700 | [diff] [blame] | 147 | depends on GENERIC_SCHED_CLOCK && CLKDEV_LOOKUP |
Sudeep Holla | 0b7402d | 2015-05-18 16:29:40 +0100 | [diff] [blame] | 148 | select CLKSRC_MMIO |
| 149 | select CLKSRC_OF if OF |
| 150 | |
Stuart Menefy | c1b40e4 | 2013-06-26 12:48:38 +0100 | [diff] [blame] | 151 | config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK |
| 152 | bool |
| 153 | depends on ARM_GLOBAL_TIMER |
| 154 | default y |
| 155 | help |
| 156 | Use ARM global timer clock source as sched_clock |
| 157 | |
Maxime Coquelin | 4958ebb | 2015-05-09 09:53:46 +0200 | [diff] [blame] | 158 | config ARMV7M_SYSTICK |
| 159 | bool |
| 160 | select CLKSRC_OF if OF |
| 161 | select CLKSRC_MMIO |
| 162 | help |
| 163 | This options enables support for the ARMv7M system timer unit |
| 164 | |
Maxime Ripard | b052ff3 | 2014-09-02 18:12:35 +0200 | [diff] [blame] | 165 | config ATMEL_PIT |
| 166 | select CLKSRC_OF if OF |
| 167 | def_bool SOC_AT91SAM9 || SOC_SAMA5 |
| 168 | |
Alexandre Belloni | b53cdd0 | 2015-03-12 13:07:31 +0100 | [diff] [blame] | 169 | config ATMEL_ST |
| 170 | bool |
| 171 | select CLKSRC_OF |
Alexandre Belloni | 7ab7ef7 | 2015-03-19 14:17:48 +0100 | [diff] [blame] | 172 | select MFD_SYSCON |
Alexandre Belloni | b53cdd0 | 2015-03-12 13:07:31 +0100 | [diff] [blame] | 173 | |
James Hogan | a2c5d4e | 2012-10-09 10:54:39 +0100 | [diff] [blame] | 174 | config CLKSRC_METAG_GENERIC |
| 175 | def_bool y if METAG |
| 176 | help |
| 177 | This option enables support for the Meta per-thread timers. |
Thomas Abraham | 6938d75a | 2013-03-09 16:16:13 +0900 | [diff] [blame] | 178 | |
| 179 | config CLKSRC_EXYNOS_MCT |
| 180 | def_bool y if ARCH_EXYNOS |
Doug Anderson | 3252a64 | 2014-07-05 06:43:26 +0900 | [diff] [blame] | 181 | depends on !ARM64 |
Thomas Abraham | 6938d75a | 2013-03-09 16:16:13 +0900 | [diff] [blame] | 182 | help |
| 183 | Support for Multi Core Timer controller on Exynos SoCs. |
Arnd Bergmann | 241a987 | 2013-05-06 23:49:09 +0200 | [diff] [blame] | 184 | |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 185 | config CLKSRC_SAMSUNG_PWM |
Tomasz Figa | 77d8443 | 2013-04-23 17:46:23 +0200 | [diff] [blame] | 186 | bool |
Tomasz Figa | f118998 | 2013-04-20 23:22:13 +0200 | [diff] [blame] | 187 | help |
| 188 | This is a new clocksource driver for the PWM timer found in |
| 189 | Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver |
| 190 | for all devicetree enabled platforms. This driver will be |
| 191 | needed only on systems that do not have the Exynos MCT available. |
Jingchang Lu | c196724 | 2013-05-29 10:12:17 +0200 | [diff] [blame] | 192 | |
Xiubo Li | 2529c3a | 2014-05-23 10:12:04 +0200 | [diff] [blame] | 193 | config FSL_FTM_TIMER |
| 194 | bool |
| 195 | help |
| 196 | Support for Freescale FlexTimer Module (FTM) timer. |
| 197 | |
Jingchang Lu | c196724 | 2013-05-29 10:12:17 +0200 | [diff] [blame] | 198 | config VF_PIT_TIMER |
| 199 | bool |
| 200 | help |
| 201 | Support for Period Interrupt Timer on Freescale Vybrid Family SoCs. |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 202 | |
| 203 | config SYS_SUPPORTS_SH_CMT |
| 204 | bool |
| 205 | |
Matthias Brugger | ecb3530 | 2014-07-18 11:36:43 +0200 | [diff] [blame] | 206 | config MTK_TIMER |
| 207 | select CLKSRC_OF |
| 208 | select CLKSRC_MMIO |
| 209 | bool |
| 210 | |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 211 | config SYS_SUPPORTS_SH_MTU2 |
| 212 | bool |
| 213 | |
| 214 | config SYS_SUPPORTS_SH_TMU |
| 215 | bool |
| 216 | |
| 217 | config SYS_SUPPORTS_EM_STI |
| 218 | bool |
| 219 | |
| 220 | config SH_TIMER_CMT |
| 221 | bool "Renesas CMT timer driver" if COMPILE_TEST |
Geert Uytterhoeven | 87291a9 | 2014-03-20 15:05:50 +0100 | [diff] [blame] | 222 | depends on GENERIC_CLOCKEVENTS |
Richard Weinberger | 11bc26f | 2015-03-26 10:27:06 +0100 | [diff] [blame] | 223 | depends on HAS_IOMEM |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 224 | default SYS_SUPPORTS_SH_CMT |
| 225 | help |
| 226 | This enables build of a clocksource and clockevent driver for |
| 227 | the Compare Match Timer (CMT) hardware available in 16/32/48-bit |
| 228 | variants on a wide range of Mobile and Automotive SoCs from Renesas. |
| 229 | |
| 230 | config SH_TIMER_MTU2 |
| 231 | bool "Renesas MTU2 timer driver" if COMPILE_TEST |
Geert Uytterhoeven | 87291a9 | 2014-03-20 15:05:50 +0100 | [diff] [blame] | 232 | depends on GENERIC_CLOCKEVENTS |
Richard Weinberger | 11bc26f | 2015-03-26 10:27:06 +0100 | [diff] [blame] | 233 | depends on HAS_IOMEM |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 234 | default SYS_SUPPORTS_SH_MTU2 |
| 235 | help |
| 236 | This enables build of a clockevent driver for the Multi-Function |
Kuninori Morimoto | 7e13918 | 2014-07-18 11:36:36 +0200 | [diff] [blame] | 237 | Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas. |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 238 | This hardware comes with 16 bit-timer registers. |
| 239 | |
| 240 | config SH_TIMER_TMU |
| 241 | bool "Renesas TMU timer driver" if COMPILE_TEST |
Geert Uytterhoeven | 87291a9 | 2014-03-20 15:05:50 +0100 | [diff] [blame] | 242 | depends on GENERIC_CLOCKEVENTS |
Richard Weinberger | 11bc26f | 2015-03-26 10:27:06 +0100 | [diff] [blame] | 243 | depends on HAS_IOMEM |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 244 | default SYS_SUPPORTS_SH_TMU |
| 245 | help |
| 246 | This enables build of a clocksource and clockevent driver for |
| 247 | the 32-bit Timer Unit (TMU) hardware available on a wide range |
| 248 | SoCs from Renesas. |
| 249 | |
| 250 | config EM_TIMER_STI |
| 251 | bool "Renesas STI timer driver" if COMPILE_TEST |
Chen Gang | 40c9631 | 2014-07-08 20:39:40 +0800 | [diff] [blame] | 252 | depends on GENERIC_CLOCKEVENTS && HAS_IOMEM |
Magnus Damm | fd3f127 | 2014-02-20 12:54:45 +0100 | [diff] [blame] | 253 | default SYS_SUPPORTS_EM_STI |
| 254 | help |
| 255 | This enables build of a clocksource and clockevent driver for |
| 256 | the 48-bit System Timer (STI) hardware available on a SoCs |
| 257 | such as EMEV2 from former NEC Electronics. |
Linus Torvalds | dfc25e4 | 2014-04-05 13:51:19 -0700 | [diff] [blame] | 258 | |
Kumar Gala | 3f8e8ce | 2014-01-29 16:17:30 -0600 | [diff] [blame] | 259 | config CLKSRC_QCOM |
| 260 | bool |
Pawel Moll | 220e2a8 | 2014-04-16 18:22:59 +0100 | [diff] [blame] | 261 | |
| 262 | config CLKSRC_VERSATILE |
| 263 | bool "ARM Versatile (Express) reference platforms clock source" |
Deng-Cheng Zhu | ff37015 | 2015-03-07 10:30:22 -0800 | [diff] [blame] | 264 | depends on PLAT_VERSATILE && GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET |
Pawel Moll | 220e2a8 | 2014-04-16 18:22:59 +0100 | [diff] [blame] | 265 | select CLKSRC_OF |
| 266 | default y if MFD_VEXPRESS_SYSREG |
| 267 | help |
| 268 | This option enables clock source based on free running |
| 269 | counter available in the "System Registers" block of |
| 270 | ARM Versatile, RealView and Versatile Express reference |
| 271 | platforms. |
Jean Delvare | 5839427 | 2014-06-16 11:48:45 +0200 | [diff] [blame] | 272 | |
Andrew Bresticker | fa5635a | 2014-10-20 12:03:58 -0700 | [diff] [blame] | 273 | config CLKSRC_MIPS_GIC |
| 274 | bool |
| 275 | depends on MIPS_GIC |
Andrew Bresticker | e12aa82 | 2014-11-12 11:43:39 -0800 | [diff] [blame] | 276 | select CLKSRC_OF |
Andrew Bresticker | fa5635a | 2014-10-20 12:03:58 -0700 | [diff] [blame] | 277 | |
Dmitry Eremin-Solenikov | e074ff8 | 2014-12-21 16:07:09 +0100 | [diff] [blame] | 278 | config CLKSRC_PXA |
| 279 | def_bool y if ARCH_PXA || ARCH_SA1100 |
| 280 | select CLKSRC_OF if USE_OF |
| 281 | help |
| 282 | This enables OST0 support available on PXA and SA-11x0 |
| 283 | platforms. |
Yoshinori Sato | 618b902 | 2015-01-28 02:52:42 +0900 | [diff] [blame] | 284 | |
| 285 | config H8300_TMR16 |
| 286 | bool |
| 287 | |
| 288 | config H8300_TPU |
| 289 | bool |
| 290 | |
Shawn Guo | bea5af4 | 2015-05-15 15:41:00 +0800 | [diff] [blame] | 291 | config CLKSRC_IMX_GPT |
| 292 | bool "Clocksource using i.MX GPT" if COMPILE_TEST |
| 293 | depends on ARM && CLKDEV_LOOKUP |
| 294 | select CLKSRC_MMIO |
| 295 | |
Jean Delvare | 5839427 | 2014-06-16 11:48:45 +0200 | [diff] [blame] | 296 | endmenu |