blob: 352fc53e91b8d867a8eca20e626ae62d87f796d6 [file] [log] [blame]
Jayamohan Kallickal6733b392009-09-05 07:36:35 +05301/**
John Soni Jose5faf17b2012-10-20 04:45:27 +05302 * Copyright (C) 2005 - 2012 Emulex
Jayamohan Kallickal6733b392009-09-05 07:36:35 +05303 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
Jayamohan Kallickal255fa9a2011-03-25 14:23:57 -070011 * linux-drivers@emulex.com
Jayamohan Kallickal6733b392009-09-05 07:36:35 +053012 *
Jayamohan Kallickal255fa9a2011-03-25 14:23:57 -070013 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
Jayamohan Kallickal6733b392009-09-05 07:36:35 +053016 */
17
John Soni Jose21771992012-04-03 23:41:49 -050018#include <scsi/iscsi_proto.h>
19
Jayamohan Kallickal6733b392009-09-05 07:36:35 +053020#include "be.h"
21#include "be_mgmt.h"
22#include "be_main.h"
23
Jayamohan Kallickale9b91192010-07-22 04:24:53 +053024int beiscsi_pci_soft_reset(struct beiscsi_hba *phba)
25{
26 u32 sreset;
27 u8 *pci_reset_offset = 0;
28 u8 *pci_online0_offset = 0;
29 u8 *pci_online1_offset = 0;
30 u32 pconline0 = 0;
31 u32 pconline1 = 0;
32 u32 i;
33
34 pci_reset_offset = (u8 *)phba->pci_va + BE2_SOFT_RESET;
35 pci_online0_offset = (u8 *)phba->pci_va + BE2_PCI_ONLINE0;
36 pci_online1_offset = (u8 *)phba->pci_va + BE2_PCI_ONLINE1;
37 sreset = readl((void *)pci_reset_offset);
38 sreset |= BE2_SET_RESET;
39 writel(sreset, (void *)pci_reset_offset);
40
41 i = 0;
42 while (sreset & BE2_SET_RESET) {
43 if (i > 64)
44 break;
45 msleep(100);
46 sreset = readl((void *)pci_reset_offset);
47 i++;
48 }
49
50 if (sreset & BE2_SET_RESET) {
John Soni Jose99bc5d52012-08-20 23:00:18 +053051 printk(KERN_ERR DRV_NAME
52 " Soft Reset did not deassert\n");
Jayamohan Kallickale9b91192010-07-22 04:24:53 +053053 return -EIO;
54 }
55 pconline1 = BE2_MPU_IRAM_ONLINE;
56 writel(pconline0, (void *)pci_online0_offset);
57 writel(pconline1, (void *)pci_online1_offset);
58
Minh Tran1d8bc702012-10-20 04:41:24 +053059 sreset |= BE2_SET_RESET;
Jayamohan Kallickale9b91192010-07-22 04:24:53 +053060 writel(sreset, (void *)pci_reset_offset);
61
62 i = 0;
63 while (sreset & BE2_SET_RESET) {
64 if (i > 64)
65 break;
66 msleep(1);
67 sreset = readl((void *)pci_reset_offset);
68 i++;
69 }
70 if (sreset & BE2_SET_RESET) {
John Soni Jose99bc5d52012-08-20 23:00:18 +053071 printk(KERN_ERR DRV_NAME
72 " MPU Online Soft Reset did not deassert\n");
Jayamohan Kallickale9b91192010-07-22 04:24:53 +053073 return -EIO;
74 }
75 return 0;
76}
77
78int be_chk_reset_complete(struct beiscsi_hba *phba)
79{
80 unsigned int num_loop;
81 u8 *mpu_sem = 0;
82 u32 status;
83
84 num_loop = 1000;
85 mpu_sem = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE;
86 msleep(5000);
87
88 while (num_loop) {
89 status = readl((void *)mpu_sem);
90
91 if ((status & 0x80000000) || (status & 0x0000FFFF) == 0xC000)
92 break;
93 msleep(60);
94 num_loop--;
95 }
96
97 if ((status & 0x80000000) || (!num_loop)) {
John Soni Jose99bc5d52012-08-20 23:00:18 +053098 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
99 "BC_%d : Failed in be_chk_reset_complete"
100 "status = 0x%x\n", status);
Jayamohan Kallickale9b91192010-07-22 04:24:53 +0530101 return -EIO;
102 }
103
104 return 0;
105}
106
Jayamohan Kallickal756d29c2010-01-05 05:10:46 +0530107void be_mcc_notify(struct beiscsi_hba *phba)
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530108{
109 struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q;
110 u32 val = 0;
111
112 val |= mccq->id & DB_MCCQ_RING_ID_MASK;
113 val |= 1 << DB_MCCQ_NUM_POSTED_SHIFT;
114 iowrite32(val, phba->db_va + DB_MCCQ_OFFSET);
115}
116
Jayamohan Kallickal756d29c2010-01-05 05:10:46 +0530117unsigned int alloc_mcc_tag(struct beiscsi_hba *phba)
118{
119 unsigned int tag = 0;
Jayamohan Kallickal756d29c2010-01-05 05:10:46 +0530120
Jayamohan Kallickal756d29c2010-01-05 05:10:46 +0530121 if (phba->ctrl.mcc_tag_available) {
122 tag = phba->ctrl.mcc_tag[phba->ctrl.mcc_alloc_index];
123 phba->ctrl.mcc_tag[phba->ctrl.mcc_alloc_index] = 0;
124 phba->ctrl.mcc_numtag[tag] = 0;
Jayamohan Kallickal756d29c2010-01-05 05:10:46 +0530125 }
126 if (tag) {
127 phba->ctrl.mcc_tag_available--;
128 if (phba->ctrl.mcc_alloc_index == (MAX_MCC_CMD - 1))
129 phba->ctrl.mcc_alloc_index = 0;
130 else
131 phba->ctrl.mcc_alloc_index++;
132 }
133 return tag;
134}
135
John Soni Josee175def2012-10-20 04:45:40 +0530136/*
137 * beiscsi_mccq_compl()- Wait for completion of MBX
138 * @phba: Driver private structure
139 * @tag: Tag for the MBX Command
140 * @wrb: the WRB used for the MBX Command
141 * @cmd_hdr: IOCTL Hdr for the MBX Cmd
142 *
143 * Waits for MBX completion with the passed TAG.
144 *
145 * return
146 * Success: 0
147 * Failure: Non-Zero
148 **/
149int beiscsi_mccq_compl(struct beiscsi_hba *phba,
150 uint32_t tag, struct be_mcc_wrb **wrb,
151 void *cmd_hdr)
152{
153 int rc = 0;
154 uint32_t mcc_tag_response;
155 uint16_t status = 0, addl_status = 0, wrb_num = 0;
156 struct be_mcc_wrb *temp_wrb;
157 struct be_cmd_req_hdr *ioctl_hdr;
158 struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q;
159
160 /* wait for the mccq completion */
161 rc = wait_event_interruptible_timeout(
162 phba->ctrl.mcc_wait[tag],
163 phba->ctrl.mcc_numtag[tag],
164 msecs_to_jiffies(
165 BEISCSI_HOST_MBX_TIMEOUT));
166
167 if (rc <= 0) {
168 beiscsi_log(phba, KERN_ERR,
169 BEISCSI_LOG_INIT | BEISCSI_LOG_EH |
170 BEISCSI_LOG_CONFIG,
171 "BC_%d : MBX Cmd Completion timed out\n");
172 rc = -EAGAIN;
173 goto release_mcc_tag;
174 } else
175 rc = 0;
176
177 mcc_tag_response = phba->ctrl.mcc_numtag[tag];
178 status = (mcc_tag_response & CQE_STATUS_MASK);
179 addl_status = ((mcc_tag_response & CQE_STATUS_ADDL_MASK) >>
180 CQE_STATUS_ADDL_SHIFT);
181
182 if (cmd_hdr) {
183 ioctl_hdr = (struct be_cmd_req_hdr *)cmd_hdr;
184 } else {
185 wrb_num = (mcc_tag_response & CQE_STATUS_WRB_MASK) >>
186 CQE_STATUS_WRB_SHIFT;
187 temp_wrb = (struct be_mcc_wrb *)queue_get_wrb(mccq, wrb_num);
188 ioctl_hdr = embedded_payload(temp_wrb);
189
190 if (wrb)
191 *wrb = temp_wrb;
192 }
193
194 if (status || addl_status) {
195 beiscsi_log(phba, KERN_ERR,
196 BEISCSI_LOG_INIT | BEISCSI_LOG_EH |
197 BEISCSI_LOG_CONFIG,
198 "BC_%d : MBX Cmd Failed for "
199 "Subsys : %d Opcode : %d with "
200 "Status : %d and Extd_Status : %d\n",
201 ioctl_hdr->subsystem,
202 ioctl_hdr->opcode,
203 status, addl_status);
204 rc = -EAGAIN;
205 }
206
207release_mcc_tag:
208 /* Release the MCC entry */
209 free_mcc_tag(&phba->ctrl, tag);
210
211 return rc;
212}
213
Jayamohan Kallickal756d29c2010-01-05 05:10:46 +0530214void free_mcc_tag(struct be_ctrl_info *ctrl, unsigned int tag)
215{
216 spin_lock(&ctrl->mbox_lock);
217 tag = tag & 0x000000FF;
218 ctrl->mcc_tag[ctrl->mcc_free_index] = tag;
219 if (ctrl->mcc_free_index == (MAX_MCC_CMD - 1))
220 ctrl->mcc_free_index = 0;
221 else
222 ctrl->mcc_free_index++;
223 ctrl->mcc_tag_available++;
224 spin_unlock(&ctrl->mbox_lock);
225}
226
227bool is_link_state_evt(u32 trailer)
228{
229 return (((trailer >> ASYNC_TRAILER_EVENT_CODE_SHIFT) &
230 ASYNC_TRAILER_EVENT_CODE_MASK) ==
231 ASYNC_EVENT_CODE_LINK_STATE);
232}
233
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530234static inline bool be_mcc_compl_is_new(struct be_mcc_compl *compl)
235{
236 if (compl->flags != 0) {
237 compl->flags = le32_to_cpu(compl->flags);
238 WARN_ON((compl->flags & CQE_FLAGS_VALID_MASK) == 0);
239 return true;
240 } else
241 return false;
242}
243
244static inline void be_mcc_compl_use(struct be_mcc_compl *compl)
245{
246 compl->flags = 0;
247}
248
John Soni Josee175def2012-10-20 04:45:40 +0530249/*
250 * be_mcc_compl_process()- Check the MBX comapletion status
251 * @ctrl: Function specific MBX data structure
252 * @compl: Completion status of MBX Command
253 *
254 * Check for the MBX completion status when BMBX method used
255 *
256 * return
257 * Success: Zero
258 * Failure: Non-Zero
259 **/
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530260static int be_mcc_compl_process(struct be_ctrl_info *ctrl,
261 struct be_mcc_compl *compl)
262{
263 u16 compl_status, extd_status;
John Soni Josee175def2012-10-20 04:45:40 +0530264 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
John Soni Jose99bc5d52012-08-20 23:00:18 +0530265 struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
John Soni Josee175def2012-10-20 04:45:40 +0530266 struct be_cmd_req_hdr *hdr = embedded_payload(wrb);
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530267
268 be_dws_le_to_cpu(compl, 4);
269
270 compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) &
271 CQE_STATUS_COMPL_MASK;
272 if (compl_status != MCC_STATUS_SUCCESS) {
273 extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) &
274 CQE_STATUS_EXTD_MASK;
John Soni Jose99bc5d52012-08-20 23:00:18 +0530275
276 beiscsi_log(phba, KERN_ERR,
277 BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
John Soni Josee175def2012-10-20 04:45:40 +0530278 "BC_%d : error in cmd completion: "
279 "Subsystem : %d Opcode : %d "
280 "status(compl/extd)=%d/%d\n",
281 hdr->subsystem, hdr->opcode,
John Soni Jose99bc5d52012-08-20 23:00:18 +0530282 compl_status, extd_status);
283
Jayamohan Kallickald3ad2bb2010-07-22 04:16:38 +0530284 return -EBUSY;
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530285 }
286 return 0;
287}
288
Jayamohan Kallickal756d29c2010-01-05 05:10:46 +0530289int be_mcc_compl_process_isr(struct be_ctrl_info *ctrl,
290 struct be_mcc_compl *compl)
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530291{
Jayamohan Kallickal756d29c2010-01-05 05:10:46 +0530292 u16 compl_status, extd_status;
293 unsigned short tag;
294
295 be_dws_le_to_cpu(compl, 4);
296
297 compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) &
298 CQE_STATUS_COMPL_MASK;
299 /* The ctrl.mcc_numtag[tag] is filled with
300 * [31] = valid, [30:24] = Rsvd, [23:16] = wrb, [15:8] = extd_status,
301 * [7:0] = compl_status
302 */
303 tag = (compl->tag0 & 0x000000FF);
304 extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) &
305 CQE_STATUS_EXTD_MASK;
306
307 ctrl->mcc_numtag[tag] = 0x80000000;
308 ctrl->mcc_numtag[tag] |= (compl->tag0 & 0x00FF0000);
309 ctrl->mcc_numtag[tag] |= (extd_status & 0x000000FF) << 8;
310 ctrl->mcc_numtag[tag] |= (compl_status & 0x000000FF);
311 wake_up_interruptible(&ctrl->mcc_wait[tag]);
312 return 0;
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530313}
314
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530315static struct be_mcc_compl *be_mcc_compl_get(struct beiscsi_hba *phba)
316{
317 struct be_queue_info *mcc_cq = &phba->ctrl.mcc_obj.cq;
318 struct be_mcc_compl *compl = queue_tail_node(mcc_cq);
319
320 if (be_mcc_compl_is_new(compl)) {
321 queue_tail_inc(mcc_cq);
322 return compl;
323 }
324 return NULL;
325}
326
327static void be2iscsi_fail_session(struct iscsi_cls_session *cls_session)
328{
329 iscsi_session_failure(cls_session->dd_data, ISCSI_ERR_CONN_FAILED);
330}
331
Jayamohan Kallickal756d29c2010-01-05 05:10:46 +0530332void beiscsi_async_link_state_process(struct beiscsi_hba *phba,
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530333 struct be_async_event_link_state *evt)
334{
335 switch (evt->port_link_status) {
336 case ASYNC_EVENT_LINK_DOWN:
John Soni Jose99bc5d52012-08-20 23:00:18 +0530337 beiscsi_log(phba, KERN_ERR,
338 BEISCSI_LOG_CONFIG | BEISCSI_LOG_INIT,
339 "BC_%d : Link Down on Physical Port %d\n",
340 evt->physical_port);
341
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530342 phba->state |= BE_ADAPTER_LINK_DOWN;
Jayamohan Kallickalda7408c2010-01-05 05:11:23 +0530343 iscsi_host_for_each_session(phba->shost,
344 be2iscsi_fail_session);
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530345 break;
346 case ASYNC_EVENT_LINK_UP:
347 phba->state = BE_ADAPTER_UP;
John Soni Jose99bc5d52012-08-20 23:00:18 +0530348 beiscsi_log(phba, KERN_ERR,
349 BEISCSI_LOG_CONFIG | BEISCSI_LOG_INIT,
350 "BC_%d : Link UP on Physical Port %d\n",
351 evt->physical_port);
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530352 break;
353 default:
John Soni Jose99bc5d52012-08-20 23:00:18 +0530354 beiscsi_log(phba, KERN_ERR,
355 BEISCSI_LOG_CONFIG | BEISCSI_LOG_INIT,
356 "BC_%d : Unexpected Async Notification %d on"
357 "Physical Port %d\n",
358 evt->port_link_status,
359 evt->physical_port);
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530360 }
361}
362
363static void beiscsi_cq_notify(struct beiscsi_hba *phba, u16 qid, bool arm,
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530364 u16 num_popped)
365{
366 u32 val = 0;
367 val |= qid & DB_CQ_RING_ID_MASK;
368 if (arm)
369 val |= 1 << DB_CQ_REARM_SHIFT;
370 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530371 iowrite32(val, phba->db_va + DB_CQ_OFFSET);
372}
373
374
Jayamohan Kallickal35e66012009-10-23 11:53:49 +0530375int beiscsi_process_mcc(struct beiscsi_hba *phba)
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530376{
377 struct be_mcc_compl *compl;
378 int num = 0, status = 0;
379 struct be_ctrl_info *ctrl = &phba->ctrl;
380
381 spin_lock_bh(&phba->ctrl.mcc_cq_lock);
382 while ((compl = be_mcc_compl_get(phba))) {
383 if (compl->flags & CQE_FLAGS_ASYNC_MASK) {
384 /* Interpret flags as an async trailer */
Jayamohan Kallickal78b9fb62009-11-25 01:41:37 +0530385 if (is_link_state_evt(compl->flags))
386 /* Interpret compl as a async link evt */
387 beiscsi_async_link_state_process(phba,
388 (struct be_async_event_link_state *) compl);
389 else
John Soni Jose99bc5d52012-08-20 23:00:18 +0530390 beiscsi_log(phba, KERN_ERR,
391 BEISCSI_LOG_CONFIG |
392 BEISCSI_LOG_MBOX,
393 "BC_%d : Unsupported Async Event, flags"
394 " = 0x%08x\n", compl->flags);
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530395
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530396 } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) {
397 status = be_mcc_compl_process(ctrl, compl);
398 atomic_dec(&phba->ctrl.mcc_obj.q.used);
399 }
400 be_mcc_compl_use(compl);
401 num++;
402 }
403
404 if (num)
405 beiscsi_cq_notify(phba, phba->ctrl.mcc_obj.cq.id, true, num);
406
407 spin_unlock_bh(&phba->ctrl.mcc_cq_lock);
408 return status;
409}
410
John Soni Josee175def2012-10-20 04:45:40 +0530411/*
412 * be_mcc_wait_compl()- Wait for MBX completion
413 * @phba: driver private structure
414 *
415 * Wait till no more pending mcc requests are present
416 *
417 * return
418 * Success: 0
419 * Failure: Non-Zero
420 *
421 **/
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530422static int be_mcc_wait_compl(struct beiscsi_hba *phba)
423{
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530424 int i, status;
425 for (i = 0; i < mcc_timeout; i++) {
John Soni Josee175def2012-10-20 04:45:40 +0530426 if (phba->fw_timeout)
427 return -EIO;
428
Jayamohan Kallickal35e66012009-10-23 11:53:49 +0530429 status = beiscsi_process_mcc(phba);
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530430 if (status)
431 return status;
432
433 if (atomic_read(&phba->ctrl.mcc_obj.q.used) == 0)
434 break;
435 udelay(100);
436 }
437 if (i == mcc_timeout) {
John Soni Jose99bc5d52012-08-20 23:00:18 +0530438 beiscsi_log(phba, KERN_ERR,
439 BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
John Soni Josee175def2012-10-20 04:45:40 +0530440 "BC_%d : FW Timed Out\n");
441 phba->fw_timeout = true;
Jayamohan Kallickald3ad2bb2010-07-22 04:16:38 +0530442 return -EBUSY;
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530443 }
444 return 0;
445}
446
John Soni Josee175def2012-10-20 04:45:40 +0530447/*
448 * be_mcc_notify_wait()- Notify and wait for Compl
449 * @phba: driver private structure
450 *
451 * Notify MCC requests and wait for completion
452 *
453 * return
454 * Success: 0
455 * Failure: Non-Zero
456 **/
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530457int be_mcc_notify_wait(struct beiscsi_hba *phba)
458{
459 be_mcc_notify(phba);
460 return be_mcc_wait_compl(phba);
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530461}
462
John Soni Josee175def2012-10-20 04:45:40 +0530463/*
464 * be_mbox_db_ready_wait()- Check ready status
465 * @ctrl: Function specific MBX data structure
466 *
467 * Check for the ready status of FW to send BMBX
468 * commands to adapter.
469 *
470 * return
471 * Success: 0
472 * Failure: Non-Zero
473 **/
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530474static int be_mbox_db_ready_wait(struct be_ctrl_info *ctrl)
475{
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530476 void __iomem *db = ctrl->db + MPU_MAILBOX_DB_OFFSET;
John Soni Josee175def2012-10-20 04:45:40 +0530477 struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
478 int wait = 0;
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530479 u32 ready;
480
481 do {
John Soni Josee175def2012-10-20 04:45:40 +0530482 if (phba->fw_timeout)
483 return -EIO;
484
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530485 ready = ioread32(db) & MPU_MAILBOX_DB_RDY_MASK;
486 if (ready)
487 break;
488
John Soni Josee175def2012-10-20 04:45:40 +0530489 if (wait > BEISCSI_HOST_MBX_TIMEOUT) {
John Soni Jose99bc5d52012-08-20 23:00:18 +0530490 beiscsi_log(phba, KERN_ERR,
491 BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
John Soni Josee175def2012-10-20 04:45:40 +0530492 "BC_%d : FW Timed Out\n");
493 phba->fw_timeout = true;
Jayamohan Kallickald3ad2bb2010-07-22 04:16:38 +0530494 return -EBUSY;
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530495 }
496
John Soni Josee175def2012-10-20 04:45:40 +0530497 mdelay(1);
498 wait++;
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530499 } while (true);
500 return 0;
501}
502
John Soni Josee175def2012-10-20 04:45:40 +0530503/*
504 * be_mbox_notify: Notify adapter of new BMBX command
505 * @ctrl: Function specific MBX data structure
506 *
507 * Ring doorbell to inform adapter of a BMBX command
508 * to process
509 *
510 * return
511 * Success: 0
512 * Failure: Non-Zero
513 **/
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530514int be_mbox_notify(struct be_ctrl_info *ctrl)
515{
516 int status;
517 u32 val = 0;
518 void __iomem *db = ctrl->db + MPU_MAILBOX_DB_OFFSET;
519 struct be_dma_mem *mbox_mem = &ctrl->mbox_mem;
520 struct be_mcc_mailbox *mbox = mbox_mem->va;
521 struct be_mcc_compl *compl = &mbox->compl;
John Soni Jose99bc5d52012-08-20 23:00:18 +0530522 struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530523
524 val &= ~MPU_MAILBOX_DB_RDY_MASK;
525 val |= MPU_MAILBOX_DB_HI_MASK;
526 val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
527 iowrite32(val, db);
528
529 status = be_mbox_db_ready_wait(ctrl);
John Soni Josee175def2012-10-20 04:45:40 +0530530 if (status)
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530531 return status;
John Soni Josee175def2012-10-20 04:45:40 +0530532
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530533 val = 0;
534 val &= ~MPU_MAILBOX_DB_RDY_MASK;
535 val &= ~MPU_MAILBOX_DB_HI_MASK;
536 val |= (u32) (mbox_mem->dma >> 4) << 2;
537 iowrite32(val, db);
538
539 status = be_mbox_db_ready_wait(ctrl);
John Soni Josee175def2012-10-20 04:45:40 +0530540 if (status)
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530541 return status;
John Soni Josee175def2012-10-20 04:45:40 +0530542
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530543 if (be_mcc_compl_is_new(compl)) {
544 status = be_mcc_compl_process(ctrl, &mbox->compl);
545 be_mcc_compl_use(compl);
546 if (status) {
John Soni Jose99bc5d52012-08-20 23:00:18 +0530547 beiscsi_log(phba, KERN_ERR,
548 BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
549 "BC_%d : After be_mcc_compl_process\n");
550
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530551 return status;
552 }
553 } else {
John Soni Jose99bc5d52012-08-20 23:00:18 +0530554 beiscsi_log(phba, KERN_ERR,
555 BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
556 "BC_%d : Invalid Mailbox Completion\n");
557
Jayamohan Kallickald3ad2bb2010-07-22 04:16:38 +0530558 return -EBUSY;
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530559 }
560 return 0;
561}
562
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530563/*
564 * Insert the mailbox address into the doorbell in two steps
565 * Polls on the mbox doorbell till a command completion (or a timeout) occurs
566 */
567static int be_mbox_notify_wait(struct beiscsi_hba *phba)
568{
569 int status;
570 u32 val = 0;
571 void __iomem *db = phba->ctrl.db + MPU_MAILBOX_DB_OFFSET;
572 struct be_dma_mem *mbox_mem = &phba->ctrl.mbox_mem;
573 struct be_mcc_mailbox *mbox = mbox_mem->va;
574 struct be_mcc_compl *compl = &mbox->compl;
575 struct be_ctrl_info *ctrl = &phba->ctrl;
576
577 val |= MPU_MAILBOX_DB_HI_MASK;
578 /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */
579 val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
580 iowrite32(val, db);
581
582 /* wait for ready to be set */
583 status = be_mbox_db_ready_wait(ctrl);
584 if (status != 0)
585 return status;
586
587 val = 0;
588 /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */
589 val |= (u32)(mbox_mem->dma >> 4) << 2;
590 iowrite32(val, db);
591
592 status = be_mbox_db_ready_wait(ctrl);
593 if (status != 0)
594 return status;
595
596 /* A cq entry has been made now */
597 if (be_mcc_compl_is_new(compl)) {
598 status = be_mcc_compl_process(ctrl, &mbox->compl);
599 be_mcc_compl_use(compl);
600 if (status)
601 return status;
602 } else {
John Soni Jose99bc5d52012-08-20 23:00:18 +0530603 beiscsi_log(phba, KERN_ERR,
604 BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
605 "BC_%d : invalid mailbox completion\n");
606
Jayamohan Kallickald3ad2bb2010-07-22 04:16:38 +0530607 return -EBUSY;
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530608 }
609 return 0;
610}
611
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530612void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len,
613 bool embedded, u8 sge_cnt)
614{
615 if (embedded)
616 wrb->embedded |= MCC_WRB_EMBEDDED_MASK;
617 else
618 wrb->embedded |= (sge_cnt & MCC_WRB_SGE_CNT_MASK) <<
619 MCC_WRB_SGE_CNT_SHIFT;
620 wrb->payload_length = payload_len;
621 be_dws_cpu_to_le(wrb, 8);
622}
623
624void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
625 u8 subsystem, u8 opcode, int cmd_len)
626{
627 req_hdr->opcode = opcode;
628 req_hdr->subsystem = subsystem;
629 req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));
John Soni Josee175def2012-10-20 04:45:40 +0530630 req_hdr->timeout = BEISCSI_FW_MBX_TIMEOUT;
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530631}
632
633static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
634 struct be_dma_mem *mem)
635{
636 int i, buf_pages;
637 u64 dma = (u64) mem->dma;
638
639 buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages);
640 for (i = 0; i < buf_pages; i++) {
641 pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF);
642 pages[i].hi = cpu_to_le32(upper_32_bits(dma));
643 dma += PAGE_SIZE_4K;
644 }
645}
646
647static u32 eq_delay_to_mult(u32 usec_delay)
648{
649#define MAX_INTR_RATE 651042
650 const u32 round = 10;
651 u32 multiplier;
652
653 if (usec_delay == 0)
654 multiplier = 0;
655 else {
656 u32 interrupt_rate = 1000000 / usec_delay;
657 if (interrupt_rate == 0)
658 multiplier = 1023;
659 else {
660 multiplier = (MAX_INTR_RATE - interrupt_rate) * round;
661 multiplier /= interrupt_rate;
662 multiplier = (multiplier + round / 2) / round;
663 multiplier = min(multiplier, (u32) 1023);
664 }
665 }
666 return multiplier;
667}
668
669struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem)
670{
671 return &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb;
672}
673
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530674struct be_mcc_wrb *wrb_from_mccq(struct beiscsi_hba *phba)
675{
676 struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q;
677 struct be_mcc_wrb *wrb;
678
679 BUG_ON(atomic_read(&mccq->used) >= mccq->len);
680 wrb = queue_head_node(mccq);
Jayamohan Kallickal756d29c2010-01-05 05:10:46 +0530681 memset(wrb, 0, sizeof(*wrb));
682 wrb->tag0 = (mccq->head & 0x000000FF) << 16;
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530683 queue_head_inc(mccq);
684 atomic_inc(&mccq->used);
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530685 return wrb;
686}
687
688
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530689int beiscsi_cmd_eq_create(struct be_ctrl_info *ctrl,
690 struct be_queue_info *eq, int eq_delay)
691{
692 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
693 struct be_cmd_req_eq_create *req = embedded_payload(wrb);
694 struct be_cmd_resp_eq_create *resp = embedded_payload(wrb);
695 struct be_dma_mem *q_mem = &eq->dma_mem;
696 int status;
697
698 spin_lock(&ctrl->mbox_lock);
699 memset(wrb, 0, sizeof(*wrb));
700
701 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
702
703 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
704 OPCODE_COMMON_EQ_CREATE, sizeof(*req));
705
706 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
707
708 AMAP_SET_BITS(struct amap_eq_context, func, req->context,
709 PCI_FUNC(ctrl->pdev->devfn));
710 AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1);
711 AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0);
712 AMAP_SET_BITS(struct amap_eq_context, count, req->context,
713 __ilog2_u32(eq->len / 256));
714 AMAP_SET_BITS(struct amap_eq_context, delaymult, req->context,
715 eq_delay_to_mult(eq_delay));
716 be_dws_cpu_to_le(req->context, sizeof(req->context));
717
718 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
719
720 status = be_mbox_notify(ctrl);
721 if (!status) {
722 eq->id = le16_to_cpu(resp->eq_id);
723 eq->created = true;
724 }
725 spin_unlock(&ctrl->mbox_lock);
726 return status;
727}
728
729int be_cmd_fw_initialize(struct be_ctrl_info *ctrl)
730{
731 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
John Soni Jose99bc5d52012-08-20 23:00:18 +0530732 struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530733 int status;
734 u8 *endian_check;
735
736 spin_lock(&ctrl->mbox_lock);
737 memset(wrb, 0, sizeof(*wrb));
738
739 endian_check = (u8 *) wrb;
740 *endian_check++ = 0xFF;
741 *endian_check++ = 0x12;
742 *endian_check++ = 0x34;
743 *endian_check++ = 0xFF;
744 *endian_check++ = 0xFF;
745 *endian_check++ = 0x56;
746 *endian_check++ = 0x78;
747 *endian_check++ = 0xFF;
748 be_dws_cpu_to_le(wrb, sizeof(*wrb));
749
750 status = be_mbox_notify(ctrl);
751 if (status)
John Soni Jose99bc5d52012-08-20 23:00:18 +0530752 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
753 "BC_%d : be_cmd_fw_initialize Failed\n");
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530754
755 spin_unlock(&ctrl->mbox_lock);
756 return status;
757}
758
759int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl,
760 struct be_queue_info *cq, struct be_queue_info *eq,
761 bool sol_evts, bool no_delay, int coalesce_wm)
762{
763 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
764 struct be_cmd_req_cq_create *req = embedded_payload(wrb);
765 struct be_cmd_resp_cq_create *resp = embedded_payload(wrb);
John Soni Jose99bc5d52012-08-20 23:00:18 +0530766 struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530767 struct be_dma_mem *q_mem = &cq->dma_mem;
768 void *ctxt = &req->context;
769 int status;
770
771 spin_lock(&ctrl->mbox_lock);
772 memset(wrb, 0, sizeof(*wrb));
773
774 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
775
776 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
777 OPCODE_COMMON_CQ_CREATE, sizeof(*req));
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530778
779 req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
John Soni Joseeaae5262012-10-20 04:43:44 +0530780 if (chip_skh_r(ctrl->pdev)) {
781 req->hdr.version = MBX_CMD_VER2;
782 req->page_size = 1;
783 AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm,
784 ctxt, coalesce_wm);
785 AMAP_SET_BITS(struct amap_cq_context_v2, nodelay,
786 ctxt, no_delay);
787 AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt,
788 __ilog2_u32(cq->len / 256));
789 AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1);
790 AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1);
791 AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id);
792 AMAP_SET_BITS(struct amap_cq_context_v2, armed, ctxt, 1);
793 } else {
794 AMAP_SET_BITS(struct amap_cq_context, coalescwm,
795 ctxt, coalesce_wm);
796 AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
797 AMAP_SET_BITS(struct amap_cq_context, count, ctxt,
798 __ilog2_u32(cq->len / 256));
799 AMAP_SET_BITS(struct amap_cq_context, valid, ctxt, 1);
800 AMAP_SET_BITS(struct amap_cq_context, solevent, ctxt, sol_evts);
801 AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1);
802 AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id);
803 AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1);
804 AMAP_SET_BITS(struct amap_cq_context, func, ctxt,
805 PCI_FUNC(ctrl->pdev->devfn));
806 }
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530807
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530808 be_dws_cpu_to_le(ctxt, sizeof(req->context));
809
810 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
811
812 status = be_mbox_notify(ctrl);
813 if (!status) {
814 cq->id = le16_to_cpu(resp->cq_id);
815 cq->created = true;
816 } else
John Soni Jose99bc5d52012-08-20 23:00:18 +0530817 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
818 "BC_%d : In be_cmd_cq_create, status=ox%08x\n",
819 status);
820
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530821 spin_unlock(&ctrl->mbox_lock);
822
823 return status;
824}
825
826static u32 be_encoded_q_len(int q_len)
827{
828 u32 len_encoded = fls(q_len); /* log2(len) + 1 */
829 if (len_encoded == 16)
830 len_encoded = 0;
831 return len_encoded;
832}
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530833
Jayamohan Kallickal35e66012009-10-23 11:53:49 +0530834int beiscsi_cmd_mccq_create(struct beiscsi_hba *phba,
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530835 struct be_queue_info *mccq,
836 struct be_queue_info *cq)
837{
838 struct be_mcc_wrb *wrb;
839 struct be_cmd_req_mcc_create *req;
840 struct be_dma_mem *q_mem = &mccq->dma_mem;
841 struct be_ctrl_info *ctrl;
842 void *ctxt;
843 int status;
844
845 spin_lock(&phba->ctrl.mbox_lock);
846 ctrl = &phba->ctrl;
847 wrb = wrb_from_mbox(&ctrl->mbox_mem);
Jayamohan Kallickal37609762011-10-07 19:31:11 -0500848 memset(wrb, 0, sizeof(*wrb));
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530849 req = embedded_payload(wrb);
850 ctxt = &req->context;
851
852 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
853
854 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
855 OPCODE_COMMON_MCC_CREATE, sizeof(*req));
856
857 req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
858
859 AMAP_SET_BITS(struct amap_mcc_context, fid, ctxt,
860 PCI_FUNC(phba->pcidev->devfn));
861 AMAP_SET_BITS(struct amap_mcc_context, valid, ctxt, 1);
862 AMAP_SET_BITS(struct amap_mcc_context, ring_size, ctxt,
863 be_encoded_q_len(mccq->len));
864 AMAP_SET_BITS(struct amap_mcc_context, cq_id, ctxt, cq->id);
865
866 be_dws_cpu_to_le(ctxt, sizeof(req->context));
867
868 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
869
870 status = be_mbox_notify_wait(phba);
871 if (!status) {
872 struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb);
873 mccq->id = le16_to_cpu(resp->id);
874 mccq->created = true;
875 }
876 spin_unlock(&phba->ctrl.mbox_lock);
877
878 return status;
879}
880
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530881int beiscsi_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
882 int queue_type)
883{
884 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
885 struct be_cmd_req_q_destroy *req = embedded_payload(wrb);
John Soni Jose99bc5d52012-08-20 23:00:18 +0530886 struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530887 u8 subsys = 0, opcode = 0;
888 int status;
889
John Soni Jose99bc5d52012-08-20 23:00:18 +0530890 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
891 "BC_%d : In beiscsi_cmd_q_destroy "
892 "queue_type : %d\n", queue_type);
893
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530894 spin_lock(&ctrl->mbox_lock);
895 memset(wrb, 0, sizeof(*wrb));
896 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
897
898 switch (queue_type) {
899 case QTYPE_EQ:
900 subsys = CMD_SUBSYSTEM_COMMON;
901 opcode = OPCODE_COMMON_EQ_DESTROY;
902 break;
903 case QTYPE_CQ:
904 subsys = CMD_SUBSYSTEM_COMMON;
905 opcode = OPCODE_COMMON_CQ_DESTROY;
906 break;
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +0530907 case QTYPE_MCCQ:
908 subsys = CMD_SUBSYSTEM_COMMON;
909 opcode = OPCODE_COMMON_MCC_DESTROY;
910 break;
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530911 case QTYPE_WRBQ:
912 subsys = CMD_SUBSYSTEM_ISCSI;
913 opcode = OPCODE_COMMON_ISCSI_WRBQ_DESTROY;
914 break;
915 case QTYPE_DPDUQ:
916 subsys = CMD_SUBSYSTEM_ISCSI;
917 opcode = OPCODE_COMMON_ISCSI_DEFQ_DESTROY;
918 break;
919 case QTYPE_SGL:
920 subsys = CMD_SUBSYSTEM_ISCSI;
921 opcode = OPCODE_COMMON_ISCSI_CFG_REMOVE_SGL_PAGES;
922 break;
923 default:
924 spin_unlock(&ctrl->mbox_lock);
925 BUG();
Jayamohan Kallickald3ad2bb2010-07-22 04:16:38 +0530926 return -ENXIO;
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530927 }
928 be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req));
929 if (queue_type != QTYPE_SGL)
930 req->id = cpu_to_le16(q->id);
931
932 status = be_mbox_notify(ctrl);
933
934 spin_unlock(&ctrl->mbox_lock);
935 return status;
936}
937
Jayamohan Kallickal6733b392009-09-05 07:36:35 +0530938int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl,
939 struct be_queue_info *cq,
940 struct be_queue_info *dq, int length,
941 int entry_size)
942{
943 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
944 struct be_defq_create_req *req = embedded_payload(wrb);
945 struct be_dma_mem *q_mem = &dq->dma_mem;
946 void *ctxt = &req->context;
947 int status;
948
949 spin_lock(&ctrl->mbox_lock);
950 memset(wrb, 0, sizeof(*wrb));
951
952 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
953
954 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
955 OPCODE_COMMON_ISCSI_DEFQ_CREATE, sizeof(*req));
956
957 req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
958 AMAP_SET_BITS(struct amap_be_default_pdu_context, rx_pdid, ctxt, 0);
959 AMAP_SET_BITS(struct amap_be_default_pdu_context, rx_pdid_valid, ctxt,
960 1);
961 AMAP_SET_BITS(struct amap_be_default_pdu_context, pci_func_id, ctxt,
962 PCI_FUNC(ctrl->pdev->devfn));
963 AMAP_SET_BITS(struct amap_be_default_pdu_context, ring_size, ctxt,
964 be_encoded_q_len(length / sizeof(struct phys_addr)));
965 AMAP_SET_BITS(struct amap_be_default_pdu_context, default_buffer_size,
966 ctxt, entry_size);
967 AMAP_SET_BITS(struct amap_be_default_pdu_context, cq_id_recv, ctxt,
968 cq->id);
969
970 be_dws_cpu_to_le(ctxt, sizeof(req->context));
971
972 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
973
974 status = be_mbox_notify(ctrl);
975 if (!status) {
976 struct be_defq_create_resp *resp = embedded_payload(wrb);
977
978 dq->id = le16_to_cpu(resp->id);
979 dq->created = true;
980 }
981 spin_unlock(&ctrl->mbox_lock);
982
983 return status;
984}
985
986int be_cmd_wrbq_create(struct be_ctrl_info *ctrl, struct be_dma_mem *q_mem,
987 struct be_queue_info *wrbq)
988{
989 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
990 struct be_wrbq_create_req *req = embedded_payload(wrb);
991 struct be_wrbq_create_resp *resp = embedded_payload(wrb);
992 int status;
993
994 spin_lock(&ctrl->mbox_lock);
995 memset(wrb, 0, sizeof(*wrb));
996
997 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
998
999 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
1000 OPCODE_COMMON_ISCSI_WRBQ_CREATE, sizeof(*req));
1001 req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
1002 be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
1003
1004 status = be_mbox_notify(ctrl);
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +05301005 if (!status) {
Jayamohan Kallickal6733b392009-09-05 07:36:35 +05301006 wrbq->id = le16_to_cpu(resp->cid);
Jayamohan Kallickalbfead3b2009-10-23 11:52:33 +05301007 wrbq->created = true;
1008 }
Jayamohan Kallickal6733b392009-09-05 07:36:35 +05301009 spin_unlock(&ctrl->mbox_lock);
1010 return status;
1011}
1012
1013int be_cmd_iscsi_post_sgl_pages(struct be_ctrl_info *ctrl,
1014 struct be_dma_mem *q_mem,
1015 u32 page_offset, u32 num_pages)
1016{
1017 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
1018 struct be_post_sgl_pages_req *req = embedded_payload(wrb);
John Soni Jose99bc5d52012-08-20 23:00:18 +05301019 struct beiscsi_hba *phba = pci_get_drvdata(ctrl->pdev);
Jayamohan Kallickal6733b392009-09-05 07:36:35 +05301020 int status;
1021 unsigned int curr_pages;
1022 u32 internal_page_offset = 0;
1023 u32 temp_num_pages = num_pages;
1024
1025 if (num_pages == 0xff)
1026 num_pages = 1;
1027
1028 spin_lock(&ctrl->mbox_lock);
1029 do {
1030 memset(wrb, 0, sizeof(*wrb));
1031 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
1032 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
1033 OPCODE_COMMON_ISCSI_CFG_POST_SGL_PAGES,
1034 sizeof(*req));
1035 curr_pages = BE_NUMBER_OF_FIELD(struct be_post_sgl_pages_req,
1036 pages);
1037 req->num_pages = min(num_pages, curr_pages);
1038 req->page_offset = page_offset;
1039 be_cmd_page_addrs_prepare(req->pages, req->num_pages, q_mem);
1040 q_mem->dma = q_mem->dma + (req->num_pages * PAGE_SIZE);
1041 internal_page_offset += req->num_pages;
1042 page_offset += req->num_pages;
1043 num_pages -= req->num_pages;
1044
1045 if (temp_num_pages == 0xff)
1046 req->num_pages = temp_num_pages;
1047
1048 status = be_mbox_notify(ctrl);
1049 if (status) {
John Soni Jose99bc5d52012-08-20 23:00:18 +05301050 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1051 "BC_%d : FW CMD to map iscsi frags failed.\n");
1052
Jayamohan Kallickal6733b392009-09-05 07:36:35 +05301053 goto error;
1054 }
1055 } while (num_pages > 0);
1056error:
1057 spin_unlock(&ctrl->mbox_lock);
1058 if (status != 0)
1059 beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
1060 return status;
1061}
Jayamohan Kallickale5285862011-10-07 19:31:08 -05001062
1063int beiscsi_cmd_reset_function(struct beiscsi_hba *phba)
1064{
1065 struct be_ctrl_info *ctrl = &phba->ctrl;
1066 struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
1067 struct be_post_sgl_pages_req *req = embedded_payload(wrb);
1068 int status;
1069
1070 spin_lock(&ctrl->mbox_lock);
1071
1072 req = embedded_payload(wrb);
1073 be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
1074 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
1075 OPCODE_COMMON_FUNCTION_RESET, sizeof(*req));
1076 status = be_mbox_notify_wait(phba);
1077
1078 spin_unlock(&ctrl->mbox_lock);
1079 return status;
1080}
John Soni Jose6f722382012-08-20 23:00:43 +05301081
1082/**
1083 * be_cmd_set_vlan()- Configure VLAN paramters on the adapter
1084 * @phba: device priv structure instance
1085 * @vlan_tag: TAG to be set
1086 *
1087 * Set the VLAN_TAG for the adapter or Disable VLAN on adapter
1088 *
1089 * returns
1090 * TAG for the MBX Cmd
1091 * **/
1092int be_cmd_set_vlan(struct beiscsi_hba *phba,
1093 uint16_t vlan_tag)
1094{
1095 unsigned int tag = 0;
1096 struct be_mcc_wrb *wrb;
1097 struct be_cmd_set_vlan_req *req;
1098 struct be_ctrl_info *ctrl = &phba->ctrl;
1099
1100 spin_lock(&ctrl->mbox_lock);
1101 tag = alloc_mcc_tag(phba);
1102 if (!tag) {
1103 spin_unlock(&ctrl->mbox_lock);
1104 return tag;
1105 }
1106
1107 wrb = wrb_from_mccq(phba);
1108 req = embedded_payload(wrb);
1109 wrb->tag0 |= tag;
1110 be_wrb_hdr_prepare(wrb, sizeof(*wrb), true, 0);
1111 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ISCSI,
1112 OPCODE_COMMON_ISCSI_NTWK_SET_VLAN,
1113 sizeof(*req));
1114
1115 req->interface_hndl = phba->interface_handle;
1116 req->vlan_priority = vlan_tag;
1117
1118 be_mcc_notify(phba);
1119 spin_unlock(&ctrl->mbox_lock);
1120
1121 return tag;
1122}