blob: e9b363625c5020c4421ed2f21c093d6f386edf66 [file] [log] [blame]
Johannes Stezenbach55f51ef2005-06-23 22:02:41 -07001/*
2 * Support for the Broadcom BCM3510 ATSC demodulator (1st generation Air2PC)
3 *
4 * Copyright (C) 2001-5, B2C2 inc.
5 *
6 * GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de>
7 *
8 * This driver is "hard-coded" to be used with the 1st generation of
9 * Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming
10 * (Panasonic CT10S) is located here, which is actually wrong. Unless there is
11 * another device with a BCM3510, this is no problem.
12 *
13 * The driver works also with QAM64 DVB-C, but had an unreasonable high
14 * UNC. (Tested with the Air2PC ATSC 1st generation)
15 *
16 * You'll need a firmware for this driver in order to get it running. It is
17 * called "dvb-fe-bcm3510-01.fw".
18 *
19 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the Free
21 * Software Foundation; either version 2 of the License, or (at your option)
22 * any later version.
23 *
24 * This program is distributed in the hope that it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
27 * more details.
28 *
29 * You should have received a copy of the GNU General Public License along with
30 * this program; if not, write to the Free Software Foundation, Inc., 675 Mass
31 * Ave, Cambridge, MA 02139, USA.
32 */
33
34#include <linux/init.h>
35#include <linux/module.h>
36#include <linux/moduleparam.h>
37#include <linux/device.h>
38#include <linux/firmware.h>
Tim Schmielau4e57b682005-10-30 15:03:48 -080039#include <linux/jiffies.h>
40#include <linux/string.h>
41#include <linux/slab.h>
Johannes Stezenbach55f51ef2005-06-23 22:02:41 -070042
43#include "dvb_frontend.h"
44#include "bcm3510.h"
45#include "bcm3510_priv.h"
46
47struct bcm3510_state {
48
49 struct i2c_adapter* i2c;
50 struct dvb_frontend_ops ops;
51 const struct bcm3510_config* config;
52 struct dvb_frontend frontend;
53
54 /* demodulator private data */
55 struct semaphore hab_sem;
56 u8 firmware_loaded:1;
57
58 unsigned long next_status_check;
59 unsigned long status_check_interval;
60 struct bcm3510_hab_cmd_status1 status1;
61 struct bcm3510_hab_cmd_status2 status2;
62};
63
64static int debug;
65module_param(debug, int, 0644);
66MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able)).");
67
68#define dprintk(level,x...) if (level & debug) printk(x)
69#define dbufout(b,l,m) {\
70 int i; \
71 for (i = 0; i < l; i++) \
Mauro Carvalho Chehab9101e622005-12-12 00:37:24 -080072 m("%02x ",b[i]); \
Johannes Stezenbach55f51ef2005-06-23 22:02:41 -070073}
74#define deb_info(args...) dprintk(0x01,args)
75#define deb_i2c(args...) dprintk(0x02,args)
76#define deb_hab(args...) dprintk(0x04,args)
77
78/* transfer functions */
79static int bcm3510_writebytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
80{
81 u8 b[256];
82 int err;
83 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b, .len = len + 1 };
84
85 b[0] = reg;
86 memcpy(&b[1],buf,len);
87
88 deb_i2c("i2c wr %02x: ",reg);
89 dbufout(buf,len,deb_i2c);
90 deb_i2c("\n");
91
92 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
93
94 deb_info("%s: i2c write error (addr %02x, reg %02x, err == %i)\n",
95 __FUNCTION__, state->config->demod_address, reg, err);
96 return -EREMOTEIO;
97 }
98
99 return 0;
100}
101
102static int bcm3510_readbytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
103{
104 struct i2c_msg msg[] = {
105 { .addr = state->config->demod_address, .flags = 0, .buf = &reg, .len = 1 },
106 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len }
107 };
108 int err;
109
110 memset(buf,0,len);
111
112 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
113 deb_info("%s: i2c read error (addr %02x, reg %02x, err == %i)\n",
114 __FUNCTION__, state->config->demod_address, reg, err);
115 return -EREMOTEIO;
116 }
117 deb_i2c("i2c rd %02x: ",reg);
118 dbufout(buf,len,deb_i2c);
119 deb_i2c("\n");
120
121 return 0;
122}
123
124static int bcm3510_writeB(struct bcm3510_state *state, u8 reg, bcm3510_register_value v)
125{
126 return bcm3510_writebytes(state,reg,&v.raw,1);
127}
128
129static int bcm3510_readB(struct bcm3510_state *state, u8 reg, bcm3510_register_value *v)
130{
131 return bcm3510_readbytes(state,reg,&v->raw,1);
132}
133
134/* Host Access Buffer transfers */
135static int bcm3510_hab_get_response(struct bcm3510_state *st, u8 *buf, int len)
136{
137 bcm3510_register_value v;
138 int ret,i;
139
140 v.HABADR_a6.HABADR = 0;
141 if ((ret = bcm3510_writeB(st,0xa6,v)) < 0)
142 return ret;
143
144 for (i = 0; i < len; i++) {
145 if ((ret = bcm3510_readB(st,0xa7,&v)) < 0)
146 return ret;
147 buf[i] = v.HABDATA_a7;
148 }
149 return 0;
150}
151
152static int bcm3510_hab_send_request(struct bcm3510_state *st, u8 *buf, int len)
153{
154 bcm3510_register_value v,hab;
155 int ret,i;
156 unsigned long t;
157
158/* Check if any previous HAB request still needs to be serviced by the
159 * Aquisition Processor before sending new request */
160 if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
161 return ret;
162 if (v.HABSTAT_a8.HABR) {
163 deb_info("HAB is running already - clearing it.\n");
164 v.HABSTAT_a8.HABR = 0;
165 bcm3510_writeB(st,0xa8,v);
166// return -EBUSY;
167 }
168
169/* Send the start HAB Address (automatically incremented after write of
170 * HABDATA) and write the HAB Data */
171 hab.HABADR_a6.HABADR = 0;
172 if ((ret = bcm3510_writeB(st,0xa6,hab)) < 0)
173 return ret;
174
175 for (i = 0; i < len; i++) {
176 hab.HABDATA_a7 = buf[i];
177 if ((ret = bcm3510_writeB(st,0xa7,hab)) < 0)
178 return ret;
179 }
180
181/* Set the HABR bit to indicate AP request in progress (LBHABR allows HABR to
182 * be written) */
183 v.raw = 0; v.HABSTAT_a8.HABR = 1; v.HABSTAT_a8.LDHABR = 1;
184 if ((ret = bcm3510_writeB(st,0xa8,v)) < 0)
185 return ret;
186
187/* Polling method: Wait until the AP finishes processing the HAB request */
188 t = jiffies + 1*HZ;
189 while (time_before(jiffies, t)) {
190 deb_info("waiting for HAB to complete\n");
191 msleep(10);
192 if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
193 return ret;
194
195 if (!v.HABSTAT_a8.HABR)
196 return 0;
197 }
198
199 deb_info("send_request execution timed out.\n");
200 return -ETIMEDOUT;
201}
202
203static int bcm3510_do_hab_cmd(struct bcm3510_state *st, u8 cmd, u8 msgid, u8 *obuf, u8 olen, u8 *ibuf, u8 ilen)
204{
205 u8 ob[olen+2],ib[ilen+2];
206 int ret = 0;
207
208 ob[0] = cmd;
209 ob[1] = msgid;
210 memcpy(&ob[2],obuf,olen);
211
212 deb_hab("hab snd: ");
213 dbufout(ob,olen+2,deb_hab);
214 deb_hab("\n");
215
216 if (down_interruptible(&st->hab_sem) < 0)
217 return -EAGAIN;
218
219 if ((ret = bcm3510_hab_send_request(st, ob, olen+2)) < 0 ||
220 (ret = bcm3510_hab_get_response(st, ib, ilen+2)) < 0)
221 goto error;
222
223 deb_hab("hab get: ");
224 dbufout(ib,ilen+2,deb_hab);
225 deb_hab("\n");
226
227 memcpy(ibuf,&ib[2],ilen);
228error:
229 up(&st->hab_sem);
230 return ret;
231}
232
233#if 0
234/* not needed, we use a semaphore to prevent HAB races */
235static int bcm3510_is_ap_ready(struct bcm3510_state *st)
236{
237 bcm3510_register_value ap,hab;
238 int ret;
239
240 if ((ret = bcm3510_readB(st,0xa8,&hab)) < 0 ||
241 (ret = bcm3510_readB(st,0xa2,&ap) < 0))
242 return ret;
243
244 if (ap.APSTAT1_a2.RESET || ap.APSTAT1_a2.IDLE || ap.APSTAT1_a2.STOP || hab.HABSTAT_a8.HABR) {
245 deb_info("AP is busy\n");
246 return -EBUSY;
247 }
248
249 return 0;
250}
251#endif
252
253static int bcm3510_bert_reset(struct bcm3510_state *st)
254{
255 bcm3510_register_value b;
256 int ret;
257
258 if ((ret < bcm3510_readB(st,0xfa,&b)) < 0)
259 return ret;
260
261 b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
262 b.BERCTL_fa.RESYNC = 1; bcm3510_writeB(st,0xfa,b);
263 b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
264 b.BERCTL_fa.CNTCTL = 1; b.BERCTL_fa.BITCNT = 1; bcm3510_writeB(st,0xfa,b);
265
266 /* clear residual bit counter TODO */
267 return 0;
268}
269
270static int bcm3510_refresh_state(struct bcm3510_state *st)
271{
272 if (time_after(jiffies,st->next_status_check)) {
273 bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS1, NULL,0, (u8 *)&st->status1, sizeof(st->status1));
274 bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS2, NULL,0, (u8 *)&st->status2, sizeof(st->status2));
275 st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
276 }
277 return 0;
278}
279
280static int bcm3510_read_status(struct dvb_frontend *fe, fe_status_t *status)
281{
282 struct bcm3510_state* st = fe->demodulator_priv;
283 bcm3510_refresh_state(st);
284
285 *status = 0;
286 if (st->status1.STATUS1.RECEIVER_LOCK)
287 *status |= FE_HAS_LOCK | FE_HAS_SYNC;
288
289 if (st->status1.STATUS1.FEC_LOCK)
290 *status |= FE_HAS_VITERBI;
291
292 if (st->status1.STATUS1.OUT_PLL_LOCK)
293 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
294
295 if (*status & FE_HAS_LOCK)
296 st->status_check_interval = 1500;
297 else /* more frequently checks if no lock has been achieved yet */
298 st->status_check_interval = 500;
299
300 deb_info("real_status: %02x\n",*status);
301 return 0;
302}
303
304static int bcm3510_read_ber(struct dvb_frontend* fe, u32* ber)
305{
306 struct bcm3510_state* st = fe->demodulator_priv;
307 bcm3510_refresh_state(st);
308
309 *ber = (st->status2.LDBER0 << 16) | (st->status2.LDBER1 << 8) | st->status2.LDBER2;
310 return 0;
311}
312
313static int bcm3510_read_unc(struct dvb_frontend* fe, u32* unc)
314{
315 struct bcm3510_state* st = fe->demodulator_priv;
316 bcm3510_refresh_state(st);
317 *unc = (st->status2.LDUERC0 << 8) | st->status2.LDUERC1;
318 return 0;
319}
320
321static int bcm3510_read_signal_strength(struct dvb_frontend* fe, u16* strength)
322{
323 struct bcm3510_state* st = fe->demodulator_priv;
324 s32 t;
325
326 bcm3510_refresh_state(st);
327 t = st->status2.SIGNAL;
328
329 if (t > 190)
330 t = 190;
331 if (t < 90)
332 t = 90;
333
334 t -= 90;
335 t = t * 0xff / 100;
336 /* normalize if necessary */
337 *strength = (t << 8) | t;
338 return 0;
339}
340
341static int bcm3510_read_snr(struct dvb_frontend* fe, u16* snr)
342{
343 struct bcm3510_state* st = fe->demodulator_priv;
344 bcm3510_refresh_state(st);
345
346 *snr = st->status1.SNR_EST0*1000 + ((st->status1.SNR_EST1*1000) >> 8);
347 return 0;
348}
349
350/* tuner frontend programming */
351static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a)
352{
353 struct bcm3510_hab_cmd_tune c;
354 memset(&c,0,sizeof(struct bcm3510_hab_cmd_tune));
355
356/* I2C Mode disabled, set 16 control / Data pairs */
357 c.length = 0x10;
358 c.clock_width = 0;
359/* CS1, CS0, DATA, CLK bits control the tuner RF_AGC_SEL pin is set to
360 * logic high (as Configuration) */
361 c.misc = 0x10;
362/* Set duration of the initial state of TUNCTL = 3.34 micro Sec */
363 c.TUNCTL_state = 0x40;
364
365/* PRESCALER DEVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
366 c.ctl_dat[0].ctrl.size = BITS_8;
367 c.ctl_dat[0].data = 0x80 | bc;
368
369/* Control DATA pin, 1stosc REFERENCE COUNTER REF_S10 to REF_S3 */
370 c.ctl_dat[1].ctrl.size = BITS_8;
371 c.ctl_dat[1].data = 4;
372
373/* set CONTROL BIT 1 to 1, 1stosc REFERENCE COUNTER REF_S2 to REF_S1 */
374 c.ctl_dat[2].ctrl.size = BITS_3;
375 c.ctl_dat[2].data = 0x20;
376
377/* control CS0 pin, pulse byte ? */
378 c.ctl_dat[3].ctrl.size = BITS_3;
379 c.ctl_dat[3].ctrl.clk_off = 1;
380 c.ctl_dat[3].ctrl.cs0 = 1;
381 c.ctl_dat[3].data = 0x40;
382
383/* PGM_S18 to PGM_S11 */
384 c.ctl_dat[4].ctrl.size = BITS_8;
385 c.ctl_dat[4].data = n >> 3;
386
387/* PGM_S10 to PGM_S8, SWL_S7 to SWL_S3 */
388 c.ctl_dat[5].ctrl.size = BITS_8;
389 c.ctl_dat[5].data = ((n & 0x7) << 5) | (a >> 2);
390
391/* SWL_S2 and SWL_S1, set CONTROL BIT 2 to 0 */
392 c.ctl_dat[6].ctrl.size = BITS_3;
393 c.ctl_dat[6].data = (a << 6) & 0xdf;
394
395/* control CS0 pin, pulse byte ? */
396 c.ctl_dat[7].ctrl.size = BITS_3;
397 c.ctl_dat[7].ctrl.clk_off = 1;
398 c.ctl_dat[7].ctrl.cs0 = 1;
399 c.ctl_dat[7].data = 0x40;
400
401/* PRESCALER DEVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
402 c.ctl_dat[8].ctrl.size = BITS_8;
403 c.ctl_dat[8].data = 0x80;
404
405/* 2ndosc REFERENCE COUNTER REF_S10 to REF_S3 */
406 c.ctl_dat[9].ctrl.size = BITS_8;
407 c.ctl_dat[9].data = 0x10;
408
409/* set CONTROL BIT 1 to 1, 2ndosc REFERENCE COUNTER REF_S2 to REF_S1 */
410 c.ctl_dat[10].ctrl.size = BITS_3;
411 c.ctl_dat[10].data = 0x20;
412
413/* pulse byte */
414 c.ctl_dat[11].ctrl.size = BITS_3;
415 c.ctl_dat[11].ctrl.clk_off = 1;
416 c.ctl_dat[11].ctrl.cs1 = 1;
417 c.ctl_dat[11].data = 0x40;
418
419/* PGM_S18 to PGM_S11 */
420 c.ctl_dat[12].ctrl.size = BITS_8;
421 c.ctl_dat[12].data = 0x2a;
422
423/* PGM_S10 to PGM_S8 and SWL_S7 to SWL_S3 */
424 c.ctl_dat[13].ctrl.size = BITS_8;
425 c.ctl_dat[13].data = 0x8e;
426
427/* SWL_S2 and SWL_S1 and set CONTROL BIT 2 to 0 */
428 c.ctl_dat[14].ctrl.size = BITS_3;
429 c.ctl_dat[14].data = 0;
430
431/* Pulse Byte */
432 c.ctl_dat[15].ctrl.size = BITS_3;
433 c.ctl_dat[15].ctrl.clk_off = 1;
434 c.ctl_dat[15].ctrl.cs1 = 1;
435 c.ctl_dat[15].data = 0x40;
436
437 return bcm3510_do_hab_cmd(st,CMD_TUNE, MSGID_TUNE,(u8 *) &c,sizeof(c), NULL, 0);
438}
439
440static int bcm3510_set_freq(struct bcm3510_state* st,u32 freq)
441{
442 u8 bc,a;
443 u16 n;
444 s32 YIntercept,Tfvco1;
445
446 freq /= 1000;
447
448 deb_info("%dkHz:",freq);
449 /* set Band Switch */
450 if (freq <= 168000)
451 bc = 0x1c;
452 else if (freq <= 378000)
453 bc = 0x2c;
454 else
455 bc = 0x30;
456
457 if (freq >= 470000) {
458 freq -= 470001;
459 YIntercept = 18805;
460 } else if (freq >= 90000) {
461 freq -= 90001;
462 YIntercept = 15005;
463 } else if (freq >= 76000){
464 freq -= 76001;
465 YIntercept = 14865;
466 } else {
467 freq -= 54001;
468 YIntercept = 14645;
469 }
470
471 Tfvco1 = (((freq/6000)*60 + YIntercept)*4)/10;
472
473 n = Tfvco1 >> 6;
474 a = Tfvco1 & 0x3f;
475
476 deb_info(" BC1_2_3_4: %x, N: %x A: %x\n", bc, n, a);
477 if (n >= 16 && n <= 2047)
478 return bcm3510_tuner_cmd(st,bc,n,a);
479
480 return -EINVAL;
481}
482
483static int bcm3510_set_frontend(struct dvb_frontend* fe,
484 struct dvb_frontend_parameters *p)
485{
486 struct bcm3510_state* st = fe->demodulator_priv;
487 struct bcm3510_hab_cmd_ext_acquire cmd;
488 struct bcm3510_hab_cmd_bert_control bert;
489 int ret;
490
491 memset(&cmd,0,sizeof(cmd));
492 switch (p->u.vsb.modulation) {
493 case QAM_256:
494 cmd.ACQUIRE0.MODE = 0x1;
495 cmd.ACQUIRE1.SYM_RATE = 0x1;
496 cmd.ACQUIRE1.IF_FREQ = 0x1;
497 break;
498 case QAM_64:
499 cmd.ACQUIRE0.MODE = 0x2;
500 cmd.ACQUIRE1.SYM_RATE = 0x2;
501 cmd.ACQUIRE1.IF_FREQ = 0x1;
502 break;
503/* case QAM_256:
504 cmd.ACQUIRE0.MODE = 0x3;
505 break;
506 case QAM_128:
507 cmd.ACQUIRE0.MODE = 0x4;
508 break;
509 case QAM_64:
510 cmd.ACQUIRE0.MODE = 0x5;
511 break;
512 case QAM_32:
513 cmd.ACQUIRE0.MODE = 0x6;
514 break;
515 case QAM_16:
516 cmd.ACQUIRE0.MODE = 0x7;
517 break;*/
518 case VSB_8:
519 cmd.ACQUIRE0.MODE = 0x8;
520 cmd.ACQUIRE1.SYM_RATE = 0x0;
521 cmd.ACQUIRE1.IF_FREQ = 0x0;
522 break;
523 case VSB_16:
524 cmd.ACQUIRE0.MODE = 0x9;
525 cmd.ACQUIRE1.SYM_RATE = 0x0;
526 cmd.ACQUIRE1.IF_FREQ = 0x0;
527 default:
528 return -EINVAL;
529 };
530 cmd.ACQUIRE0.OFFSET = 0;
531 cmd.ACQUIRE0.NTSCSWEEP = 1;
532 cmd.ACQUIRE0.FA = 1;
533 cmd.ACQUIRE0.BW = 0;
534
535/* if (enableOffset) {
536 cmd.IF_OFFSET0 = xx;
537 cmd.IF_OFFSET1 = xx;
538
539 cmd.SYM_OFFSET0 = xx;
540 cmd.SYM_OFFSET1 = xx;
541 if (enableNtscSweep) {
542 cmd.NTSC_OFFSET0;
543 cmd.NTSC_OFFSET1;
544 }
545 } */
546 bcm3510_do_hab_cmd(st, CMD_ACQUIRE, MSGID_EXT_TUNER_ACQUIRE, (u8 *) &cmd, sizeof(cmd), NULL, 0);
547
548/* doing it with different MSGIDs, data book and source differs */
549 bert.BE = 0;
550 bert.unused = 0;
551 bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_CONTROL, (u8 *) &bert, sizeof(bert), NULL, 0);
552 bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_SET, (u8 *) &bert, sizeof(bert), NULL, 0);
553
554 bcm3510_bert_reset(st);
555
556 if ((ret = bcm3510_set_freq(st,p->frequency)) < 0)
557 return ret;
558
559 memset(&st->status1,0,sizeof(st->status1));
560 memset(&st->status2,0,sizeof(st->status2));
561 st->status_check_interval = 500;
562
563/* Give the AP some time */
564 msleep(200);
565
566 return 0;
567}
568
569static int bcm3510_sleep(struct dvb_frontend* fe)
570{
571 return 0;
572}
573
574static int bcm3510_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *s)
575{
576 s->min_delay_ms = 1000;
577 s->step_size = 0;
578 s->max_drift = 0;
579 return 0;
580}
581
582static void bcm3510_release(struct dvb_frontend* fe)
583{
584 struct bcm3510_state* state = fe->demodulator_priv;
585 kfree(state);
586}
587
588/* firmware download:
589 * firmware file is build up like this:
590 * 16bit addr, 16bit length, 8byte of length
591 */
592#define BCM3510_DEFAULT_FIRMWARE "dvb-fe-bcm3510-01.fw"
593
594static int bcm3510_write_ram(struct bcm3510_state *st, u16 addr, u8 *b, u16 len)
595{
596 int ret = 0,i;
597 bcm3510_register_value vH, vL,vD;
598
599 vH.MADRH_a9 = addr >> 8;
600 vL.MADRL_aa = addr;
601 if ((ret = bcm3510_writeB(st,0xa9,vH)) < 0) return ret;
602 if ((ret = bcm3510_writeB(st,0xaa,vL)) < 0) return ret;
603
604 for (i = 0; i < len; i++) {
605 vD.MDATA_ab = b[i];
606 if ((ret = bcm3510_writeB(st,0xab,vD)) < 0)
607 return ret;
608 }
609
610 return 0;
611}
612
613static int bcm3510_download_firmware(struct dvb_frontend* fe)
614{
615 struct bcm3510_state* st = fe->demodulator_priv;
616 const struct firmware *fw;
617 u16 addr,len;
618 u8 *b;
619 int ret,i;
620
621 deb_info("requesting firmware\n");
622 if ((ret = st->config->request_firmware(fe, &fw, BCM3510_DEFAULT_FIRMWARE)) < 0) {
623 err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret);
624 return ret;
625 }
Hans Verkuile18828e2006-01-09 15:25:28 -0200626 deb_info("got firmware: %zd\n",fw->size);
Johannes Stezenbach55f51ef2005-06-23 22:02:41 -0700627
628 b = fw->data;
629 for (i = 0; i < fw->size;) {
630 addr = le16_to_cpu( *( (u16 *)&b[i] ) );
631 len = le16_to_cpu( *( (u16 *)&b[i+2] ) );
Hans Verkuile18828e2006-01-09 15:25:28 -0200632 deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size);
Johannes Stezenbach55f51ef2005-06-23 22:02:41 -0700633 if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) {
634 err("firmware download failed: %d\n",ret);
635 return ret;
636 }
637 i += 4 + len;
638 }
639 release_firmware(fw);
640 deb_info("firmware download successfully completed\n");
641 return 0;
642}
643
644static int bcm3510_check_firmware_version(struct bcm3510_state *st)
645{
646 struct bcm3510_hab_cmd_get_version_info ver;
647 bcm3510_do_hab_cmd(st,CMD_GET_VERSION_INFO,MSGID_GET_VERSION_INFO,NULL,0,(u8*)&ver,sizeof(ver));
648
649 deb_info("Version information: 0x%02x 0x%02x 0x%02x 0x%02x\n",
650 ver.microcode_version, ver.script_version, ver.config_version, ver.demod_version);
651
652 if (ver.script_version == BCM3510_DEF_SCRIPT_VERSION &&
653 ver.config_version == BCM3510_DEF_CONFIG_VERSION &&
654 ver.demod_version == BCM3510_DEF_DEMOD_VERSION)
655 return 0;
656
657 deb_info("version check failed\n");
658 return -ENODEV;
659}
660
661/* (un)resetting the AP */
662static int bcm3510_reset(struct bcm3510_state *st)
663{
664 int ret;
665 unsigned long t;
666 bcm3510_register_value v;
667
668 bcm3510_readB(st,0xa0,&v); v.HCTL1_a0.RESET = 1;
669 if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
670 return ret;
671
672 t = jiffies + 3*HZ;
673 while (time_before(jiffies, t)) {
674 msleep(10);
675 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
676 return ret;
677
678 if (v.APSTAT1_a2.RESET)
679 return 0;
680 }
681 deb_info("reset timed out\n");
682 return -ETIMEDOUT;
683}
684
685static int bcm3510_clear_reset(struct bcm3510_state *st)
686{
687 bcm3510_register_value v;
688 int ret;
689 unsigned long t;
690
691 v.raw = 0;
692 if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
693 return ret;
694
695 t = jiffies + 3*HZ;
696 while (time_before(jiffies, t)) {
697 msleep(10);
698 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
699 return ret;
700
701 /* verify that reset is cleared */
702 if (!v.APSTAT1_a2.RESET)
703 return 0;
704 }
705 deb_info("reset clear timed out\n");
706 return -ETIMEDOUT;
707}
708
709static int bcm3510_init_cold(struct bcm3510_state *st)
710{
711 int ret;
712 bcm3510_register_value v;
713
714 /* read Acquisation Processor status register and check it is not in RUN mode */
715 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
716 return ret;
717 if (v.APSTAT1_a2.RUN) {
718 deb_info("AP is already running - firmware already loaded.\n");
719 return 0;
720 }
721
722 deb_info("reset?\n");
723 if ((ret = bcm3510_reset(st)) < 0)
724 return ret;
725
726 deb_info("tristate?\n");
727 /* tri-state */
728 v.TSTCTL_2e.CTL = 0;
729 if ((ret = bcm3510_writeB(st,0x2e,v)) < 0)
730 return ret;
731
732 deb_info("firmware?\n");
733 if ((ret = bcm3510_download_firmware(&st->frontend)) < 0 ||
734 (ret = bcm3510_clear_reset(st)) < 0)
735 return ret;
736
737 /* anything left here to Let the acquisition processor begin execution at program counter 0000 ??? */
738
739 return 0;
740}
741
742static int bcm3510_init(struct dvb_frontend* fe)
743{
744 struct bcm3510_state* st = fe->demodulator_priv;
745 bcm3510_register_value j;
746 struct bcm3510_hab_cmd_set_agc c;
747 int ret;
748
749 if ((ret = bcm3510_readB(st,0xca,&j)) < 0)
750 return ret;
751
752 deb_info("JDEC: %02x\n",j.raw);
753
754 switch (j.JDEC_ca.JDEC) {
755 case JDEC_WAIT_AT_RAM:
756 deb_info("attempting to download firmware\n");
757 if ((ret = bcm3510_init_cold(st)) < 0)
758 return ret;
759 case JDEC_EEPROM_LOAD_WAIT: /* fall-through is wanted */
760 deb_info("firmware is loaded\n");
761 bcm3510_check_firmware_version(st);
762 break;
763 default:
764 return -ENODEV;
765 }
766
767 memset(&c,0,1);
768 c.SEL = 1;
769 bcm3510_do_hab_cmd(st,CMD_AUTO_PARAM,MSGID_SET_RF_AGC_SEL,(u8 *)&c,sizeof(c),NULL,0);
770
771 return 0;
772}
773
774
775static struct dvb_frontend_ops bcm3510_ops;
776
777struct dvb_frontend* bcm3510_attach(const struct bcm3510_config *config,
778 struct i2c_adapter *i2c)
779{
780 struct bcm3510_state* state = NULL;
781 int ret;
782 bcm3510_register_value v;
783
784 /* allocate memory for the internal state */
785 state = kmalloc(sizeof(struct bcm3510_state), GFP_KERNEL);
786 if (state == NULL)
787 goto error;
788 memset(state,0,sizeof(struct bcm3510_state));
789
790 /* setup the state */
791
792 state->config = config;
793 state->i2c = i2c;
794 memcpy(&state->ops, &bcm3510_ops, sizeof(struct dvb_frontend_ops));
795
796 /* create dvb_frontend */
797 state->frontend.ops = &state->ops;
798 state->frontend.demodulator_priv = state;
799
800 sema_init(&state->hab_sem, 1);
801
802 if ((ret = bcm3510_readB(state,0xe0,&v)) < 0)
803 goto error;
804
805 deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v.REVID_e0.REV,v.REVID_e0.LAYER);
806
807 if ((v.REVID_e0.REV != 0x1 && v.REVID_e0.LAYER != 0xb) && /* cold */
808 (v.REVID_e0.REV != 0x8 && v.REVID_e0.LAYER != 0x0)) /* warm */
809 goto error;
810
811 info("Revision: 0x%1x, Layer: 0x%1x.",v.REVID_e0.REV,v.REVID_e0.LAYER);
812
813 bcm3510_reset(state);
814
815 return &state->frontend;
816
817error:
818 kfree(state);
819 return NULL;
820}
821EXPORT_SYMBOL(bcm3510_attach);
822
823static struct dvb_frontend_ops bcm3510_ops = {
824
825 .info = {
826 .name = "Broadcom BCM3510 VSB/QAM frontend",
827 .type = FE_ATSC,
828 .frequency_min = 54000000,
829 .frequency_max = 803000000,
Mauro Carvalho Chehab9101e622005-12-12 00:37:24 -0800830 /* stepsize is just a guess */
Johannes Stezenbach55f51ef2005-06-23 22:02:41 -0700831 .frequency_stepsize = 0,
832 .caps =
833 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
834 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
835 FE_CAN_8VSB | FE_CAN_16VSB |
836 FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_128 | FE_CAN_QAM_256
837 },
838
839 .release = bcm3510_release,
840
841 .init = bcm3510_init,
842 .sleep = bcm3510_sleep,
843
844 .set_frontend = bcm3510_set_frontend,
845 .get_tune_settings = bcm3510_get_tune_settings,
846
847 .read_status = bcm3510_read_status,
848 .read_ber = bcm3510_read_ber,
849 .read_signal_strength = bcm3510_read_signal_strength,
850 .read_snr = bcm3510_read_snr,
851 .read_ucblocks = bcm3510_read_unc,
852};
853
854MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
855MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>");
856MODULE_LICENSE("GPL");