Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | config FPU |
| 2 | bool |
| 3 | default n |
| 4 | |
sfking@fdwdc.com | af39bb8 | 2009-06-19 18:11:00 -0700 | [diff] [blame] | 5 | config GENERIC_GPIO |
| 6 | bool |
| 7 | default n |
| 8 | |
Sebastian Siewior | 95469bd | 2008-04-28 11:43:01 +0200 | [diff] [blame] | 9 | config GENERIC_CMOS_UPDATE |
| 10 | bool |
| 11 | default y |
| 12 | |
Sebastian Siewior | 2b9a698 | 2008-04-28 11:43:04 +0200 | [diff] [blame] | 13 | config GENERIC_CLOCKEVENTS |
| 14 | bool |
| 15 | default n |
| 16 | |
Greg Ungerer | 1c83af5 | 2010-11-04 13:53:26 +1000 | [diff] [blame] | 17 | config COLDFIRE_SW_A7 |
| 18 | bool |
| 19 | default n |
| 20 | |
Greg Ungerer | 0ef6c9b | 2010-11-09 15:31:08 +1000 | [diff] [blame] | 21 | config HAVE_CACHE_SPLIT |
| 22 | bool |
| 23 | |
Greg Ungerer | 4a5bae4 | 2010-11-09 16:00:17 +1000 | [diff] [blame] | 24 | config HAVE_CACHE_CB |
| 25 | bool |
| 26 | |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 27 | config HAVE_MBAR |
| 28 | bool |
| 29 | |
| 30 | config HAVE_IPSBAR |
| 31 | bool |
| 32 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | choice |
| 34 | prompt "CPU" |
| 35 | default M68EZ328 |
| 36 | |
| 37 | config M68328 |
| 38 | bool "MC68328" |
| 39 | help |
| 40 | Motorola 68328 processor support. |
| 41 | |
| 42 | config M68EZ328 |
| 43 | bool "MC68EZ328" |
| 44 | help |
| 45 | Motorola 68EX328 processor support. |
| 46 | |
| 47 | config M68VZ328 |
| 48 | bool "MC68VZ328" |
| 49 | help |
| 50 | Motorola 68VZ328 processor support. |
| 51 | |
| 52 | config M68360 |
| 53 | bool "MC68360" |
| 54 | help |
| 55 | Motorola 68360 processor support. |
| 56 | |
| 57 | config M5206 |
| 58 | bool "MCF5206" |
Greg Ungerer | 1c83af5 | 2010-11-04 13:53:26 +1000 | [diff] [blame] | 59 | select COLDFIRE_SW_A7 |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 60 | select HAVE_MBAR |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | help |
| 62 | Motorola ColdFire 5206 processor support. |
| 63 | |
| 64 | config M5206e |
| 65 | bool "MCF5206e" |
Greg Ungerer | 1c83af5 | 2010-11-04 13:53:26 +1000 | [diff] [blame] | 66 | select COLDFIRE_SW_A7 |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 67 | select HAVE_MBAR |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 68 | help |
| 69 | Motorola ColdFire 5206e processor support. |
| 70 | |
Greg Ungerer | 4e51f674 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 71 | config M520x |
| 72 | bool "MCF520x" |
Sebastian Siewior | 2b9a698 | 2008-04-28 11:43:04 +0200 | [diff] [blame] | 73 | select GENERIC_CLOCKEVENTS |
Greg Ungerer | 0ef6c9b | 2010-11-09 15:31:08 +1000 | [diff] [blame] | 74 | select HAVE_CACHE_SPLIT |
Greg Ungerer | 4e51f674 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 75 | help |
| 76 | Freescale Coldfire 5207/5208 processor support. |
| 77 | |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 78 | config M523x |
| 79 | bool "MCF523x" |
Sebastian Siewior | 2b9a698 | 2008-04-28 11:43:04 +0200 | [diff] [blame] | 80 | select GENERIC_CLOCKEVENTS |
Greg Ungerer | 0ef6c9b | 2010-11-09 15:31:08 +1000 | [diff] [blame] | 81 | select HAVE_CACHE_SPLIT |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 82 | select HAVE_IPSBAR |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 83 | help |
| 84 | Freescale Coldfire 5230/1/2/4/5 processor support |
| 85 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | config M5249 |
| 87 | bool "MCF5249" |
Greg Ungerer | 1c83af5 | 2010-11-04 13:53:26 +1000 | [diff] [blame] | 88 | select COLDFIRE_SW_A7 |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 89 | select HAVE_MBAR |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 90 | help |
| 91 | Motorola ColdFire 5249 processor support. |
| 92 | |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 93 | config M5271 |
| 94 | bool "MCF5271" |
Greg Ungerer | 0ef6c9b | 2010-11-09 15:31:08 +1000 | [diff] [blame] | 95 | select HAVE_CACHE_SPLIT |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 96 | select HAVE_IPSBAR |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | help |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 98 | Freescale (Motorola) ColdFire 5270/5271 processor support. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | |
| 100 | config M5272 |
| 101 | bool "MCF5272" |
Greg Ungerer | 1c83af5 | 2010-11-04 13:53:26 +1000 | [diff] [blame] | 102 | select COLDFIRE_SW_A7 |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 103 | select HAVE_MBAR |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | help |
| 105 | Motorola ColdFire 5272 processor support. |
| 106 | |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 107 | config M5275 |
| 108 | bool "MCF5275" |
Greg Ungerer | 0ef6c9b | 2010-11-09 15:31:08 +1000 | [diff] [blame] | 109 | select HAVE_CACHE_SPLIT |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 110 | select HAVE_IPSBAR |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 111 | help |
| 112 | Freescale (Motorola) ColdFire 5274/5275 processor support. |
| 113 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 114 | config M528x |
| 115 | bool "MCF528x" |
Sebastian Siewior | 2b9a698 | 2008-04-28 11:43:04 +0200 | [diff] [blame] | 116 | select GENERIC_CLOCKEVENTS |
Greg Ungerer | 0ef6c9b | 2010-11-09 15:31:08 +1000 | [diff] [blame] | 117 | select HAVE_CACHE_SPLIT |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 118 | select HAVE_IPSBAR |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | help |
| 120 | Motorola ColdFire 5280/5282 processor support. |
| 121 | |
| 122 | config M5307 |
| 123 | bool "MCF5307" |
Greg Ungerer | 1c83af5 | 2010-11-04 13:53:26 +1000 | [diff] [blame] | 124 | select COLDFIRE_SW_A7 |
Greg Ungerer | 4a5bae4 | 2010-11-09 16:00:17 +1000 | [diff] [blame] | 125 | select HAVE_CACHE_CB |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 126 | select HAVE_MBAR |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | help |
| 128 | Motorola ColdFire 5307 processor support. |
| 129 | |
Greg Ungerer | 5d36f8e | 2006-06-26 10:45:45 +1000 | [diff] [blame] | 130 | config M532x |
| 131 | bool "MCF532x" |
Greg Ungerer | 4a5bae4 | 2010-11-09 16:00:17 +1000 | [diff] [blame] | 132 | select HAVE_CACHE_CB |
Greg Ungerer | 5d36f8e | 2006-06-26 10:45:45 +1000 | [diff] [blame] | 133 | help |
| 134 | Freescale (Motorola) ColdFire 532x processor support. |
| 135 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 136 | config M5407 |
| 137 | bool "MCF5407" |
Greg Ungerer | 1c83af5 | 2010-11-04 13:53:26 +1000 | [diff] [blame] | 138 | select COLDFIRE_SW_A7 |
Greg Ungerer | 4a5bae4 | 2010-11-09 16:00:17 +1000 | [diff] [blame] | 139 | select HAVE_CACHE_CB |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 140 | select HAVE_MBAR |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | help |
| 142 | Motorola ColdFire 5407 processor support. |
| 143 | |
Greg Ungerer | 9e29949 | 2010-11-02 12:13:34 +1000 | [diff] [blame] | 144 | config M547x |
| 145 | bool "MCF547x" |
Greg Ungerer | 4a5bae4 | 2010-11-09 16:00:17 +1000 | [diff] [blame] | 146 | select HAVE_CACHE_CB |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 147 | select HAVE_MBAR |
Greg Ungerer | 9e29949 | 2010-11-02 12:13:34 +1000 | [diff] [blame] | 148 | help |
| 149 | Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support. |
| 150 | |
Philippe De Muyter | ea49f8ff | 2010-09-20 13:11:11 +0200 | [diff] [blame] | 151 | config M548x |
| 152 | bool "MCF548x" |
Greg Ungerer | 4a5bae4 | 2010-11-09 16:00:17 +1000 | [diff] [blame] | 153 | select HAVE_CACHE_CB |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 154 | select HAVE_MBAR |
Philippe De Muyter | ea49f8ff | 2010-09-20 13:11:11 +0200 | [diff] [blame] | 155 | help |
| 156 | Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support. |
| 157 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | endchoice |
| 159 | |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 160 | config M527x |
| 161 | bool |
| 162 | depends on (M5271 || M5275) |
Sebastian Siewior | 2b9a698 | 2008-04-28 11:43:04 +0200 | [diff] [blame] | 163 | select GENERIC_CLOCKEVENTS |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 164 | default y |
| 165 | |
Greg Ungerer | 5b2e655 | 2010-11-02 12:05:29 +1000 | [diff] [blame] | 166 | config M54xx |
| 167 | bool |
Greg Ungerer | 9e29949 | 2010-11-02 12:13:34 +1000 | [diff] [blame] | 168 | depends on (M548x || M547x) |
Greg Ungerer | 5b2e655 | 2010-11-02 12:05:29 +1000 | [diff] [blame] | 169 | default y |
| 170 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 171 | config COLDFIRE |
| 172 | bool |
Greg Ungerer | 5b2e655 | 2010-11-02 12:05:29 +1000 | [diff] [blame] | 173 | depends on (M5206 || M5206e || M520x || M523x || M5249 || M527x || M5272 || M528x || M5307 || M532x || M5407 || M54xx) |
sfking@fdwdc.com | af39bb8 | 2009-06-19 18:11:00 -0700 | [diff] [blame] | 174 | select GENERIC_GPIO |
| 175 | select ARCH_REQUIRE_GPIOLIB |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 176 | default y |
| 177 | |
Greg Ungerer | e648cd2 | 2006-06-26 10:55:36 +1000 | [diff] [blame] | 178 | config CLOCK_SET |
| 179 | bool "Enable setting the CPU clock frequency" |
| 180 | default n |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | help |
Greg Ungerer | e648cd2 | 2006-06-26 10:55:36 +1000 | [diff] [blame] | 182 | On some CPU's you do not need to know what the core CPU clock |
| 183 | frequency is. On these you can disable clock setting. On some |
| 184 | traditional 68K parts, and on all ColdFire parts you need to set |
| 185 | the appropriate CPU clock frequency. On these devices many of the |
| 186 | onboard peripherals derive their timing from the master CPU clock |
| 187 | frequency. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 188 | |
Greg Ungerer | e648cd2 | 2006-06-26 10:55:36 +1000 | [diff] [blame] | 189 | config CLOCK_FREQ |
| 190 | int "Set the core clock frequency" |
| 191 | default "66666666" |
| 192 | depends on CLOCK_SET |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 193 | help |
Greg Ungerer | e648cd2 | 2006-06-26 10:55:36 +1000 | [diff] [blame] | 194 | Define the CPU clock frequency in use. This is the core clock |
| 195 | frequency, it may or may not be the same as the external clock |
| 196 | crystal fitted to your board. Some processors have an internal |
| 197 | PLL and can have their frequency programmed at run time, others |
Matt LaPlante | 44c0920 | 2006-10-03 22:34:14 +0200 | [diff] [blame] | 198 | use internal dividers. In general the kernel won't setup a PLL |
| 199 | if it is fitted (there are some exceptions). This value will be |
Greg Ungerer | e648cd2 | 2006-06-26 10:55:36 +1000 | [diff] [blame] | 200 | specific to the exact CPU that you are using. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | config OLDMASK |
| 203 | bool "Old mask 5307 (1H55J) silicon" |
| 204 | depends on M5307 |
| 205 | help |
| 206 | Build support for the older revision ColdFire 5307 silicon. |
| 207 | Specifically this is the 1H55J mask revision. |
| 208 | |
Greg Ungerer | 0ef6c9b | 2010-11-09 15:31:08 +1000 | [diff] [blame] | 209 | if HAVE_CACHE_SPLIT |
| 210 | choice |
| 211 | prompt "Split Cache Configuration" |
| 212 | default CACHE_I |
| 213 | |
| 214 | config CACHE_I |
| 215 | bool "Instruction" |
| 216 | help |
| 217 | Use all of the ColdFire CPU cache memory as an instruction cache. |
| 218 | |
| 219 | config CACHE_D |
| 220 | bool "Data" |
| 221 | help |
| 222 | Use all of the ColdFire CPU cache memory as a data cache. |
| 223 | |
| 224 | config CACHE_BOTH |
| 225 | bool "Both" |
| 226 | help |
| 227 | Split the ColdFire CPU cache, and use half as an instruction cache |
| 228 | and half as a data cache. |
| 229 | endchoice |
Greg Ungerer | 4a5bae4 | 2010-11-09 16:00:17 +1000 | [diff] [blame] | 230 | endif |
Greg Ungerer | 0ef6c9b | 2010-11-09 15:31:08 +1000 | [diff] [blame] | 231 | |
Greg Ungerer | 4a5bae4 | 2010-11-09 16:00:17 +1000 | [diff] [blame] | 232 | if HAVE_CACHE_CB |
| 233 | choice |
| 234 | prompt "Data cache mode" |
| 235 | default CACHE_WRITETHRU |
| 236 | |
| 237 | config CACHE_WRITETHRU |
| 238 | bool "Write-through" |
| 239 | help |
| 240 | The ColdFire CPU cache is set into Write-through mode. |
| 241 | |
| 242 | config CACHE_COPYBACK |
| 243 | bool "Copy-back" |
| 244 | help |
| 245 | The ColdFire CPU cache is set into Copy-back mode. |
| 246 | endchoice |
Greg Ungerer | 0ef6c9b | 2010-11-09 15:31:08 +1000 | [diff] [blame] | 247 | endif |
| 248 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | comment "Platform" |
| 250 | |
| 251 | config PILOT3 |
| 252 | bool "Pilot 1000/5000, PalmPilot Personal/Pro, or PalmIII support" |
| 253 | depends on M68328 |
| 254 | help |
| 255 | Support for the Palm Pilot 1000/5000, Personal/Pro and PalmIII. |
| 256 | |
| 257 | config XCOPILOT_BUGS |
Greg Ungerer | 6869e94 | 2006-12-04 16:40:58 +1000 | [diff] [blame] | 258 | bool "(X)Copilot support" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | depends on PILOT3 |
| 260 | help |
| 261 | Support the bugs of Xcopilot. |
| 262 | |
David Wu | 3699522 | 2007-07-25 22:07:20 +1000 | [diff] [blame] | 263 | config UC5272 |
Philippe De Muyter | 0a977ca | 2010-11-11 23:57:56 +0100 | [diff] [blame] | 264 | bool 'Arcturus Networks uC5272 dimm board support' |
| 265 | depends on M5272 |
| 266 | help |
| 267 | Support for the Arcturus Networks uC5272 dimm board. |
David Wu | 3699522 | 2007-07-25 22:07:20 +1000 | [diff] [blame] | 268 | |
| 269 | config UC5282 |
Philippe De Muyter | 0a977ca | 2010-11-11 23:57:56 +0100 | [diff] [blame] | 270 | bool "Arcturus Networks uC5282 board support" |
| 271 | depends on M528x |
| 272 | help |
| 273 | Support for the Arcturus Networks uC5282 dimm board. |
David Wu | 3699522 | 2007-07-25 22:07:20 +1000 | [diff] [blame] | 274 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | config UCSIMM |
| 276 | bool "uCsimm module support" |
| 277 | depends on M68EZ328 |
| 278 | help |
| 279 | Support for the Arcturus Networks uCsimm module. |
| 280 | |
| 281 | config UCDIMM |
| 282 | bool "uDsimm module support" |
| 283 | depends on M68VZ328 |
| 284 | help |
| 285 | Support for the Arcturus Networks uDsimm module. |
| 286 | |
| 287 | config DRAGEN2 |
| 288 | bool "DragenEngine II board support" |
| 289 | depends on M68VZ328 |
| 290 | help |
| 291 | Support for the DragenEngine II board. |
| 292 | |
| 293 | config DIRECT_IO_ACCESS |
Greg Ungerer | 6869e94 | 2006-12-04 16:40:58 +1000 | [diff] [blame] | 294 | bool "Allow user to access IO directly" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 295 | depends on (UCSIMM || UCDIMM || DRAGEN2) |
| 296 | help |
| 297 | Disable the CPU internal registers protection in user mode, |
Philippe De Muyter | 0a977ca | 2010-11-11 23:57:56 +0100 | [diff] [blame] | 298 | to allow a user application to read/write them. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 299 | |
| 300 | config INIT_LCD |
Greg Ungerer | 6869e94 | 2006-12-04 16:40:58 +1000 | [diff] [blame] | 301 | bool "Initialize LCD" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | depends on (UCSIMM || UCDIMM || DRAGEN2) |
| 303 | help |
| 304 | Initialize the LCD controller of the 68x328 processor. |
| 305 | |
| 306 | config MEMORY_RESERVE |
Greg Ungerer | 6869e94 | 2006-12-04 16:40:58 +1000 | [diff] [blame] | 307 | int "Memory reservation (MiB)" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 308 | depends on (UCSIMM || UCDIMM) |
| 309 | help |
| 310 | Reserve certain memory regions on 68x328 based boards. |
| 311 | |
| 312 | config UCQUICC |
| 313 | bool "Lineo uCquicc board support" |
| 314 | depends on M68360 |
| 315 | help |
| 316 | Support for the Lineo uCquicc board. |
| 317 | |
| 318 | config ARN5206 |
| 319 | bool "Arnewsh 5206 board support" |
| 320 | depends on M5206 |
| 321 | help |
| 322 | Support for the Arnewsh 5206 board. |
| 323 | |
| 324 | config M5206eC3 |
| 325 | bool "Motorola M5206eC3 board support" |
| 326 | depends on M5206e |
| 327 | help |
| 328 | Support for the Motorola M5206eC3 board. |
| 329 | |
| 330 | config ELITE |
| 331 | bool "Motorola M5206eLITE board support" |
| 332 | depends on M5206e |
| 333 | help |
| 334 | Support for the Motorola M5206eLITE board. |
| 335 | |
Greg Ungerer | 4e51f674 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 336 | config M5208EVB |
| 337 | bool "Freescale M5208EVB board support" |
| 338 | depends on M520x |
| 339 | help |
| 340 | Support for the Freescale Coldfire M5208EVB. |
| 341 | |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 342 | config M5235EVB |
| 343 | bool "Freescale M5235EVB support" |
| 344 | depends on M523x |
| 345 | help |
| 346 | Support for the Freescale M5235EVB board. |
| 347 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 348 | config M5249C3 |
| 349 | bool "Motorola M5249C3 board support" |
| 350 | depends on M5249 |
| 351 | help |
| 352 | Support for the Motorola M5249C3 board. |
| 353 | |
| 354 | config M5271EVB |
| 355 | bool "Freescale (Motorola) M5271EVB board support" |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 356 | depends on M5271 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 357 | help |
| 358 | Support for the Freescale (Motorola) M5271EVB board. |
| 359 | |
| 360 | config M5275EVB |
| 361 | bool "Freescale (Motorola) M5275EVB board support" |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 362 | depends on M5275 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 363 | help |
| 364 | Support for the Freescale (Motorola) M5275EVB board. |
| 365 | |
| 366 | config M5272C3 |
| 367 | bool "Motorola M5272C3 board support" |
| 368 | depends on M5272 |
| 369 | help |
| 370 | Support for the Motorola M5272C3 board. |
| 371 | |
| 372 | config COBRA5272 |
| 373 | bool "senTec COBRA5272 board support" |
| 374 | depends on M5272 |
| 375 | help |
| 376 | Support for the senTec COBRA5272 board. |
| 377 | |
Greg Ungerer | 04860bd | 2006-06-26 10:47:13 +1000 | [diff] [blame] | 378 | config AVNET5282 |
| 379 | bool "Avnet 5282 board support" |
| 380 | depends on M528x |
| 381 | help |
| 382 | Support for the Avnet 5282 board. |
| 383 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 384 | config M5282EVB |
| 385 | bool "Motorola M5282EVB board support" |
| 386 | depends on M528x |
| 387 | help |
| 388 | Support for the Motorola M5282EVB board. |
| 389 | |
| 390 | config COBRA5282 |
| 391 | bool "senTec COBRA5282 board support" |
| 392 | depends on M528x |
| 393 | help |
| 394 | Support for the senTec COBRA5282 board. |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 395 | |
| 396 | config SOM5282EM |
| 397 | bool "EMAC.Inc SOM5282EM board support" |
| 398 | depends on M528x |
| 399 | help |
| 400 | Support for the EMAC.Inc SOM5282EM module. |
Greg Ungerer | 906a262 | 2007-07-25 22:07:20 +1000 | [diff] [blame] | 401 | |
| 402 | config WILDFIRE |
| 403 | bool "Intec Automation Inc. WildFire board support" |
| 404 | depends on M528x |
| 405 | help |
| 406 | Support for the Intec Automation Inc. WildFire. |
| 407 | |
| 408 | config WILDFIREMOD |
| 409 | bool "Intec Automation Inc. WildFire module support" |
| 410 | depends on M528x |
| 411 | help |
| 412 | Support for the Intec Automation Inc. WildFire module. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 413 | |
| 414 | config ARN5307 |
| 415 | bool "Arnewsh 5307 board support" |
| 416 | depends on M5307 |
| 417 | help |
| 418 | Support for the Arnewsh 5307 board. |
| 419 | |
| 420 | config M5307C3 |
| 421 | bool "Motorola M5307C3 board support" |
| 422 | depends on M5307 |
| 423 | help |
| 424 | Support for the Motorola M5307C3 board. |
| 425 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 426 | config SECUREEDGEMP3 |
| 427 | bool "SnapGear SecureEdge/MP3 platform support" |
| 428 | depends on M5307 |
| 429 | help |
| 430 | Support for the SnapGear SecureEdge/MP3 platform. |
| 431 | |
Greg Ungerer | 5d36f8e | 2006-06-26 10:45:45 +1000 | [diff] [blame] | 432 | config M5329EVB |
| 433 | bool "Freescale (Motorola) M5329EVB board support" |
| 434 | depends on M532x |
| 435 | help |
| 436 | Support for the Freescale (Motorola) M5329EVB board. |
| 437 | |
| 438 | config COBRA5329 |
| 439 | bool "senTec COBRA5329 board support" |
| 440 | depends on M532x |
| 441 | help |
| 442 | Support for the senTec COBRA5329 board. |
| 443 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | config M5407C3 |
| 445 | bool "Motorola M5407C3 board support" |
| 446 | depends on M5407 |
| 447 | help |
| 448 | Support for the Motorola M5407C3 board. |
| 449 | |
Greg Ungerer | 7badfab | 2011-03-06 23:20:19 +1000 | [diff] [blame] | 450 | config FIREBEE |
| 451 | bool "FireBee board support" |
| 452 | depends on M547x |
| 453 | help |
| 454 | Support for the FireBee ColdFire 5475 based board. |
| 455 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 456 | config CLEOPATRA |
| 457 | bool "Feith CLEOPATRA board support" |
| 458 | depends on (M5307 || M5407) |
| 459 | help |
| 460 | Support for the Feith Cleopatra boards. |
| 461 | |
| 462 | config CANCam |
| 463 | bool "Feith CANCam board support" |
| 464 | depends on M5272 |
| 465 | help |
| 466 | Support for the Feith CANCam board. |
| 467 | |
| 468 | config SCALES |
| 469 | bool "Feith SCALES board support" |
| 470 | depends on M5272 |
| 471 | help |
| 472 | Support for the Feith SCALES board. |
| 473 | |
| 474 | config NETtel |
| 475 | bool "SecureEdge/NETtel board support" |
| 476 | depends on (M5206e || M5272 || M5307) |
| 477 | help |
| 478 | Support for the SnapGear NETtel/SecureEdge/SnapGear boards. |
| 479 | |
| 480 | config SNAPGEAR |
| 481 | bool "SnapGear router board support" |
| 482 | depends on NETtel |
| 483 | help |
| 484 | Special additional support for SnapGear router boards. |
| 485 | |
| 486 | config CPU16B |
| 487 | bool "Sneha Technologies S.L. Sarasvati board support" |
| 488 | depends on M5272 |
| 489 | help |
| 490 | Support for the SNEHA CPU16B board. |
| 491 | |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 492 | config MOD5272 |
| 493 | bool "Netburner MOD-5272 board support" |
| 494 | depends on M5272 |
| 495 | help |
| 496 | Support for the Netburner MOD-5272 board. |
| 497 | |
Wilson Callan | c1057c6 | 2007-10-23 14:37:54 +1000 | [diff] [blame] | 498 | config SAVANTrosie1 |
| 499 | bool "Savant Rosie1 board support" |
| 500 | depends on M523x |
| 501 | help |
| 502 | Support for the Savant Rosie1 board. |
| 503 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | config ROMFS_FROM_ROM |
Greg Ungerer | 6869e94 | 2006-12-04 16:40:58 +1000 | [diff] [blame] | 505 | bool "ROMFS image not RAM resident" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 506 | depends on (NETtel || SNAPGEAR) |
| 507 | help |
| 508 | The ROMfs filesystem will stay resident in the FLASH/ROM, not be |
| 509 | moved into RAM. |
| 510 | |
| 511 | config PILOT |
| 512 | bool |
| 513 | default y |
| 514 | depends on (PILOT3 || PILOT5) |
| 515 | |
| 516 | config ARNEWSH |
| 517 | bool |
| 518 | default y |
| 519 | depends on (ARN5206 || ARN5307) |
| 520 | |
Greg Ungerer | 4e51f674 | 2005-11-07 14:09:50 +1000 | [diff] [blame] | 521 | config FREESCALE |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | bool |
| 523 | default y |
Greg Ungerer | 5d36f8e | 2006-06-26 10:45:45 +1000 | [diff] [blame] | 524 | depends on (M5206eC3 || M5208EVB || M5235EVB || M5249C3 || M5271EVB || M5272C3 || M5275EVB || M5282EVB || M5307C3 || M5329EVB || M5407C3) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 525 | |
| 526 | config HW_FEITH |
| 527 | bool |
| 528 | default y |
| 529 | depends on (CLEOPATRA || CANCam || SCALES) |
| 530 | |
| 531 | config senTec |
| 532 | bool |
| 533 | default y |
| 534 | depends on (COBRA5272 || COBRA5282) |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 535 | |
| 536 | config EMAC_INC |
| 537 | bool |
| 538 | default y |
| 539 | depends on (SOM5282EM) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 540 | |
| 541 | config SNEHA |
Philippe De Muyter | 0a977ca | 2010-11-11 23:57:56 +0100 | [diff] [blame] | 542 | bool |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 543 | default y |
| 544 | depends on CPU16B |
Wilson Callan | c1057c6 | 2007-10-23 14:37:54 +1000 | [diff] [blame] | 545 | |
| 546 | config SAVANT |
| 547 | bool |
| 548 | default y |
| 549 | depends on SAVANTrosie1 |
| 550 | |
Greg Ungerer | 04860bd | 2006-06-26 10:47:13 +1000 | [diff] [blame] | 551 | config AVNET |
| 552 | bool |
| 553 | default y |
| 554 | depends on (AVNET5282) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 555 | |
Lennart Sorensen | 588baea | 2009-09-18 13:49:36 -0400 | [diff] [blame] | 556 | config UBOOT |
| 557 | bool "Support for U-Boot command line parameters" |
| 558 | help |
| 559 | If you say Y here kernel will try to collect command |
| 560 | line parameters from the initial u-boot stack. |
| 561 | default n |
| 562 | |
Greg Ungerer | 5c4dbba | 2005-09-02 10:42:52 +1000 | [diff] [blame] | 563 | config 4KSTACKS |
| 564 | bool "Use 4Kb for kernel stacks instead of 8Kb" |
| 565 | default y |
| 566 | help |
| 567 | If you say Y here the kernel will use a 4Kb stacksize for the |
| 568 | kernel stack attached to each process/thread. This facilitates |
| 569 | running more threads on a system and also reduces the pressure |
| 570 | on the VM subsystem for higher order allocations. |
| 571 | |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 572 | comment "RAM configuration" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 573 | |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 574 | config RAMBASE |
| 575 | hex "Address of the base of RAM" |
| 576 | default "0" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 577 | help |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 578 | Define the address that RAM starts at. On many platforms this is |
| 579 | 0, the base of the address space. And this is the default. Some |
| 580 | platforms choose to setup their RAM at other addresses within the |
| 581 | processor address space. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 582 | |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 583 | config RAMSIZE |
Philippe De Muyter | 73a9983 | 2010-05-19 13:30:49 +0200 | [diff] [blame] | 584 | hex "Size of RAM (in bytes), or 0 for automatic" |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 585 | default "0x400000" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 586 | help |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 587 | Define the size of the system RAM. If you select 0 then the |
| 588 | kernel will try to probe the RAM size at runtime. This is not |
| 589 | supported on all CPU types. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 590 | |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 591 | config VECTORBASE |
| 592 | hex "Address of the base of system vectors" |
| 593 | default "0" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 594 | help |
Matt LaPlante | 4b3f686 | 2006-10-03 22:21:02 +0200 | [diff] [blame] | 595 | Define the address of the system vectors. Commonly this is |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 596 | put at the start of RAM, but it doesn't have to be. On ColdFire |
| 597 | platforms this address is programmed into the VBR register, thus |
| 598 | actually setting the address to use. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 599 | |
Greg Ungerer | d4852a3 | 2011-03-06 21:53:28 +1000 | [diff] [blame] | 600 | config MBAR |
| 601 | hex "Address of the MBAR (internal peripherals)" |
| 602 | default "0x10000000" |
| 603 | depends on HAVE_MBAR |
| 604 | help |
| 605 | Define the address of the internal system peripherals. This value |
| 606 | is set in the processors MBAR register. This is generally setup by |
| 607 | the boot loader, and will not be written by the kernel. By far most |
| 608 | ColdFire boards use the default 0x10000000 value, so if unsure then |
| 609 | use this. |
| 610 | |
| 611 | config IPSBAR |
| 612 | hex "Address of the IPSBAR (internal peripherals)" |
| 613 | default "0x40000000" |
| 614 | depends on HAVE_IPSBAR |
| 615 | help |
| 616 | Define the address of the internal system peripherals. This value |
| 617 | is set in the processors IPSBAR register. This is generally setup by |
| 618 | the boot loader, and will not be written by the kernel. By far most |
| 619 | ColdFire boards use the default 0x40000000 value, so if unsure then |
| 620 | use this. |
| 621 | |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 622 | config KERNELBASE |
| 623 | hex "Address of the base of kernel code" |
| 624 | default "0x400" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 625 | help |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 626 | Typically on m68k systems the kernel will not start at the base |
| 627 | of RAM, but usually some small offset from it. Define the start |
| 628 | address of the kernel here. The most common setup will have the |
| 629 | processor vectors at the base of RAM and then the start of the |
| 630 | kernel. On some platforms some RAM is reserved for boot loaders |
| 631 | and the kernel starts after that. The 0x400 default was based on |
| 632 | a system with the RAM based at address 0, and leaving enough room |
| 633 | for the theoretical maximum number of 256 vectors. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 634 | |
| 635 | choice |
| 636 | prompt "RAM bus width" |
| 637 | default RAMAUTOBIT |
| 638 | |
| 639 | config RAMAUTOBIT |
| 640 | bool "AUTO" |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 641 | help |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 642 | Select the physical RAM data bus size. Not needed on most platforms, |
| 643 | so you can generally choose AUTO. |
| 644 | |
| 645 | config RAM8BIT |
| 646 | bool "8bit" |
| 647 | help |
| 648 | Configure RAM bus to be 8 bits wide. |
| 649 | |
| 650 | config RAM16BIT |
| 651 | bool "16bit" |
| 652 | help |
| 653 | Configure RAM bus to be 16 bits wide. |
| 654 | |
| 655 | config RAM32BIT |
| 656 | bool "32bit" |
| 657 | help |
| 658 | Configure RAM bus to be 32 bits wide. |
| 659 | |
| 660 | endchoice |
| 661 | |
Greg Ungerer | c750a01 | 2006-06-28 16:39:19 +1000 | [diff] [blame] | 662 | comment "ROM configuration" |
| 663 | |
| 664 | config ROM |
| 665 | bool "Specify ROM linker regions" |
| 666 | default n |
| 667 | help |
| 668 | Define a ROM region for the linker script. This creates a kernel |
| 669 | that can be stored in flash, with possibly the text, and data |
| 670 | regions being copied out to RAM at startup. |
| 671 | |
| 672 | config ROMBASE |
| 673 | hex "Address of the base of ROM device" |
| 674 | default "0" |
| 675 | depends on ROM |
| 676 | help |
| 677 | Define the address that the ROM region starts at. Some platforms |
| 678 | use this to set their chip select region accordingly for the boot |
| 679 | device. |
| 680 | |
| 681 | config ROMVEC |
| 682 | hex "Address of the base of the ROM vectors" |
| 683 | default "0" |
| 684 | depends on ROM |
| 685 | help |
| 686 | This is almost always the same as the base of the ROM. Since on all |
Matt LaPlante | 3cb2fcc | 2006-11-30 05:22:59 +0100 | [diff] [blame] | 687 | 68000 type variants the vectors are at the base of the boot device |
Greg Ungerer | c750a01 | 2006-06-28 16:39:19 +1000 | [diff] [blame] | 688 | on system startup. |
| 689 | |
| 690 | config ROMVECSIZE |
| 691 | hex "Size of ROM vector region (in bytes)" |
| 692 | default "0x400" |
| 693 | depends on ROM |
| 694 | help |
| 695 | Define the size of the vector region in ROM. For most 68000 |
Matt LaPlante | 3cb2fcc | 2006-11-30 05:22:59 +0100 | [diff] [blame] | 696 | variants this would be 0x400 bytes in size. Set to 0 if you do |
Greg Ungerer | c750a01 | 2006-06-28 16:39:19 +1000 | [diff] [blame] | 697 | not want a vector region at the start of the ROM. |
| 698 | |
| 699 | config ROMSTART |
| 700 | hex "Address of the base of system image in ROM" |
| 701 | default "0x400" |
| 702 | depends on ROM |
| 703 | help |
| 704 | Define the start address of the system image in ROM. Commonly this |
| 705 | is strait after the ROM vectors. |
| 706 | |
| 707 | config ROMSIZE |
| 708 | hex "Size of the ROM device" |
| 709 | default "0x100000" |
| 710 | depends on ROM |
| 711 | help |
| 712 | Size of the ROM device. On some platforms this is used to setup |
| 713 | the chip select that controls the boot ROM device. |
| 714 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 715 | choice |
| 716 | prompt "Kernel executes from" |
| 717 | ---help--- |
| 718 | Choose the memory type that the kernel will be running in. |
| 719 | |
| 720 | config RAMKERNEL |
| 721 | bool "RAM" |
| 722 | help |
| 723 | The kernel will be resident in RAM when running. |
| 724 | |
| 725 | config ROMKERNEL |
| 726 | bool "ROM" |
| 727 | help |
Greg Ungerer | 63e413d | 2006-06-26 16:32:59 +1000 | [diff] [blame] | 728 | The kernel will be resident in FLASH/ROM when running. This is |
| 729 | often referred to as Execute-in-Place (XIP), since the kernel |
| 730 | code executes from the position it is stored in the FLASH/ROM. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 731 | |
| 732 | endchoice |
| 733 | |
Sebastian Siewior | 78f508a | 2008-05-12 14:02:05 -0700 | [diff] [blame] | 734 | if COLDFIRE |
| 735 | source "kernel/Kconfig.preempt" |
| 736 | endif |
Sebastian Siewior | 2b9a698 | 2008-04-28 11:43:04 +0200 | [diff] [blame] | 737 | |
| 738 | source "kernel/time/Kconfig" |
| 739 | |
Al Viro | 5cae841 | 2005-05-04 05:39:22 +0100 | [diff] [blame] | 740 | config ISA_DMA_API |
| 741 | bool |
| 742 | depends on !M5272 |
| 743 | default y |
| 744 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 745 | source "drivers/pcmcia/Kconfig" |
| 746 | |