Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * $Id$ |
| 4 | * |
| 5 | * Copyright (C) 2005 Mike Isely <isely@pobox.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | * |
| 20 | */ |
| 21 | |
| 22 | #include <linux/errno.h> |
| 23 | #include <linux/string.h> |
| 24 | #include <linux/slab.h> |
| 25 | #include <linux/firmware.h> |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 26 | #include <linux/videodev2.h> |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 27 | #include <media/v4l2-common.h> |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 28 | #include "pvrusb2.h" |
| 29 | #include "pvrusb2-std.h" |
| 30 | #include "pvrusb2-util.h" |
| 31 | #include "pvrusb2-hdw.h" |
| 32 | #include "pvrusb2-i2c-core.h" |
| 33 | #include "pvrusb2-tuner.h" |
| 34 | #include "pvrusb2-eeprom.h" |
| 35 | #include "pvrusb2-hdw-internal.h" |
| 36 | #include "pvrusb2-encoder.h" |
| 37 | #include "pvrusb2-debug.h" |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 38 | #include "pvrusb2-fx2-cmd.h" |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 39 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 40 | #define TV_MIN_FREQ 55250000L |
| 41 | #define TV_MAX_FREQ 850000000L |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 42 | |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 43 | static struct pvr2_hdw *unit_pointers[PVR_NUM] = {[ 0 ... PVR_NUM-1 ] = NULL}; |
Matthias Kaehlcke | 8df0c87 | 2007-04-28 20:00:18 -0300 | [diff] [blame] | 44 | static DEFINE_MUTEX(pvr2_unit_mtx); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 45 | |
Douglas Schilling Landgraf | ff699e6 | 2008-04-22 14:41:48 -0300 | [diff] [blame] | 46 | static int ctlchg; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 47 | static int initusbreset = 1; |
Douglas Schilling Landgraf | ff699e6 | 2008-04-22 14:41:48 -0300 | [diff] [blame] | 48 | static int procreload; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 49 | static int tuner[PVR_NUM] = { [0 ... PVR_NUM-1] = -1 }; |
| 50 | static int tolerance[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 }; |
| 51 | static int video_std[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 }; |
Douglas Schilling Landgraf | ff699e6 | 2008-04-22 14:41:48 -0300 | [diff] [blame] | 52 | static int init_pause_msec; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 53 | |
| 54 | module_param(ctlchg, int, S_IRUGO|S_IWUSR); |
| 55 | MODULE_PARM_DESC(ctlchg, "0=optimize ctl change 1=always accept new ctl value"); |
| 56 | module_param(init_pause_msec, int, S_IRUGO|S_IWUSR); |
| 57 | MODULE_PARM_DESC(init_pause_msec, "hardware initialization settling delay"); |
| 58 | module_param(initusbreset, int, S_IRUGO|S_IWUSR); |
| 59 | MODULE_PARM_DESC(initusbreset, "Do USB reset device on probe"); |
| 60 | module_param(procreload, int, S_IRUGO|S_IWUSR); |
| 61 | MODULE_PARM_DESC(procreload, |
| 62 | "Attempt init failure recovery with firmware reload"); |
| 63 | module_param_array(tuner, int, NULL, 0444); |
| 64 | MODULE_PARM_DESC(tuner,"specify installed tuner type"); |
| 65 | module_param_array(video_std, int, NULL, 0444); |
| 66 | MODULE_PARM_DESC(video_std,"specify initial video standard"); |
| 67 | module_param_array(tolerance, int, NULL, 0444); |
| 68 | MODULE_PARM_DESC(tolerance,"specify stream error tolerance"); |
| 69 | |
| 70 | #define PVR2_CTL_WRITE_ENDPOINT 0x01 |
| 71 | #define PVR2_CTL_READ_ENDPOINT 0x81 |
| 72 | |
| 73 | #define PVR2_GPIO_IN 0x9008 |
| 74 | #define PVR2_GPIO_OUT 0x900c |
| 75 | #define PVR2_GPIO_DIR 0x9020 |
| 76 | |
| 77 | #define trace_firmware(...) pvr2_trace(PVR2_TRACE_FIRMWARE,__VA_ARGS__) |
| 78 | |
| 79 | #define PVR2_FIRMWARE_ENDPOINT 0x02 |
| 80 | |
| 81 | /* size of a firmware chunk */ |
| 82 | #define FIRMWARE_CHUNK_SIZE 0x2000 |
| 83 | |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 84 | /* Define the list of additional controls we'll dynamically construct based |
| 85 | on query of the cx2341x module. */ |
| 86 | struct pvr2_mpeg_ids { |
| 87 | const char *strid; |
| 88 | int id; |
| 89 | }; |
| 90 | static const struct pvr2_mpeg_ids mpeg_ids[] = { |
| 91 | { |
| 92 | .strid = "audio_layer", |
| 93 | .id = V4L2_CID_MPEG_AUDIO_ENCODING, |
| 94 | },{ |
| 95 | .strid = "audio_bitrate", |
| 96 | .id = V4L2_CID_MPEG_AUDIO_L2_BITRATE, |
| 97 | },{ |
| 98 | /* Already using audio_mode elsewhere :-( */ |
| 99 | .strid = "mpeg_audio_mode", |
| 100 | .id = V4L2_CID_MPEG_AUDIO_MODE, |
| 101 | },{ |
| 102 | .strid = "mpeg_audio_mode_extension", |
| 103 | .id = V4L2_CID_MPEG_AUDIO_MODE_EXTENSION, |
| 104 | },{ |
| 105 | .strid = "audio_emphasis", |
| 106 | .id = V4L2_CID_MPEG_AUDIO_EMPHASIS, |
| 107 | },{ |
| 108 | .strid = "audio_crc", |
| 109 | .id = V4L2_CID_MPEG_AUDIO_CRC, |
| 110 | },{ |
| 111 | .strid = "video_aspect", |
| 112 | .id = V4L2_CID_MPEG_VIDEO_ASPECT, |
| 113 | },{ |
| 114 | .strid = "video_b_frames", |
| 115 | .id = V4L2_CID_MPEG_VIDEO_B_FRAMES, |
| 116 | },{ |
| 117 | .strid = "video_gop_size", |
| 118 | .id = V4L2_CID_MPEG_VIDEO_GOP_SIZE, |
| 119 | },{ |
| 120 | .strid = "video_gop_closure", |
| 121 | .id = V4L2_CID_MPEG_VIDEO_GOP_CLOSURE, |
| 122 | },{ |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 123 | .strid = "video_bitrate_mode", |
| 124 | .id = V4L2_CID_MPEG_VIDEO_BITRATE_MODE, |
| 125 | },{ |
| 126 | .strid = "video_bitrate", |
| 127 | .id = V4L2_CID_MPEG_VIDEO_BITRATE, |
| 128 | },{ |
| 129 | .strid = "video_bitrate_peak", |
| 130 | .id = V4L2_CID_MPEG_VIDEO_BITRATE_PEAK, |
| 131 | },{ |
| 132 | .strid = "video_temporal_decimation", |
| 133 | .id = V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION, |
| 134 | },{ |
| 135 | .strid = "stream_type", |
| 136 | .id = V4L2_CID_MPEG_STREAM_TYPE, |
| 137 | },{ |
| 138 | .strid = "video_spatial_filter_mode", |
| 139 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE, |
| 140 | },{ |
| 141 | .strid = "video_spatial_filter", |
| 142 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER, |
| 143 | },{ |
| 144 | .strid = "video_luma_spatial_filter_type", |
| 145 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE, |
| 146 | },{ |
| 147 | .strid = "video_chroma_spatial_filter_type", |
| 148 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE, |
| 149 | },{ |
| 150 | .strid = "video_temporal_filter_mode", |
| 151 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE, |
| 152 | },{ |
| 153 | .strid = "video_temporal_filter", |
| 154 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER, |
| 155 | },{ |
| 156 | .strid = "video_median_filter_type", |
| 157 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE, |
| 158 | },{ |
| 159 | .strid = "video_luma_median_filter_top", |
| 160 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP, |
| 161 | },{ |
| 162 | .strid = "video_luma_median_filter_bottom", |
| 163 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM, |
| 164 | },{ |
| 165 | .strid = "video_chroma_median_filter_top", |
| 166 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP, |
| 167 | },{ |
| 168 | .strid = "video_chroma_median_filter_bottom", |
| 169 | .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM, |
| 170 | } |
| 171 | }; |
Ahmed S. Darwish | eca8ebf | 2007-01-20 00:35:03 -0300 | [diff] [blame] | 172 | #define MPEGDEF_COUNT ARRAY_SIZE(mpeg_ids) |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 173 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 174 | |
Mike Isely | 434449f | 2006-08-08 09:10:06 -0300 | [diff] [blame] | 175 | static const char *control_values_srate[] = { |
| 176 | [V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100] = "44.1 kHz", |
| 177 | [V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000] = "48 kHz", |
| 178 | [V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000] = "32 kHz", |
| 179 | }; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 180 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 181 | |
| 182 | |
| 183 | static const char *control_values_input[] = { |
| 184 | [PVR2_CVAL_INPUT_TV] = "television", /*xawtv needs this name*/ |
Mike Isely | 29bf5b1 | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 185 | [PVR2_CVAL_INPUT_DTV] = "dtv", |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 186 | [PVR2_CVAL_INPUT_RADIO] = "radio", |
| 187 | [PVR2_CVAL_INPUT_SVIDEO] = "s-video", |
| 188 | [PVR2_CVAL_INPUT_COMPOSITE] = "composite", |
| 189 | }; |
| 190 | |
| 191 | |
| 192 | static const char *control_values_audiomode[] = { |
| 193 | [V4L2_TUNER_MODE_MONO] = "Mono", |
| 194 | [V4L2_TUNER_MODE_STEREO] = "Stereo", |
| 195 | [V4L2_TUNER_MODE_LANG1] = "Lang1", |
| 196 | [V4L2_TUNER_MODE_LANG2] = "Lang2", |
| 197 | [V4L2_TUNER_MODE_LANG1_LANG2] = "Lang1+Lang2", |
| 198 | }; |
| 199 | |
| 200 | |
| 201 | static const char *control_values_hsm[] = { |
| 202 | [PVR2_CVAL_HSM_FAIL] = "Fail", |
| 203 | [PVR2_CVAL_HSM_HIGH] = "High", |
| 204 | [PVR2_CVAL_HSM_FULL] = "Full", |
| 205 | }; |
| 206 | |
| 207 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 208 | static const char *pvr2_state_names[] = { |
| 209 | [PVR2_STATE_NONE] = "none", |
| 210 | [PVR2_STATE_DEAD] = "dead", |
| 211 | [PVR2_STATE_COLD] = "cold", |
| 212 | [PVR2_STATE_WARM] = "warm", |
| 213 | [PVR2_STATE_ERROR] = "error", |
| 214 | [PVR2_STATE_READY] = "ready", |
| 215 | [PVR2_STATE_RUN] = "run", |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 216 | }; |
| 217 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 218 | |
| 219 | static void pvr2_hdw_state_sched(struct pvr2_hdw *); |
| 220 | static int pvr2_hdw_state_eval(struct pvr2_hdw *); |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 221 | static void pvr2_hdw_set_cur_freq(struct pvr2_hdw *,unsigned long); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 222 | static void pvr2_hdw_worker_i2c(struct work_struct *work); |
| 223 | static void pvr2_hdw_worker_poll(struct work_struct *work); |
| 224 | static void pvr2_hdw_worker_init(struct work_struct *work); |
| 225 | static int pvr2_hdw_wait(struct pvr2_hdw *,int state); |
| 226 | static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw *); |
| 227 | static void pvr2_hdw_state_log_state(struct pvr2_hdw *); |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 228 | static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 229 | static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw); |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 230 | static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw); |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 231 | static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw); |
| 232 | static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 233 | static void pvr2_hdw_quiescent_timeout(unsigned long); |
| 234 | static void pvr2_hdw_encoder_wait_timeout(unsigned long); |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 235 | static int pvr2_send_request_ex(struct pvr2_hdw *hdw, |
| 236 | unsigned int timeout,int probe_fl, |
| 237 | void *write_data,unsigned int write_len, |
| 238 | void *read_data,unsigned int read_len); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 239 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 240 | |
| 241 | static void trace_stbit(const char *name,int val) |
| 242 | { |
| 243 | pvr2_trace(PVR2_TRACE_STBITS, |
| 244 | "State bit %s <-- %s", |
| 245 | name,(val ? "true" : "false")); |
| 246 | } |
| 247 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 248 | static int ctrl_channelfreq_get(struct pvr2_ctrl *cptr,int *vp) |
| 249 | { |
| 250 | struct pvr2_hdw *hdw = cptr->hdw; |
| 251 | if ((hdw->freqProgSlot > 0) && (hdw->freqProgSlot <= FREQTABLE_SIZE)) { |
| 252 | *vp = hdw->freqTable[hdw->freqProgSlot-1]; |
| 253 | } else { |
| 254 | *vp = 0; |
| 255 | } |
| 256 | return 0; |
| 257 | } |
| 258 | |
| 259 | static int ctrl_channelfreq_set(struct pvr2_ctrl *cptr,int m,int v) |
| 260 | { |
| 261 | struct pvr2_hdw *hdw = cptr->hdw; |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 262 | unsigned int slotId = hdw->freqProgSlot; |
| 263 | if ((slotId > 0) && (slotId <= FREQTABLE_SIZE)) { |
| 264 | hdw->freqTable[slotId-1] = v; |
| 265 | /* Handle side effects correctly - if we're tuned to this |
| 266 | slot, then forgot the slot id relation since the stored |
| 267 | frequency has been changed. */ |
| 268 | if (hdw->freqSelector) { |
| 269 | if (hdw->freqSlotRadio == slotId) { |
| 270 | hdw->freqSlotRadio = 0; |
| 271 | } |
| 272 | } else { |
| 273 | if (hdw->freqSlotTelevision == slotId) { |
| 274 | hdw->freqSlotTelevision = 0; |
| 275 | } |
| 276 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 277 | } |
| 278 | return 0; |
| 279 | } |
| 280 | |
| 281 | static int ctrl_channelprog_get(struct pvr2_ctrl *cptr,int *vp) |
| 282 | { |
| 283 | *vp = cptr->hdw->freqProgSlot; |
| 284 | return 0; |
| 285 | } |
| 286 | |
| 287 | static int ctrl_channelprog_set(struct pvr2_ctrl *cptr,int m,int v) |
| 288 | { |
| 289 | struct pvr2_hdw *hdw = cptr->hdw; |
| 290 | if ((v >= 0) && (v <= FREQTABLE_SIZE)) { |
| 291 | hdw->freqProgSlot = v; |
| 292 | } |
| 293 | return 0; |
| 294 | } |
| 295 | |
| 296 | static int ctrl_channel_get(struct pvr2_ctrl *cptr,int *vp) |
| 297 | { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 298 | struct pvr2_hdw *hdw = cptr->hdw; |
| 299 | *vp = hdw->freqSelector ? hdw->freqSlotRadio : hdw->freqSlotTelevision; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 300 | return 0; |
| 301 | } |
| 302 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 303 | static int ctrl_channel_set(struct pvr2_ctrl *cptr,int m,int slotId) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 304 | { |
| 305 | unsigned freq = 0; |
| 306 | struct pvr2_hdw *hdw = cptr->hdw; |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 307 | if ((slotId < 0) || (slotId > FREQTABLE_SIZE)) return 0; |
| 308 | if (slotId > 0) { |
| 309 | freq = hdw->freqTable[slotId-1]; |
| 310 | if (!freq) return 0; |
| 311 | pvr2_hdw_set_cur_freq(hdw,freq); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 312 | } |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 313 | if (hdw->freqSelector) { |
| 314 | hdw->freqSlotRadio = slotId; |
| 315 | } else { |
| 316 | hdw->freqSlotTelevision = slotId; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 317 | } |
| 318 | return 0; |
| 319 | } |
| 320 | |
| 321 | static int ctrl_freq_get(struct pvr2_ctrl *cptr,int *vp) |
| 322 | { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 323 | *vp = pvr2_hdw_get_cur_freq(cptr->hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 324 | return 0; |
| 325 | } |
| 326 | |
| 327 | static int ctrl_freq_is_dirty(struct pvr2_ctrl *cptr) |
| 328 | { |
| 329 | return cptr->hdw->freqDirty != 0; |
| 330 | } |
| 331 | |
| 332 | static void ctrl_freq_clear_dirty(struct pvr2_ctrl *cptr) |
| 333 | { |
| 334 | cptr->hdw->freqDirty = 0; |
| 335 | } |
| 336 | |
| 337 | static int ctrl_freq_set(struct pvr2_ctrl *cptr,int m,int v) |
| 338 | { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 339 | pvr2_hdw_set_cur_freq(cptr->hdw,v); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 340 | return 0; |
| 341 | } |
| 342 | |
Mike Isely | 3ad9fc3 | 2006-09-02 22:37:52 -0300 | [diff] [blame] | 343 | static int ctrl_vres_max_get(struct pvr2_ctrl *cptr,int *vp) |
| 344 | { |
| 345 | /* Actual maximum depends on the video standard in effect. */ |
| 346 | if (cptr->hdw->std_mask_cur & V4L2_STD_525_60) { |
| 347 | *vp = 480; |
| 348 | } else { |
| 349 | *vp = 576; |
| 350 | } |
| 351 | return 0; |
| 352 | } |
| 353 | |
| 354 | static int ctrl_vres_min_get(struct pvr2_ctrl *cptr,int *vp) |
| 355 | { |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 356 | /* Actual minimum depends on device digitizer type. */ |
| 357 | if (cptr->hdw->hdw_desc->flag_has_cx25840) { |
Mike Isely | 3ad9fc3 | 2006-09-02 22:37:52 -0300 | [diff] [blame] | 358 | *vp = 75; |
| 359 | } else { |
| 360 | *vp = 17; |
| 361 | } |
| 362 | return 0; |
| 363 | } |
| 364 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 365 | static int ctrl_get_input(struct pvr2_ctrl *cptr,int *vp) |
| 366 | { |
| 367 | *vp = cptr->hdw->input_val; |
| 368 | return 0; |
| 369 | } |
| 370 | |
Mike Isely | 29bf5b1 | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 371 | static int ctrl_check_input(struct pvr2_ctrl *cptr,int v) |
| 372 | { |
Mike Isely | 7fb20fa | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 373 | return ((1 << v) & cptr->hdw->input_avail_mask) != 0; |
Mike Isely | 29bf5b1 | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 374 | } |
| 375 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 376 | static int ctrl_set_input(struct pvr2_ctrl *cptr,int m,int v) |
| 377 | { |
| 378 | struct pvr2_hdw *hdw = cptr->hdw; |
| 379 | |
| 380 | if (hdw->input_val != v) { |
| 381 | hdw->input_val = v; |
| 382 | hdw->input_dirty = !0; |
| 383 | } |
| 384 | |
| 385 | /* Handle side effects - if we switch to a mode that needs the RF |
| 386 | tuner, then select the right frequency choice as well and mark |
| 387 | it dirty. */ |
| 388 | if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { |
| 389 | hdw->freqSelector = 0; |
| 390 | hdw->freqDirty = !0; |
Mike Isely | 29bf5b1 | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 391 | } else if ((hdw->input_val == PVR2_CVAL_INPUT_TV) || |
| 392 | (hdw->input_val == PVR2_CVAL_INPUT_DTV)) { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 393 | hdw->freqSelector = 1; |
| 394 | hdw->freqDirty = !0; |
| 395 | } |
| 396 | return 0; |
| 397 | } |
| 398 | |
| 399 | static int ctrl_isdirty_input(struct pvr2_ctrl *cptr) |
| 400 | { |
| 401 | return cptr->hdw->input_dirty != 0; |
| 402 | } |
| 403 | |
| 404 | static void ctrl_cleardirty_input(struct pvr2_ctrl *cptr) |
| 405 | { |
| 406 | cptr->hdw->input_dirty = 0; |
| 407 | } |
| 408 | |
Mike Isely | 5549f54 | 2006-12-27 23:28:54 -0300 | [diff] [blame] | 409 | |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 410 | static int ctrl_freq_max_get(struct pvr2_ctrl *cptr, int *vp) |
| 411 | { |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 412 | unsigned long fv; |
| 413 | struct pvr2_hdw *hdw = cptr->hdw; |
| 414 | if (hdw->tuner_signal_stale) { |
| 415 | pvr2_i2c_core_status_poll(hdw); |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 416 | } |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 417 | fv = hdw->tuner_signal_info.rangehigh; |
| 418 | if (!fv) { |
| 419 | /* Safety fallback */ |
| 420 | *vp = TV_MAX_FREQ; |
| 421 | return 0; |
| 422 | } |
| 423 | if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) { |
| 424 | fv = (fv * 125) / 2; |
| 425 | } else { |
| 426 | fv = fv * 62500; |
| 427 | } |
| 428 | *vp = fv; |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 429 | return 0; |
| 430 | } |
| 431 | |
| 432 | static int ctrl_freq_min_get(struct pvr2_ctrl *cptr, int *vp) |
| 433 | { |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 434 | unsigned long fv; |
| 435 | struct pvr2_hdw *hdw = cptr->hdw; |
| 436 | if (hdw->tuner_signal_stale) { |
| 437 | pvr2_i2c_core_status_poll(hdw); |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 438 | } |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 439 | fv = hdw->tuner_signal_info.rangelow; |
| 440 | if (!fv) { |
| 441 | /* Safety fallback */ |
| 442 | *vp = TV_MIN_FREQ; |
| 443 | return 0; |
| 444 | } |
| 445 | if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) { |
| 446 | fv = (fv * 125) / 2; |
| 447 | } else { |
| 448 | fv = fv * 62500; |
| 449 | } |
| 450 | *vp = fv; |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 451 | return 0; |
| 452 | } |
| 453 | |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 454 | static int ctrl_cx2341x_is_dirty(struct pvr2_ctrl *cptr) |
| 455 | { |
| 456 | return cptr->hdw->enc_stale != 0; |
| 457 | } |
| 458 | |
| 459 | static void ctrl_cx2341x_clear_dirty(struct pvr2_ctrl *cptr) |
| 460 | { |
| 461 | cptr->hdw->enc_stale = 0; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 462 | cptr->hdw->enc_unsafe_stale = 0; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 463 | } |
| 464 | |
| 465 | static int ctrl_cx2341x_get(struct pvr2_ctrl *cptr,int *vp) |
| 466 | { |
| 467 | int ret; |
| 468 | struct v4l2_ext_controls cs; |
| 469 | struct v4l2_ext_control c1; |
| 470 | memset(&cs,0,sizeof(cs)); |
| 471 | memset(&c1,0,sizeof(c1)); |
| 472 | cs.controls = &c1; |
| 473 | cs.count = 1; |
| 474 | c1.id = cptr->info->v4l_id; |
Hans Verkuil | 01f1e44 | 2007-08-21 18:32:42 -0300 | [diff] [blame] | 475 | ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state, 0, &cs, |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 476 | VIDIOC_G_EXT_CTRLS); |
| 477 | if (ret) return ret; |
| 478 | *vp = c1.value; |
| 479 | return 0; |
| 480 | } |
| 481 | |
| 482 | static int ctrl_cx2341x_set(struct pvr2_ctrl *cptr,int m,int v) |
| 483 | { |
| 484 | int ret; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 485 | struct pvr2_hdw *hdw = cptr->hdw; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 486 | struct v4l2_ext_controls cs; |
| 487 | struct v4l2_ext_control c1; |
| 488 | memset(&cs,0,sizeof(cs)); |
| 489 | memset(&c1,0,sizeof(c1)); |
| 490 | cs.controls = &c1; |
| 491 | cs.count = 1; |
| 492 | c1.id = cptr->info->v4l_id; |
| 493 | c1.value = v; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 494 | ret = cx2341x_ext_ctrls(&hdw->enc_ctl_state, |
| 495 | hdw->state_encoder_run, &cs, |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 496 | VIDIOC_S_EXT_CTRLS); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 497 | if (ret == -EBUSY) { |
| 498 | /* Oops. cx2341x is telling us it's not safe to change |
| 499 | this control while we're capturing. Make a note of this |
| 500 | fact so that the pipeline will be stopped the next time |
| 501 | controls are committed. Then go on ahead and store this |
| 502 | change anyway. */ |
| 503 | ret = cx2341x_ext_ctrls(&hdw->enc_ctl_state, |
| 504 | 0, &cs, |
| 505 | VIDIOC_S_EXT_CTRLS); |
| 506 | if (!ret) hdw->enc_unsafe_stale = !0; |
| 507 | } |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 508 | if (ret) return ret; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 509 | hdw->enc_stale = !0; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 510 | return 0; |
| 511 | } |
| 512 | |
| 513 | static unsigned int ctrl_cx2341x_getv4lflags(struct pvr2_ctrl *cptr) |
| 514 | { |
| 515 | struct v4l2_queryctrl qctrl; |
| 516 | struct pvr2_ctl_info *info; |
| 517 | qctrl.id = cptr->info->v4l_id; |
| 518 | cx2341x_ctrl_query(&cptr->hdw->enc_ctl_state,&qctrl); |
| 519 | /* Strip out the const so we can adjust a function pointer. It's |
| 520 | OK to do this here because we know this is a dynamically created |
| 521 | control, so the underlying storage for the info pointer is (a) |
| 522 | private to us, and (b) not in read-only storage. Either we do |
| 523 | this or we significantly complicate the underlying control |
| 524 | implementation. */ |
| 525 | info = (struct pvr2_ctl_info *)(cptr->info); |
| 526 | if (qctrl.flags & V4L2_CTRL_FLAG_READ_ONLY) { |
| 527 | if (info->set_value) { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 528 | info->set_value = NULL; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 529 | } |
| 530 | } else { |
| 531 | if (!(info->set_value)) { |
| 532 | info->set_value = ctrl_cx2341x_set; |
| 533 | } |
| 534 | } |
| 535 | return qctrl.flags; |
| 536 | } |
| 537 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 538 | static int ctrl_streamingenabled_get(struct pvr2_ctrl *cptr,int *vp) |
| 539 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 540 | *vp = cptr->hdw->state_pipeline_req; |
| 541 | return 0; |
| 542 | } |
| 543 | |
| 544 | static int ctrl_masterstate_get(struct pvr2_ctrl *cptr,int *vp) |
| 545 | { |
| 546 | *vp = cptr->hdw->master_state; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 547 | return 0; |
| 548 | } |
| 549 | |
| 550 | static int ctrl_hsm_get(struct pvr2_ctrl *cptr,int *vp) |
| 551 | { |
| 552 | int result = pvr2_hdw_is_hsm(cptr->hdw); |
| 553 | *vp = PVR2_CVAL_HSM_FULL; |
| 554 | if (result < 0) *vp = PVR2_CVAL_HSM_FAIL; |
| 555 | if (result) *vp = PVR2_CVAL_HSM_HIGH; |
| 556 | return 0; |
| 557 | } |
| 558 | |
| 559 | static int ctrl_stdavail_get(struct pvr2_ctrl *cptr,int *vp) |
| 560 | { |
| 561 | *vp = cptr->hdw->std_mask_avail; |
| 562 | return 0; |
| 563 | } |
| 564 | |
| 565 | static int ctrl_stdavail_set(struct pvr2_ctrl *cptr,int m,int v) |
| 566 | { |
| 567 | struct pvr2_hdw *hdw = cptr->hdw; |
| 568 | v4l2_std_id ns; |
| 569 | ns = hdw->std_mask_avail; |
| 570 | ns = (ns & ~m) | (v & m); |
| 571 | if (ns == hdw->std_mask_avail) return 0; |
| 572 | hdw->std_mask_avail = ns; |
| 573 | pvr2_hdw_internal_set_std_avail(hdw); |
| 574 | pvr2_hdw_internal_find_stdenum(hdw); |
| 575 | return 0; |
| 576 | } |
| 577 | |
| 578 | static int ctrl_std_val_to_sym(struct pvr2_ctrl *cptr,int msk,int val, |
| 579 | char *bufPtr,unsigned int bufSize, |
| 580 | unsigned int *len) |
| 581 | { |
| 582 | *len = pvr2_std_id_to_str(bufPtr,bufSize,msk & val); |
| 583 | return 0; |
| 584 | } |
| 585 | |
| 586 | static int ctrl_std_sym_to_val(struct pvr2_ctrl *cptr, |
| 587 | const char *bufPtr,unsigned int bufSize, |
| 588 | int *mskp,int *valp) |
| 589 | { |
| 590 | int ret; |
| 591 | v4l2_std_id id; |
| 592 | ret = pvr2_std_str_to_id(&id,bufPtr,bufSize); |
| 593 | if (ret < 0) return ret; |
| 594 | if (mskp) *mskp = id; |
| 595 | if (valp) *valp = id; |
| 596 | return 0; |
| 597 | } |
| 598 | |
| 599 | static int ctrl_stdcur_get(struct pvr2_ctrl *cptr,int *vp) |
| 600 | { |
| 601 | *vp = cptr->hdw->std_mask_cur; |
| 602 | return 0; |
| 603 | } |
| 604 | |
| 605 | static int ctrl_stdcur_set(struct pvr2_ctrl *cptr,int m,int v) |
| 606 | { |
| 607 | struct pvr2_hdw *hdw = cptr->hdw; |
| 608 | v4l2_std_id ns; |
| 609 | ns = hdw->std_mask_cur; |
| 610 | ns = (ns & ~m) | (v & m); |
| 611 | if (ns == hdw->std_mask_cur) return 0; |
| 612 | hdw->std_mask_cur = ns; |
| 613 | hdw->std_dirty = !0; |
| 614 | pvr2_hdw_internal_find_stdenum(hdw); |
| 615 | return 0; |
| 616 | } |
| 617 | |
| 618 | static int ctrl_stdcur_is_dirty(struct pvr2_ctrl *cptr) |
| 619 | { |
| 620 | return cptr->hdw->std_dirty != 0; |
| 621 | } |
| 622 | |
| 623 | static void ctrl_stdcur_clear_dirty(struct pvr2_ctrl *cptr) |
| 624 | { |
| 625 | cptr->hdw->std_dirty = 0; |
| 626 | } |
| 627 | |
| 628 | static int ctrl_signal_get(struct pvr2_ctrl *cptr,int *vp) |
| 629 | { |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 630 | struct pvr2_hdw *hdw = cptr->hdw; |
| 631 | pvr2_i2c_core_status_poll(hdw); |
| 632 | *vp = hdw->tuner_signal_info.signal; |
| 633 | return 0; |
| 634 | } |
| 635 | |
| 636 | static int ctrl_audio_modes_present_get(struct pvr2_ctrl *cptr,int *vp) |
| 637 | { |
| 638 | int val = 0; |
| 639 | unsigned int subchan; |
| 640 | struct pvr2_hdw *hdw = cptr->hdw; |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 641 | pvr2_i2c_core_status_poll(hdw); |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 642 | subchan = hdw->tuner_signal_info.rxsubchans; |
| 643 | if (subchan & V4L2_TUNER_SUB_MONO) { |
| 644 | val |= (1 << V4L2_TUNER_MODE_MONO); |
| 645 | } |
| 646 | if (subchan & V4L2_TUNER_SUB_STEREO) { |
| 647 | val |= (1 << V4L2_TUNER_MODE_STEREO); |
| 648 | } |
| 649 | if (subchan & V4L2_TUNER_SUB_LANG1) { |
| 650 | val |= (1 << V4L2_TUNER_MODE_LANG1); |
| 651 | } |
| 652 | if (subchan & V4L2_TUNER_SUB_LANG2) { |
| 653 | val |= (1 << V4L2_TUNER_MODE_LANG2); |
| 654 | } |
| 655 | *vp = val; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 656 | return 0; |
| 657 | } |
| 658 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 659 | |
| 660 | static int ctrl_stdenumcur_set(struct pvr2_ctrl *cptr,int m,int v) |
| 661 | { |
| 662 | struct pvr2_hdw *hdw = cptr->hdw; |
| 663 | if (v < 0) return -EINVAL; |
| 664 | if (v > hdw->std_enum_cnt) return -EINVAL; |
| 665 | hdw->std_enum_cur = v; |
| 666 | if (!v) return 0; |
| 667 | v--; |
| 668 | if (hdw->std_mask_cur == hdw->std_defs[v].id) return 0; |
| 669 | hdw->std_mask_cur = hdw->std_defs[v].id; |
| 670 | hdw->std_dirty = !0; |
| 671 | return 0; |
| 672 | } |
| 673 | |
| 674 | |
| 675 | static int ctrl_stdenumcur_get(struct pvr2_ctrl *cptr,int *vp) |
| 676 | { |
| 677 | *vp = cptr->hdw->std_enum_cur; |
| 678 | return 0; |
| 679 | } |
| 680 | |
| 681 | |
| 682 | static int ctrl_stdenumcur_is_dirty(struct pvr2_ctrl *cptr) |
| 683 | { |
| 684 | return cptr->hdw->std_dirty != 0; |
| 685 | } |
| 686 | |
| 687 | |
| 688 | static void ctrl_stdenumcur_clear_dirty(struct pvr2_ctrl *cptr) |
| 689 | { |
| 690 | cptr->hdw->std_dirty = 0; |
| 691 | } |
| 692 | |
| 693 | |
| 694 | #define DEFINT(vmin,vmax) \ |
| 695 | .type = pvr2_ctl_int, \ |
| 696 | .def.type_int.min_value = vmin, \ |
| 697 | .def.type_int.max_value = vmax |
| 698 | |
| 699 | #define DEFENUM(tab) \ |
| 700 | .type = pvr2_ctl_enum, \ |
Mike Isely | 27c7b71 | 2007-01-20 00:39:17 -0300 | [diff] [blame] | 701 | .def.type_enum.count = ARRAY_SIZE(tab), \ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 702 | .def.type_enum.value_names = tab |
| 703 | |
Mike Isely | 3321396 | 2006-06-25 20:04:40 -0300 | [diff] [blame] | 704 | #define DEFBOOL \ |
| 705 | .type = pvr2_ctl_bool |
| 706 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 707 | #define DEFMASK(msk,tab) \ |
| 708 | .type = pvr2_ctl_bitmask, \ |
| 709 | .def.type_bitmask.valid_bits = msk, \ |
| 710 | .def.type_bitmask.bit_names = tab |
| 711 | |
| 712 | #define DEFREF(vname) \ |
| 713 | .set_value = ctrl_set_##vname, \ |
| 714 | .get_value = ctrl_get_##vname, \ |
| 715 | .is_dirty = ctrl_isdirty_##vname, \ |
| 716 | .clear_dirty = ctrl_cleardirty_##vname |
| 717 | |
| 718 | |
| 719 | #define VCREATE_FUNCS(vname) \ |
| 720 | static int ctrl_get_##vname(struct pvr2_ctrl *cptr,int *vp) \ |
| 721 | {*vp = cptr->hdw->vname##_val; return 0;} \ |
| 722 | static int ctrl_set_##vname(struct pvr2_ctrl *cptr,int m,int v) \ |
| 723 | {cptr->hdw->vname##_val = v; cptr->hdw->vname##_dirty = !0; return 0;} \ |
| 724 | static int ctrl_isdirty_##vname(struct pvr2_ctrl *cptr) \ |
| 725 | {return cptr->hdw->vname##_dirty != 0;} \ |
| 726 | static void ctrl_cleardirty_##vname(struct pvr2_ctrl *cptr) \ |
| 727 | {cptr->hdw->vname##_dirty = 0;} |
| 728 | |
| 729 | VCREATE_FUNCS(brightness) |
| 730 | VCREATE_FUNCS(contrast) |
| 731 | VCREATE_FUNCS(saturation) |
| 732 | VCREATE_FUNCS(hue) |
| 733 | VCREATE_FUNCS(volume) |
| 734 | VCREATE_FUNCS(balance) |
| 735 | VCREATE_FUNCS(bass) |
| 736 | VCREATE_FUNCS(treble) |
| 737 | VCREATE_FUNCS(mute) |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 738 | VCREATE_FUNCS(audiomode) |
| 739 | VCREATE_FUNCS(res_hor) |
| 740 | VCREATE_FUNCS(res_ver) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 741 | VCREATE_FUNCS(srate) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 742 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 743 | /* Table definition of all controls which can be manipulated */ |
| 744 | static const struct pvr2_ctl_info control_defs[] = { |
| 745 | { |
| 746 | .v4l_id = V4L2_CID_BRIGHTNESS, |
| 747 | .desc = "Brightness", |
| 748 | .name = "brightness", |
| 749 | .default_value = 128, |
| 750 | DEFREF(brightness), |
| 751 | DEFINT(0,255), |
| 752 | },{ |
| 753 | .v4l_id = V4L2_CID_CONTRAST, |
| 754 | .desc = "Contrast", |
| 755 | .name = "contrast", |
| 756 | .default_value = 68, |
| 757 | DEFREF(contrast), |
| 758 | DEFINT(0,127), |
| 759 | },{ |
| 760 | .v4l_id = V4L2_CID_SATURATION, |
| 761 | .desc = "Saturation", |
| 762 | .name = "saturation", |
| 763 | .default_value = 64, |
| 764 | DEFREF(saturation), |
| 765 | DEFINT(0,127), |
| 766 | },{ |
| 767 | .v4l_id = V4L2_CID_HUE, |
| 768 | .desc = "Hue", |
| 769 | .name = "hue", |
| 770 | .default_value = 0, |
| 771 | DEFREF(hue), |
| 772 | DEFINT(-128,127), |
| 773 | },{ |
| 774 | .v4l_id = V4L2_CID_AUDIO_VOLUME, |
| 775 | .desc = "Volume", |
| 776 | .name = "volume", |
Mike Isely | 139eecf | 2006-12-27 23:36:33 -0300 | [diff] [blame] | 777 | .default_value = 62000, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 778 | DEFREF(volume), |
| 779 | DEFINT(0,65535), |
| 780 | },{ |
| 781 | .v4l_id = V4L2_CID_AUDIO_BALANCE, |
| 782 | .desc = "Balance", |
| 783 | .name = "balance", |
| 784 | .default_value = 0, |
| 785 | DEFREF(balance), |
| 786 | DEFINT(-32768,32767), |
| 787 | },{ |
| 788 | .v4l_id = V4L2_CID_AUDIO_BASS, |
| 789 | .desc = "Bass", |
| 790 | .name = "bass", |
| 791 | .default_value = 0, |
| 792 | DEFREF(bass), |
| 793 | DEFINT(-32768,32767), |
| 794 | },{ |
| 795 | .v4l_id = V4L2_CID_AUDIO_TREBLE, |
| 796 | .desc = "Treble", |
| 797 | .name = "treble", |
| 798 | .default_value = 0, |
| 799 | DEFREF(treble), |
| 800 | DEFINT(-32768,32767), |
| 801 | },{ |
| 802 | .v4l_id = V4L2_CID_AUDIO_MUTE, |
| 803 | .desc = "Mute", |
| 804 | .name = "mute", |
| 805 | .default_value = 0, |
| 806 | DEFREF(mute), |
Mike Isely | 3321396 | 2006-06-25 20:04:40 -0300 | [diff] [blame] | 807 | DEFBOOL, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 808 | },{ |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 809 | .desc = "Video Source", |
| 810 | .name = "input", |
| 811 | .internal_id = PVR2_CID_INPUT, |
| 812 | .default_value = PVR2_CVAL_INPUT_TV, |
Mike Isely | 29bf5b1 | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 813 | .check_value = ctrl_check_input, |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 814 | DEFREF(input), |
| 815 | DEFENUM(control_values_input), |
| 816 | },{ |
| 817 | .desc = "Audio Mode", |
| 818 | .name = "audio_mode", |
| 819 | .internal_id = PVR2_CID_AUDIOMODE, |
| 820 | .default_value = V4L2_TUNER_MODE_STEREO, |
| 821 | DEFREF(audiomode), |
| 822 | DEFENUM(control_values_audiomode), |
| 823 | },{ |
| 824 | .desc = "Horizontal capture resolution", |
| 825 | .name = "resolution_hor", |
| 826 | .internal_id = PVR2_CID_HRES, |
| 827 | .default_value = 720, |
| 828 | DEFREF(res_hor), |
Mike Isely | 3ad9fc3 | 2006-09-02 22:37:52 -0300 | [diff] [blame] | 829 | DEFINT(19,720), |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 830 | },{ |
| 831 | .desc = "Vertical capture resolution", |
| 832 | .name = "resolution_ver", |
| 833 | .internal_id = PVR2_CID_VRES, |
| 834 | .default_value = 480, |
| 835 | DEFREF(res_ver), |
Mike Isely | 3ad9fc3 | 2006-09-02 22:37:52 -0300 | [diff] [blame] | 836 | DEFINT(17,576), |
| 837 | /* Hook in check for video standard and adjust maximum |
| 838 | depending on the standard. */ |
| 839 | .get_max_value = ctrl_vres_max_get, |
| 840 | .get_min_value = ctrl_vres_min_get, |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 841 | },{ |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 842 | .v4l_id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ, |
Mike Isely | 434449f | 2006-08-08 09:10:06 -0300 | [diff] [blame] | 843 | .default_value = V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000, |
| 844 | .desc = "Audio Sampling Frequency", |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 845 | .name = "srate", |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 846 | DEFREF(srate), |
| 847 | DEFENUM(control_values_srate), |
| 848 | },{ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 849 | .desc = "Tuner Frequency (Hz)", |
| 850 | .name = "frequency", |
| 851 | .internal_id = PVR2_CID_FREQUENCY, |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 852 | .default_value = 0, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 853 | .set_value = ctrl_freq_set, |
| 854 | .get_value = ctrl_freq_get, |
| 855 | .is_dirty = ctrl_freq_is_dirty, |
| 856 | .clear_dirty = ctrl_freq_clear_dirty, |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 857 | DEFINT(0,0), |
Pantelis Koukousoulas | 25d8527 | 2006-12-27 23:06:04 -0300 | [diff] [blame] | 858 | /* Hook in check for input value (tv/radio) and adjust |
| 859 | max/min values accordingly */ |
| 860 | .get_max_value = ctrl_freq_max_get, |
| 861 | .get_min_value = ctrl_freq_min_get, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 862 | },{ |
| 863 | .desc = "Channel", |
| 864 | .name = "channel", |
| 865 | .set_value = ctrl_channel_set, |
| 866 | .get_value = ctrl_channel_get, |
| 867 | DEFINT(0,FREQTABLE_SIZE), |
| 868 | },{ |
| 869 | .desc = "Channel Program Frequency", |
| 870 | .name = "freq_table_value", |
| 871 | .set_value = ctrl_channelfreq_set, |
| 872 | .get_value = ctrl_channelfreq_get, |
Mike Isely | 644afdb | 2007-01-20 00:19:23 -0300 | [diff] [blame] | 873 | DEFINT(0,0), |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 874 | /* Hook in check for input value (tv/radio) and adjust |
| 875 | max/min values accordingly */ |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 876 | .get_max_value = ctrl_freq_max_get, |
| 877 | .get_min_value = ctrl_freq_min_get, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 878 | },{ |
| 879 | .desc = "Channel Program ID", |
| 880 | .name = "freq_table_channel", |
| 881 | .set_value = ctrl_channelprog_set, |
| 882 | .get_value = ctrl_channelprog_get, |
| 883 | DEFINT(0,FREQTABLE_SIZE), |
| 884 | },{ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 885 | .desc = "Streaming Enabled", |
| 886 | .name = "streaming_enabled", |
| 887 | .get_value = ctrl_streamingenabled_get, |
Mike Isely | 3321396 | 2006-06-25 20:04:40 -0300 | [diff] [blame] | 888 | DEFBOOL, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 889 | },{ |
| 890 | .desc = "USB Speed", |
| 891 | .name = "usb_speed", |
| 892 | .get_value = ctrl_hsm_get, |
| 893 | DEFENUM(control_values_hsm), |
| 894 | },{ |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 895 | .desc = "Master State", |
| 896 | .name = "master_state", |
| 897 | .get_value = ctrl_masterstate_get, |
| 898 | DEFENUM(pvr2_state_names), |
| 899 | },{ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 900 | .desc = "Signal Present", |
| 901 | .name = "signal_present", |
| 902 | .get_value = ctrl_signal_get, |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 903 | DEFINT(0,65535), |
| 904 | },{ |
| 905 | .desc = "Audio Modes Present", |
| 906 | .name = "audio_modes_present", |
| 907 | .get_value = ctrl_audio_modes_present_get, |
| 908 | /* For this type we "borrow" the V4L2_TUNER_MODE enum from |
| 909 | v4l. Nothing outside of this module cares about this, |
| 910 | but I reuse it in order to also reuse the |
| 911 | control_values_audiomode string table. */ |
| 912 | DEFMASK(((1 << V4L2_TUNER_MODE_MONO)| |
| 913 | (1 << V4L2_TUNER_MODE_STEREO)| |
| 914 | (1 << V4L2_TUNER_MODE_LANG1)| |
| 915 | (1 << V4L2_TUNER_MODE_LANG2)), |
| 916 | control_values_audiomode), |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 917 | },{ |
| 918 | .desc = "Video Standards Available Mask", |
| 919 | .name = "video_standard_mask_available", |
| 920 | .internal_id = PVR2_CID_STDAVAIL, |
| 921 | .skip_init = !0, |
| 922 | .get_value = ctrl_stdavail_get, |
| 923 | .set_value = ctrl_stdavail_set, |
| 924 | .val_to_sym = ctrl_std_val_to_sym, |
| 925 | .sym_to_val = ctrl_std_sym_to_val, |
| 926 | .type = pvr2_ctl_bitmask, |
| 927 | },{ |
| 928 | .desc = "Video Standards In Use Mask", |
| 929 | .name = "video_standard_mask_active", |
| 930 | .internal_id = PVR2_CID_STDCUR, |
| 931 | .skip_init = !0, |
| 932 | .get_value = ctrl_stdcur_get, |
| 933 | .set_value = ctrl_stdcur_set, |
| 934 | .is_dirty = ctrl_stdcur_is_dirty, |
| 935 | .clear_dirty = ctrl_stdcur_clear_dirty, |
| 936 | .val_to_sym = ctrl_std_val_to_sym, |
| 937 | .sym_to_val = ctrl_std_sym_to_val, |
| 938 | .type = pvr2_ctl_bitmask, |
| 939 | },{ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 940 | .desc = "Video Standard Name", |
| 941 | .name = "video_standard", |
| 942 | .internal_id = PVR2_CID_STDENUM, |
| 943 | .skip_init = !0, |
| 944 | .get_value = ctrl_stdenumcur_get, |
| 945 | .set_value = ctrl_stdenumcur_set, |
| 946 | .is_dirty = ctrl_stdenumcur_is_dirty, |
| 947 | .clear_dirty = ctrl_stdenumcur_clear_dirty, |
| 948 | .type = pvr2_ctl_enum, |
| 949 | } |
| 950 | }; |
| 951 | |
Ahmed S. Darwish | eca8ebf | 2007-01-20 00:35:03 -0300 | [diff] [blame] | 952 | #define CTRLDEF_COUNT ARRAY_SIZE(control_defs) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 953 | |
| 954 | |
| 955 | const char *pvr2_config_get_name(enum pvr2_config cfg) |
| 956 | { |
| 957 | switch (cfg) { |
| 958 | case pvr2_config_empty: return "empty"; |
| 959 | case pvr2_config_mpeg: return "mpeg"; |
| 960 | case pvr2_config_vbi: return "vbi"; |
Mike Isely | 16eb40d | 2006-12-30 18:27:32 -0300 | [diff] [blame] | 961 | case pvr2_config_pcm: return "pcm"; |
| 962 | case pvr2_config_rawvideo: return "raw video"; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 963 | } |
| 964 | return "<unknown>"; |
| 965 | } |
| 966 | |
| 967 | |
| 968 | struct usb_device *pvr2_hdw_get_dev(struct pvr2_hdw *hdw) |
| 969 | { |
| 970 | return hdw->usb_dev; |
| 971 | } |
| 972 | |
| 973 | |
| 974 | unsigned long pvr2_hdw_get_sn(struct pvr2_hdw *hdw) |
| 975 | { |
| 976 | return hdw->serial_number; |
| 977 | } |
| 978 | |
Mike Isely | 31a1854 | 2007-04-08 01:11:47 -0300 | [diff] [blame] | 979 | |
| 980 | const char *pvr2_hdw_get_bus_info(struct pvr2_hdw *hdw) |
| 981 | { |
| 982 | return hdw->bus_info; |
| 983 | } |
| 984 | |
| 985 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 986 | unsigned long pvr2_hdw_get_cur_freq(struct pvr2_hdw *hdw) |
| 987 | { |
| 988 | return hdw->freqSelector ? hdw->freqValTelevision : hdw->freqValRadio; |
| 989 | } |
| 990 | |
| 991 | /* Set the currently tuned frequency and account for all possible |
| 992 | driver-core side effects of this action. */ |
| 993 | void pvr2_hdw_set_cur_freq(struct pvr2_hdw *hdw,unsigned long val) |
| 994 | { |
Mike Isely | 7c74e57 | 2007-01-20 00:15:41 -0300 | [diff] [blame] | 995 | if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 996 | if (hdw->freqSelector) { |
| 997 | /* Swing over to radio frequency selection */ |
| 998 | hdw->freqSelector = 0; |
| 999 | hdw->freqDirty = !0; |
| 1000 | } |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1001 | if (hdw->freqValRadio != val) { |
| 1002 | hdw->freqValRadio = val; |
| 1003 | hdw->freqSlotRadio = 0; |
Mike Isely | 7c74e57 | 2007-01-20 00:15:41 -0300 | [diff] [blame] | 1004 | hdw->freqDirty = !0; |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1005 | } |
Mike Isely | 7c74e57 | 2007-01-20 00:15:41 -0300 | [diff] [blame] | 1006 | } else { |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1007 | if (!(hdw->freqSelector)) { |
| 1008 | /* Swing over to television frequency selection */ |
| 1009 | hdw->freqSelector = 1; |
| 1010 | hdw->freqDirty = !0; |
| 1011 | } |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1012 | if (hdw->freqValTelevision != val) { |
| 1013 | hdw->freqValTelevision = val; |
| 1014 | hdw->freqSlotTelevision = 0; |
Mike Isely | 7c74e57 | 2007-01-20 00:15:41 -0300 | [diff] [blame] | 1015 | hdw->freqDirty = !0; |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1016 | } |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1017 | } |
| 1018 | } |
| 1019 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1020 | int pvr2_hdw_get_unit_number(struct pvr2_hdw *hdw) |
| 1021 | { |
| 1022 | return hdw->unit_number; |
| 1023 | } |
| 1024 | |
| 1025 | |
| 1026 | /* Attempt to locate one of the given set of files. Messages are logged |
| 1027 | appropriate to what has been found. The return value will be 0 or |
| 1028 | greater on success (it will be the index of the file name found) and |
| 1029 | fw_entry will be filled in. Otherwise a negative error is returned on |
| 1030 | failure. If the return value is -ENOENT then no viable firmware file |
| 1031 | could be located. */ |
| 1032 | static int pvr2_locate_firmware(struct pvr2_hdw *hdw, |
| 1033 | const struct firmware **fw_entry, |
| 1034 | const char *fwtypename, |
| 1035 | unsigned int fwcount, |
| 1036 | const char *fwnames[]) |
| 1037 | { |
| 1038 | unsigned int idx; |
| 1039 | int ret = -EINVAL; |
| 1040 | for (idx = 0; idx < fwcount; idx++) { |
| 1041 | ret = request_firmware(fw_entry, |
| 1042 | fwnames[idx], |
| 1043 | &hdw->usb_dev->dev); |
| 1044 | if (!ret) { |
| 1045 | trace_firmware("Located %s firmware: %s;" |
| 1046 | " uploading...", |
| 1047 | fwtypename, |
| 1048 | fwnames[idx]); |
| 1049 | return idx; |
| 1050 | } |
| 1051 | if (ret == -ENOENT) continue; |
| 1052 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1053 | "request_firmware fatal error with code=%d",ret); |
| 1054 | return ret; |
| 1055 | } |
| 1056 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1057 | "***WARNING***" |
| 1058 | " Device %s firmware" |
| 1059 | " seems to be missing.", |
| 1060 | fwtypename); |
| 1061 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1062 | "Did you install the pvrusb2 firmware files" |
| 1063 | " in their proper location?"); |
| 1064 | if (fwcount == 1) { |
| 1065 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1066 | "request_firmware unable to locate %s file %s", |
| 1067 | fwtypename,fwnames[0]); |
| 1068 | } else { |
| 1069 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1070 | "request_firmware unable to locate" |
| 1071 | " one of the following %s files:", |
| 1072 | fwtypename); |
| 1073 | for (idx = 0; idx < fwcount; idx++) { |
| 1074 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1075 | "request_firmware: Failed to find %s", |
| 1076 | fwnames[idx]); |
| 1077 | } |
| 1078 | } |
| 1079 | return ret; |
| 1080 | } |
| 1081 | |
| 1082 | |
| 1083 | /* |
| 1084 | * pvr2_upload_firmware1(). |
| 1085 | * |
| 1086 | * Send the 8051 firmware to the device. After the upload, arrange for |
| 1087 | * device to re-enumerate. |
| 1088 | * |
| 1089 | * NOTE : the pointer to the firmware data given by request_firmware() |
| 1090 | * is not suitable for an usb transaction. |
| 1091 | * |
| 1092 | */ |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 1093 | static int pvr2_upload_firmware1(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1094 | { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 1095 | const struct firmware *fw_entry = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1096 | void *fw_ptr; |
| 1097 | unsigned int pipe; |
| 1098 | int ret; |
| 1099 | u16 address; |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1100 | |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1101 | if (!hdw->hdw_desc->fx2_firmware.cnt) { |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1102 | hdw->fw1_state = FW1_STATE_OK; |
Mike Isely | 56dcbfa | 2007-11-26 02:00:51 -0300 | [diff] [blame] | 1103 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1104 | "Connected device type defines" |
| 1105 | " no firmware to upload; ignoring firmware"); |
| 1106 | return -ENOTTY; |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1107 | } |
| 1108 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1109 | hdw->fw1_state = FW1_STATE_FAILED; // default result |
| 1110 | |
| 1111 | trace_firmware("pvr2_upload_firmware1"); |
| 1112 | |
| 1113 | ret = pvr2_locate_firmware(hdw,&fw_entry,"fx2 controller", |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1114 | hdw->hdw_desc->fx2_firmware.cnt, |
| 1115 | hdw->hdw_desc->fx2_firmware.lst); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1116 | if (ret < 0) { |
| 1117 | if (ret == -ENOENT) hdw->fw1_state = FW1_STATE_MISSING; |
| 1118 | return ret; |
| 1119 | } |
| 1120 | |
| 1121 | usb_settoggle(hdw->usb_dev, 0 & 0xf, !(0 & USB_DIR_IN), 0); |
| 1122 | usb_clear_halt(hdw->usb_dev, usb_sndbulkpipe(hdw->usb_dev, 0 & 0x7f)); |
| 1123 | |
| 1124 | pipe = usb_sndctrlpipe(hdw->usb_dev, 0); |
| 1125 | |
| 1126 | if (fw_entry->size != 0x2000){ |
| 1127 | pvr2_trace(PVR2_TRACE_ERROR_LEGS,"wrong fx2 firmware size"); |
| 1128 | release_firmware(fw_entry); |
| 1129 | return -ENOMEM; |
| 1130 | } |
| 1131 | |
| 1132 | fw_ptr = kmalloc(0x800, GFP_KERNEL); |
| 1133 | if (fw_ptr == NULL){ |
| 1134 | release_firmware(fw_entry); |
| 1135 | return -ENOMEM; |
| 1136 | } |
| 1137 | |
| 1138 | /* We have to hold the CPU during firmware upload. */ |
| 1139 | pvr2_hdw_cpureset_assert(hdw,1); |
| 1140 | |
| 1141 | /* upload the firmware to address 0000-1fff in 2048 (=0x800) bytes |
| 1142 | chunk. */ |
| 1143 | |
| 1144 | ret = 0; |
| 1145 | for(address = 0; address < fw_entry->size; address += 0x800) { |
| 1146 | memcpy(fw_ptr, fw_entry->data + address, 0x800); |
| 1147 | ret += usb_control_msg(hdw->usb_dev, pipe, 0xa0, 0x40, address, |
| 1148 | 0, fw_ptr, 0x800, HZ); |
| 1149 | } |
| 1150 | |
| 1151 | trace_firmware("Upload done, releasing device's CPU"); |
| 1152 | |
| 1153 | /* Now release the CPU. It will disconnect and reconnect later. */ |
| 1154 | pvr2_hdw_cpureset_assert(hdw,0); |
| 1155 | |
| 1156 | kfree(fw_ptr); |
| 1157 | release_firmware(fw_entry); |
| 1158 | |
| 1159 | trace_firmware("Upload done (%d bytes sent)",ret); |
| 1160 | |
| 1161 | /* We should have written 8192 bytes */ |
| 1162 | if (ret == 8192) { |
| 1163 | hdw->fw1_state = FW1_STATE_RELOAD; |
| 1164 | return 0; |
| 1165 | } |
| 1166 | |
| 1167 | return -EIO; |
| 1168 | } |
| 1169 | |
| 1170 | |
| 1171 | /* |
| 1172 | * pvr2_upload_firmware2() |
| 1173 | * |
| 1174 | * This uploads encoder firmware on endpoint 2. |
| 1175 | * |
| 1176 | */ |
| 1177 | |
| 1178 | int pvr2_upload_firmware2(struct pvr2_hdw *hdw) |
| 1179 | { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 1180 | const struct firmware *fw_entry = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1181 | void *fw_ptr; |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1182 | unsigned int pipe, fw_len, fw_done, bcnt, icnt; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1183 | int actual_length; |
| 1184 | int ret = 0; |
| 1185 | int fwidx; |
| 1186 | static const char *fw_files[] = { |
| 1187 | CX2341X_FIRM_ENC_FILENAME, |
| 1188 | }; |
| 1189 | |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1190 | if (hdw->hdw_desc->flag_skip_cx23416_firmware) { |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1191 | return 0; |
| 1192 | } |
| 1193 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1194 | trace_firmware("pvr2_upload_firmware2"); |
| 1195 | |
| 1196 | ret = pvr2_locate_firmware(hdw,&fw_entry,"encoder", |
Ahmed S. Darwish | eca8ebf | 2007-01-20 00:35:03 -0300 | [diff] [blame] | 1197 | ARRAY_SIZE(fw_files), fw_files); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1198 | if (ret < 0) return ret; |
| 1199 | fwidx = ret; |
| 1200 | ret = 0; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 1201 | /* Since we're about to completely reinitialize the encoder, |
| 1202 | invalidate our cached copy of its configuration state. Next |
| 1203 | time we configure the encoder, then we'll fully configure it. */ |
| 1204 | hdw->enc_cur_valid = 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1205 | |
| 1206 | /* First prepare firmware loading */ |
| 1207 | ret |= pvr2_write_register(hdw, 0x0048, 0xffffffff); /*interrupt mask*/ |
| 1208 | ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000088); /*gpio dir*/ |
| 1209 | ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/ |
| 1210 | ret |= pvr2_hdw_cmd_deep_reset(hdw); |
| 1211 | ret |= pvr2_write_register(hdw, 0xa064, 0x00000000); /*APU command*/ |
| 1212 | ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000408); /*gpio dir*/ |
| 1213 | ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/ |
| 1214 | ret |= pvr2_write_register(hdw, 0x9058, 0xffffffed); /*VPU ctrl*/ |
| 1215 | ret |= pvr2_write_register(hdw, 0x9054, 0xfffffffd); /*reset hw blocks*/ |
| 1216 | ret |= pvr2_write_register(hdw, 0x07f8, 0x80000800); /*encoder SDRAM refresh*/ |
| 1217 | ret |= pvr2_write_register(hdw, 0x07fc, 0x0000001a); /*encoder SDRAM pre-charge*/ |
| 1218 | ret |= pvr2_write_register(hdw, 0x0700, 0x00000000); /*I2C clock*/ |
| 1219 | ret |= pvr2_write_register(hdw, 0xaa00, 0x00000000); /*unknown*/ |
| 1220 | ret |= pvr2_write_register(hdw, 0xaa04, 0x00057810); /*unknown*/ |
| 1221 | ret |= pvr2_write_register(hdw, 0xaa10, 0x00148500); /*unknown*/ |
| 1222 | ret |= pvr2_write_register(hdw, 0xaa18, 0x00840000); /*unknown*/ |
Mike Isely | 567d711 | 2007-01-28 15:38:55 -0300 | [diff] [blame] | 1223 | LOCK_TAKE(hdw->ctl_lock); do { |
| 1224 | hdw->cmd_buffer[0] = FX2CMD_FWPOST1; |
Al Viro | 89952d1 | 2007-03-14 09:17:59 +0000 | [diff] [blame] | 1225 | ret |= pvr2_send_request(hdw,hdw->cmd_buffer,1,NULL,0); |
Mike Isely | 567d711 | 2007-01-28 15:38:55 -0300 | [diff] [blame] | 1226 | hdw->cmd_buffer[0] = FX2CMD_MEMSEL; |
| 1227 | hdw->cmd_buffer[1] = 0; |
Al Viro | 89952d1 | 2007-03-14 09:17:59 +0000 | [diff] [blame] | 1228 | ret |= pvr2_send_request(hdw,hdw->cmd_buffer,2,NULL,0); |
Mike Isely | 567d711 | 2007-01-28 15:38:55 -0300 | [diff] [blame] | 1229 | } while (0); LOCK_GIVE(hdw->ctl_lock); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1230 | |
| 1231 | if (ret) { |
| 1232 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1233 | "firmware2 upload prep failed, ret=%d",ret); |
| 1234 | release_firmware(fw_entry); |
| 1235 | return ret; |
| 1236 | } |
| 1237 | |
| 1238 | /* Now send firmware */ |
| 1239 | |
| 1240 | fw_len = fw_entry->size; |
| 1241 | |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1242 | if (fw_len % sizeof(u32)) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1243 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1244 | "size of %s firmware" |
Mike Isely | 48dc30a | 2007-03-03 10:13:05 -0200 | [diff] [blame] | 1245 | " must be a multiple of %zu bytes", |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1246 | fw_files[fwidx],sizeof(u32)); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1247 | release_firmware(fw_entry); |
| 1248 | return -1; |
| 1249 | } |
| 1250 | |
| 1251 | fw_ptr = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL); |
| 1252 | if (fw_ptr == NULL){ |
| 1253 | release_firmware(fw_entry); |
| 1254 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1255 | "failed to allocate memory for firmware2 upload"); |
| 1256 | return -ENOMEM; |
| 1257 | } |
| 1258 | |
| 1259 | pipe = usb_sndbulkpipe(hdw->usb_dev, PVR2_FIRMWARE_ENDPOINT); |
| 1260 | |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1261 | fw_done = 0; |
| 1262 | for (fw_done = 0; fw_done < fw_len;) { |
| 1263 | bcnt = fw_len - fw_done; |
| 1264 | if (bcnt > FIRMWARE_CHUNK_SIZE) bcnt = FIRMWARE_CHUNK_SIZE; |
| 1265 | memcpy(fw_ptr, fw_entry->data + fw_done, bcnt); |
| 1266 | /* Usbsnoop log shows that we must swap bytes... */ |
| 1267 | for (icnt = 0; icnt < bcnt/4 ; icnt++) |
| 1268 | ((u32 *)fw_ptr)[icnt] = |
| 1269 | ___swab32(((u32 *)fw_ptr)[icnt]); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1270 | |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1271 | ret |= usb_bulk_msg(hdw->usb_dev, pipe, fw_ptr,bcnt, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1272 | &actual_length, HZ); |
Mike Isely | 90060d3 | 2007-02-08 02:02:53 -0300 | [diff] [blame] | 1273 | ret |= (actual_length != bcnt); |
| 1274 | if (ret) break; |
| 1275 | fw_done += bcnt; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1276 | } |
| 1277 | |
| 1278 | trace_firmware("upload of %s : %i / %i ", |
| 1279 | fw_files[fwidx],fw_done,fw_len); |
| 1280 | |
| 1281 | kfree(fw_ptr); |
| 1282 | release_firmware(fw_entry); |
| 1283 | |
| 1284 | if (ret) { |
| 1285 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1286 | "firmware2 upload transfer failure"); |
| 1287 | return ret; |
| 1288 | } |
| 1289 | |
| 1290 | /* Finish upload */ |
| 1291 | |
| 1292 | ret |= pvr2_write_register(hdw, 0x9054, 0xffffffff); /*reset hw blocks*/ |
| 1293 | ret |= pvr2_write_register(hdw, 0x9058, 0xffffffe8); /*VPU ctrl*/ |
Mike Isely | 567d711 | 2007-01-28 15:38:55 -0300 | [diff] [blame] | 1294 | LOCK_TAKE(hdw->ctl_lock); do { |
| 1295 | hdw->cmd_buffer[0] = FX2CMD_MEMSEL; |
| 1296 | hdw->cmd_buffer[1] = 0; |
Al Viro | 89952d1 | 2007-03-14 09:17:59 +0000 | [diff] [blame] | 1297 | ret |= pvr2_send_request(hdw,hdw->cmd_buffer,2,NULL,0); |
Mike Isely | 567d711 | 2007-01-28 15:38:55 -0300 | [diff] [blame] | 1298 | } while (0); LOCK_GIVE(hdw->ctl_lock); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1299 | |
| 1300 | if (ret) { |
| 1301 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1302 | "firmware2 upload post-proc failure"); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1303 | } |
| 1304 | return ret; |
| 1305 | } |
| 1306 | |
| 1307 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1308 | static const char *pvr2_get_state_name(unsigned int st) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1309 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1310 | if (st < ARRAY_SIZE(pvr2_state_names)) { |
| 1311 | return pvr2_state_names[st]; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1312 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1313 | return "???"; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1314 | } |
| 1315 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1316 | static int pvr2_decoder_enable(struct pvr2_hdw *hdw,int enablefl) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1317 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1318 | if (!hdw->decoder_ctrl) { |
| 1319 | if (!hdw->flag_decoder_missed) { |
| 1320 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1321 | "WARNING: No decoder present"); |
| 1322 | hdw->flag_decoder_missed = !0; |
| 1323 | trace_stbit("flag_decoder_missed", |
| 1324 | hdw->flag_decoder_missed); |
| 1325 | } |
| 1326 | return -EIO; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1327 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1328 | hdw->decoder_ctrl->enable(hdw->decoder_ctrl->ctxt,enablefl); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1329 | return 0; |
| 1330 | } |
| 1331 | |
| 1332 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1333 | void pvr2_hdw_set_decoder(struct pvr2_hdw *hdw,struct pvr2_decoder_ctrl *ptr) |
| 1334 | { |
| 1335 | if (hdw->decoder_ctrl == ptr) return; |
| 1336 | hdw->decoder_ctrl = ptr; |
| 1337 | if (hdw->decoder_ctrl && hdw->flag_decoder_missed) { |
| 1338 | hdw->flag_decoder_missed = 0; |
| 1339 | trace_stbit("flag_decoder_missed", |
| 1340 | hdw->flag_decoder_missed); |
| 1341 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1342 | "Decoder has appeared"); |
| 1343 | pvr2_hdw_state_sched(hdw); |
| 1344 | } |
| 1345 | } |
| 1346 | |
| 1347 | |
| 1348 | int pvr2_hdw_get_state(struct pvr2_hdw *hdw) |
| 1349 | { |
| 1350 | return hdw->master_state; |
| 1351 | } |
| 1352 | |
| 1353 | |
| 1354 | static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw *hdw) |
| 1355 | { |
| 1356 | if (!hdw->flag_tripped) return 0; |
| 1357 | hdw->flag_tripped = 0; |
| 1358 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1359 | "Clearing driver error statuss"); |
| 1360 | return !0; |
| 1361 | } |
| 1362 | |
| 1363 | |
| 1364 | int pvr2_hdw_untrip(struct pvr2_hdw *hdw) |
| 1365 | { |
| 1366 | int fl; |
| 1367 | LOCK_TAKE(hdw->big_lock); do { |
| 1368 | fl = pvr2_hdw_untrip_unlocked(hdw); |
| 1369 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 1370 | if (fl) pvr2_hdw_state_sched(hdw); |
| 1371 | return 0; |
| 1372 | } |
| 1373 | |
| 1374 | |
| 1375 | const char *pvr2_hdw_get_state_name(unsigned int id) |
| 1376 | { |
| 1377 | if (id >= ARRAY_SIZE(pvr2_state_names)) return NULL; |
| 1378 | return pvr2_state_names[id]; |
| 1379 | } |
| 1380 | |
| 1381 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1382 | int pvr2_hdw_get_streaming(struct pvr2_hdw *hdw) |
| 1383 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1384 | return hdw->state_pipeline_req != 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1385 | } |
| 1386 | |
| 1387 | |
| 1388 | int pvr2_hdw_set_streaming(struct pvr2_hdw *hdw,int enable_flag) |
| 1389 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1390 | int ret,st; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1391 | LOCK_TAKE(hdw->big_lock); do { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1392 | pvr2_hdw_untrip_unlocked(hdw); |
| 1393 | if ((!enable_flag) != !(hdw->state_pipeline_req)) { |
| 1394 | hdw->state_pipeline_req = enable_flag != 0; |
| 1395 | pvr2_trace(PVR2_TRACE_START_STOP, |
| 1396 | "/*--TRACE_STREAM--*/ %s", |
| 1397 | enable_flag ? "enable" : "disable"); |
| 1398 | } |
| 1399 | pvr2_hdw_state_sched(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1400 | } while (0); LOCK_GIVE(hdw->big_lock); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1401 | if ((ret = pvr2_hdw_wait(hdw,0)) < 0) return ret; |
| 1402 | if (enable_flag) { |
| 1403 | while ((st = hdw->master_state) != PVR2_STATE_RUN) { |
| 1404 | if (st != PVR2_STATE_READY) return -EIO; |
| 1405 | if ((ret = pvr2_hdw_wait(hdw,st)) < 0) return ret; |
| 1406 | } |
| 1407 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1408 | return 0; |
| 1409 | } |
| 1410 | |
| 1411 | |
| 1412 | int pvr2_hdw_set_stream_type(struct pvr2_hdw *hdw,enum pvr2_config config) |
| 1413 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1414 | int fl; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1415 | LOCK_TAKE(hdw->big_lock); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1416 | if ((fl = (hdw->desired_stream_type != config)) != 0) { |
| 1417 | hdw->desired_stream_type = config; |
| 1418 | hdw->state_pipeline_config = 0; |
| 1419 | trace_stbit("state_pipeline_config", |
| 1420 | hdw->state_pipeline_config); |
| 1421 | pvr2_hdw_state_sched(hdw); |
| 1422 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1423 | LOCK_GIVE(hdw->big_lock); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1424 | if (fl) return 0; |
| 1425 | return pvr2_hdw_wait(hdw,0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1426 | } |
| 1427 | |
| 1428 | |
| 1429 | static int get_default_tuner_type(struct pvr2_hdw *hdw) |
| 1430 | { |
| 1431 | int unit_number = hdw->unit_number; |
| 1432 | int tp = -1; |
| 1433 | if ((unit_number >= 0) && (unit_number < PVR_NUM)) { |
| 1434 | tp = tuner[unit_number]; |
| 1435 | } |
| 1436 | if (tp < 0) return -EINVAL; |
| 1437 | hdw->tuner_type = tp; |
Mike Isely | aaf7884 | 2007-11-26 02:04:11 -0300 | [diff] [blame] | 1438 | hdw->tuner_updated = !0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1439 | return 0; |
| 1440 | } |
| 1441 | |
| 1442 | |
| 1443 | static v4l2_std_id get_default_standard(struct pvr2_hdw *hdw) |
| 1444 | { |
| 1445 | int unit_number = hdw->unit_number; |
| 1446 | int tp = 0; |
| 1447 | if ((unit_number >= 0) && (unit_number < PVR_NUM)) { |
| 1448 | tp = video_std[unit_number]; |
Mike Isely | 6a54025 | 2007-12-02 23:51:34 -0300 | [diff] [blame] | 1449 | if (tp) return tp; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1450 | } |
Mike Isely | 6a54025 | 2007-12-02 23:51:34 -0300 | [diff] [blame] | 1451 | return 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1452 | } |
| 1453 | |
| 1454 | |
| 1455 | static unsigned int get_default_error_tolerance(struct pvr2_hdw *hdw) |
| 1456 | { |
| 1457 | int unit_number = hdw->unit_number; |
| 1458 | int tp = 0; |
| 1459 | if ((unit_number >= 0) && (unit_number < PVR_NUM)) { |
| 1460 | tp = tolerance[unit_number]; |
| 1461 | } |
| 1462 | return tp; |
| 1463 | } |
| 1464 | |
| 1465 | |
| 1466 | static int pvr2_hdw_check_firmware(struct pvr2_hdw *hdw) |
| 1467 | { |
| 1468 | /* Try a harmless request to fetch the eeprom's address over |
| 1469 | endpoint 1. See what happens. Only the full FX2 image can |
| 1470 | respond to this. If this probe fails then likely the FX2 |
| 1471 | firmware needs be loaded. */ |
| 1472 | int result; |
| 1473 | LOCK_TAKE(hdw->ctl_lock); do { |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 1474 | hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1475 | result = pvr2_send_request_ex(hdw,HZ*1,!0, |
| 1476 | hdw->cmd_buffer,1, |
| 1477 | hdw->cmd_buffer,1); |
| 1478 | if (result < 0) break; |
| 1479 | } while(0); LOCK_GIVE(hdw->ctl_lock); |
| 1480 | if (result) { |
| 1481 | pvr2_trace(PVR2_TRACE_INIT, |
| 1482 | "Probe of device endpoint 1 result status %d", |
| 1483 | result); |
| 1484 | } else { |
| 1485 | pvr2_trace(PVR2_TRACE_INIT, |
| 1486 | "Probe of device endpoint 1 succeeded"); |
| 1487 | } |
| 1488 | return result == 0; |
| 1489 | } |
| 1490 | |
Mike Isely | 9f66d4e | 2007-09-08 22:28:51 -0300 | [diff] [blame] | 1491 | struct pvr2_std_hack { |
| 1492 | v4l2_std_id pat; /* Pattern to match */ |
| 1493 | v4l2_std_id msk; /* Which bits we care about */ |
| 1494 | v4l2_std_id std; /* What additional standards or default to set */ |
| 1495 | }; |
| 1496 | |
| 1497 | /* This data structure labels specific combinations of standards from |
| 1498 | tveeprom that we'll try to recognize. If we recognize one, then assume |
| 1499 | a specified default standard to use. This is here because tveeprom only |
| 1500 | tells us about available standards not the intended default standard (if |
| 1501 | any) for the device in question. We guess the default based on what has |
| 1502 | been reported as available. Note that this is only for guessing a |
| 1503 | default - which can always be overridden explicitly - and if the user |
| 1504 | has otherwise named a default then that default will always be used in |
| 1505 | place of this table. */ |
| 1506 | const static struct pvr2_std_hack std_eeprom_maps[] = { |
| 1507 | { /* PAL(B/G) */ |
| 1508 | .pat = V4L2_STD_B|V4L2_STD_GH, |
| 1509 | .std = V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_PAL_G, |
| 1510 | }, |
| 1511 | { /* NTSC(M) */ |
| 1512 | .pat = V4L2_STD_MN, |
| 1513 | .std = V4L2_STD_NTSC_M, |
| 1514 | }, |
| 1515 | { /* PAL(I) */ |
| 1516 | .pat = V4L2_STD_PAL_I, |
| 1517 | .std = V4L2_STD_PAL_I, |
| 1518 | }, |
| 1519 | { /* SECAM(L/L') */ |
| 1520 | .pat = V4L2_STD_SECAM_L|V4L2_STD_SECAM_LC, |
| 1521 | .std = V4L2_STD_SECAM_L|V4L2_STD_SECAM_LC, |
| 1522 | }, |
| 1523 | { /* PAL(D/D1/K) */ |
| 1524 | .pat = V4L2_STD_DK, |
Roel Kluin | ea2562d | 2007-12-02 23:04:57 -0300 | [diff] [blame] | 1525 | .std = V4L2_STD_PAL_D|V4L2_STD_PAL_D1|V4L2_STD_PAL_K, |
Mike Isely | 9f66d4e | 2007-09-08 22:28:51 -0300 | [diff] [blame] | 1526 | }, |
| 1527 | }; |
| 1528 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1529 | static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw) |
| 1530 | { |
| 1531 | char buf[40]; |
| 1532 | unsigned int bcnt; |
Mike Isely | 3d290bd | 2007-12-03 01:47:12 -0300 | [diff] [blame] | 1533 | v4l2_std_id std1,std2,std3; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1534 | |
| 1535 | std1 = get_default_standard(hdw); |
Mike Isely | 3d290bd | 2007-12-03 01:47:12 -0300 | [diff] [blame] | 1536 | std3 = std1 ? 0 : hdw->hdw_desc->default_std_mask; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1537 | |
| 1538 | bcnt = pvr2_std_id_to_str(buf,sizeof(buf),hdw->std_mask_eeprom); |
Mike Isely | 5658538 | 2007-09-08 22:32:12 -0300 | [diff] [blame] | 1539 | pvr2_trace(PVR2_TRACE_STD, |
Mike Isely | 56dcbfa | 2007-11-26 02:00:51 -0300 | [diff] [blame] | 1540 | "Supported video standard(s) reported available" |
| 1541 | " in hardware: %.*s", |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1542 | bcnt,buf); |
| 1543 | |
| 1544 | hdw->std_mask_avail = hdw->std_mask_eeprom; |
| 1545 | |
Mike Isely | 3d290bd | 2007-12-03 01:47:12 -0300 | [diff] [blame] | 1546 | std2 = (std1|std3) & ~hdw->std_mask_avail; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1547 | if (std2) { |
| 1548 | bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std2); |
Mike Isely | 5658538 | 2007-09-08 22:32:12 -0300 | [diff] [blame] | 1549 | pvr2_trace(PVR2_TRACE_STD, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1550 | "Expanding supported video standards" |
| 1551 | " to include: %.*s", |
| 1552 | bcnt,buf); |
| 1553 | hdw->std_mask_avail |= std2; |
| 1554 | } |
| 1555 | |
| 1556 | pvr2_hdw_internal_set_std_avail(hdw); |
| 1557 | |
| 1558 | if (std1) { |
| 1559 | bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std1); |
Mike Isely | 5658538 | 2007-09-08 22:32:12 -0300 | [diff] [blame] | 1560 | pvr2_trace(PVR2_TRACE_STD, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1561 | "Initial video standard forced to %.*s", |
| 1562 | bcnt,buf); |
| 1563 | hdw->std_mask_cur = std1; |
| 1564 | hdw->std_dirty = !0; |
| 1565 | pvr2_hdw_internal_find_stdenum(hdw); |
| 1566 | return; |
| 1567 | } |
Mike Isely | 3d290bd | 2007-12-03 01:47:12 -0300 | [diff] [blame] | 1568 | if (std3) { |
| 1569 | bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std3); |
| 1570 | pvr2_trace(PVR2_TRACE_STD, |
| 1571 | "Initial video standard" |
| 1572 | " (determined by device type): %.*s",bcnt,buf); |
| 1573 | hdw->std_mask_cur = std3; |
| 1574 | hdw->std_dirty = !0; |
| 1575 | pvr2_hdw_internal_find_stdenum(hdw); |
| 1576 | return; |
| 1577 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1578 | |
Mike Isely | 9f66d4e | 2007-09-08 22:28:51 -0300 | [diff] [blame] | 1579 | { |
| 1580 | unsigned int idx; |
| 1581 | for (idx = 0; idx < ARRAY_SIZE(std_eeprom_maps); idx++) { |
| 1582 | if (std_eeprom_maps[idx].msk ? |
| 1583 | ((std_eeprom_maps[idx].pat ^ |
| 1584 | hdw->std_mask_eeprom) & |
| 1585 | std_eeprom_maps[idx].msk) : |
| 1586 | (std_eeprom_maps[idx].pat != |
| 1587 | hdw->std_mask_eeprom)) continue; |
| 1588 | bcnt = pvr2_std_id_to_str(buf,sizeof(buf), |
| 1589 | std_eeprom_maps[idx].std); |
Mike Isely | 5658538 | 2007-09-08 22:32:12 -0300 | [diff] [blame] | 1590 | pvr2_trace(PVR2_TRACE_STD, |
Mike Isely | 9f66d4e | 2007-09-08 22:28:51 -0300 | [diff] [blame] | 1591 | "Initial video standard guessed as %.*s", |
| 1592 | bcnt,buf); |
| 1593 | hdw->std_mask_cur = std_eeprom_maps[idx].std; |
| 1594 | hdw->std_dirty = !0; |
| 1595 | pvr2_hdw_internal_find_stdenum(hdw); |
| 1596 | return; |
| 1597 | } |
| 1598 | } |
| 1599 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1600 | if (hdw->std_enum_cnt > 1) { |
| 1601 | // Autoselect the first listed standard |
| 1602 | hdw->std_enum_cur = 1; |
| 1603 | hdw->std_mask_cur = hdw->std_defs[hdw->std_enum_cur-1].id; |
| 1604 | hdw->std_dirty = !0; |
Mike Isely | 5658538 | 2007-09-08 22:32:12 -0300 | [diff] [blame] | 1605 | pvr2_trace(PVR2_TRACE_STD, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1606 | "Initial video standard auto-selected to %s", |
| 1607 | hdw->std_defs[hdw->std_enum_cur-1].name); |
| 1608 | return; |
| 1609 | } |
| 1610 | |
Mike Isely | 0885ba1 | 2006-06-25 21:30:47 -0300 | [diff] [blame] | 1611 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1612 | "Unable to select a viable initial video standard"); |
| 1613 | } |
| 1614 | |
| 1615 | |
| 1616 | static void pvr2_hdw_setup_low(struct pvr2_hdw *hdw) |
| 1617 | { |
| 1618 | int ret; |
| 1619 | unsigned int idx; |
| 1620 | struct pvr2_ctrl *cptr; |
| 1621 | int reloadFl = 0; |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1622 | if (hdw->hdw_desc->fx2_firmware.cnt) { |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1623 | if (!reloadFl) { |
| 1624 | reloadFl = |
| 1625 | (hdw->usb_intf->cur_altsetting->desc.bNumEndpoints |
| 1626 | == 0); |
| 1627 | if (reloadFl) { |
| 1628 | pvr2_trace(PVR2_TRACE_INIT, |
| 1629 | "USB endpoint config looks strange" |
| 1630 | "; possibly firmware needs to be" |
| 1631 | " loaded"); |
| 1632 | } |
| 1633 | } |
| 1634 | if (!reloadFl) { |
| 1635 | reloadFl = !pvr2_hdw_check_firmware(hdw); |
| 1636 | if (reloadFl) { |
| 1637 | pvr2_trace(PVR2_TRACE_INIT, |
| 1638 | "Check for FX2 firmware failed" |
| 1639 | "; possibly firmware needs to be" |
| 1640 | " loaded"); |
| 1641 | } |
| 1642 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1643 | if (reloadFl) { |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1644 | if (pvr2_upload_firmware1(hdw) != 0) { |
| 1645 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1646 | "Failure uploading firmware1"); |
| 1647 | } |
| 1648 | return; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1649 | } |
| 1650 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1651 | hdw->fw1_state = FW1_STATE_OK; |
| 1652 | |
| 1653 | if (initusbreset) { |
| 1654 | pvr2_hdw_device_reset(hdw); |
| 1655 | } |
| 1656 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 1657 | |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1658 | for (idx = 0; idx < hdw->hdw_desc->client_modules.cnt; idx++) { |
| 1659 | request_module(hdw->hdw_desc->client_modules.lst[idx]); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1660 | } |
| 1661 | |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1662 | if (!hdw->hdw_desc->flag_no_powerup) { |
Mike Isely | 1d643a3 | 2007-09-08 22:18:50 -0300 | [diff] [blame] | 1663 | pvr2_hdw_cmd_powerup(hdw); |
| 1664 | if (!pvr2_hdw_dev_ok(hdw)) return; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1665 | } |
| 1666 | |
| 1667 | // This step MUST happen after the earlier powerup step. |
| 1668 | pvr2_i2c_core_init(hdw); |
| 1669 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 1670 | |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 1671 | for (idx = 0; idx < CTRLDEF_COUNT; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1672 | cptr = hdw->controls + idx; |
| 1673 | if (cptr->info->skip_init) continue; |
| 1674 | if (!cptr->info->set_value) continue; |
| 1675 | cptr->info->set_value(cptr,~0,cptr->info->default_value); |
| 1676 | } |
| 1677 | |
Mike Isely | 1bde028 | 2006-12-27 23:30:13 -0300 | [diff] [blame] | 1678 | /* Set up special default values for the television and radio |
| 1679 | frequencies here. It's not really important what these defaults |
| 1680 | are, but I set them to something usable in the Chicago area just |
| 1681 | to make driver testing a little easier. */ |
| 1682 | |
| 1683 | /* US Broadcast channel 7 (175.25 MHz) */ |
| 1684 | hdw->freqValTelevision = 175250000L; |
| 1685 | /* 104.3 MHz, a usable FM station for my area */ |
| 1686 | hdw->freqValRadio = 104300000L; |
| 1687 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1688 | // Do not use pvr2_reset_ctl_endpoints() here. It is not |
| 1689 | // thread-safe against the normal pvr2_send_request() mechanism. |
| 1690 | // (We should make it thread safe). |
| 1691 | |
Mike Isely | aaf7884 | 2007-11-26 02:04:11 -0300 | [diff] [blame] | 1692 | if (hdw->hdw_desc->flag_has_hauppauge_rom) { |
| 1693 | ret = pvr2_hdw_get_eeprom_addr(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1694 | if (!pvr2_hdw_dev_ok(hdw)) return; |
Mike Isely | aaf7884 | 2007-11-26 02:04:11 -0300 | [diff] [blame] | 1695 | if (ret < 0) { |
| 1696 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 1697 | "Unable to determine location of eeprom," |
| 1698 | " skipping"); |
| 1699 | } else { |
| 1700 | hdw->eeprom_addr = ret; |
| 1701 | pvr2_eeprom_analyze(hdw); |
| 1702 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 1703 | } |
| 1704 | } else { |
| 1705 | hdw->tuner_type = hdw->hdw_desc->default_tuner_type; |
| 1706 | hdw->tuner_updated = !0; |
| 1707 | hdw->std_mask_eeprom = V4L2_STD_ALL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1708 | } |
| 1709 | |
| 1710 | pvr2_hdw_setup_std(hdw); |
| 1711 | |
| 1712 | if (!get_default_tuner_type(hdw)) { |
| 1713 | pvr2_trace(PVR2_TRACE_INIT, |
| 1714 | "pvr2_hdw_setup: Tuner type overridden to %d", |
| 1715 | hdw->tuner_type); |
| 1716 | } |
| 1717 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1718 | pvr2_i2c_core_check_stale(hdw); |
| 1719 | hdw->tuner_updated = 0; |
| 1720 | |
| 1721 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 1722 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1723 | pvr2_hdw_commit_setup(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1724 | |
| 1725 | hdw->vid_stream = pvr2_stream_create(); |
| 1726 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 1727 | pvr2_trace(PVR2_TRACE_INIT, |
| 1728 | "pvr2_hdw_setup: video stream is %p",hdw->vid_stream); |
| 1729 | if (hdw->vid_stream) { |
| 1730 | idx = get_default_error_tolerance(hdw); |
| 1731 | if (idx) { |
| 1732 | pvr2_trace(PVR2_TRACE_INIT, |
| 1733 | "pvr2_hdw_setup: video stream %p" |
| 1734 | " setting tolerance %u", |
| 1735 | hdw->vid_stream,idx); |
| 1736 | } |
| 1737 | pvr2_stream_setup(hdw->vid_stream,hdw->usb_dev, |
| 1738 | PVR2_VID_ENDPOINT,idx); |
| 1739 | } |
| 1740 | |
| 1741 | if (!pvr2_hdw_dev_ok(hdw)) return; |
| 1742 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1743 | hdw->flag_init_ok = !0; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1744 | |
| 1745 | pvr2_hdw_state_sched(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1746 | } |
| 1747 | |
| 1748 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1749 | /* Set up the structure and attempt to put the device into a usable state. |
| 1750 | This can be a time-consuming operation, which is why it is not done |
| 1751 | internally as part of the create() step. */ |
| 1752 | static void pvr2_hdw_setup(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1753 | { |
| 1754 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) begin",hdw); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1755 | do { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1756 | pvr2_hdw_setup_low(hdw); |
| 1757 | pvr2_trace(PVR2_TRACE_INIT, |
| 1758 | "pvr2_hdw_setup(hdw=%p) done, ok=%d init_ok=%d", |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1759 | hdw,pvr2_hdw_dev_ok(hdw),hdw->flag_init_ok); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1760 | if (pvr2_hdw_dev_ok(hdw)) { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1761 | if (hdw->flag_init_ok) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1762 | pvr2_trace( |
| 1763 | PVR2_TRACE_INFO, |
| 1764 | "Device initialization" |
| 1765 | " completed successfully."); |
| 1766 | break; |
| 1767 | } |
| 1768 | if (hdw->fw1_state == FW1_STATE_RELOAD) { |
| 1769 | pvr2_trace( |
| 1770 | PVR2_TRACE_INFO, |
| 1771 | "Device microcontroller firmware" |
| 1772 | " (re)loaded; it should now reset" |
| 1773 | " and reconnect."); |
| 1774 | break; |
| 1775 | } |
| 1776 | pvr2_trace( |
| 1777 | PVR2_TRACE_ERROR_LEGS, |
| 1778 | "Device initialization was not successful."); |
| 1779 | if (hdw->fw1_state == FW1_STATE_MISSING) { |
| 1780 | pvr2_trace( |
| 1781 | PVR2_TRACE_ERROR_LEGS, |
| 1782 | "Giving up since device" |
| 1783 | " microcontroller firmware" |
| 1784 | " appears to be missing."); |
| 1785 | break; |
| 1786 | } |
| 1787 | } |
| 1788 | if (procreload) { |
| 1789 | pvr2_trace( |
| 1790 | PVR2_TRACE_ERROR_LEGS, |
| 1791 | "Attempting pvrusb2 recovery by reloading" |
| 1792 | " primary firmware."); |
| 1793 | pvr2_trace( |
| 1794 | PVR2_TRACE_ERROR_LEGS, |
| 1795 | "If this works, device should disconnect" |
| 1796 | " and reconnect in a sane state."); |
| 1797 | hdw->fw1_state = FW1_STATE_UNKNOWN; |
| 1798 | pvr2_upload_firmware1(hdw); |
| 1799 | } else { |
| 1800 | pvr2_trace( |
| 1801 | PVR2_TRACE_ERROR_LEGS, |
| 1802 | "***WARNING*** pvrusb2 device hardware" |
| 1803 | " appears to be jammed" |
| 1804 | " and I can't clear it."); |
| 1805 | pvr2_trace( |
| 1806 | PVR2_TRACE_ERROR_LEGS, |
| 1807 | "You might need to power cycle" |
| 1808 | " the pvrusb2 device" |
| 1809 | " in order to recover."); |
| 1810 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1811 | } while (0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1812 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) end",hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1813 | } |
| 1814 | |
| 1815 | |
| 1816 | /* Create and return a structure for interacting with the underlying |
| 1817 | hardware */ |
| 1818 | struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf, |
| 1819 | const struct usb_device_id *devid) |
| 1820 | { |
Mike Isely | 7fb20fa | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 1821 | unsigned int idx,cnt1,cnt2,m; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1822 | struct pvr2_hdw *hdw; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1823 | int valid_std_mask; |
| 1824 | struct pvr2_ctrl *cptr; |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1825 | const struct pvr2_device_desc *hdw_desc; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1826 | __u8 ifnum; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 1827 | struct v4l2_queryctrl qctrl; |
| 1828 | struct pvr2_ctl_info *ciptr; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1829 | |
Mike Isely | d130fa8 | 2007-12-08 17:20:06 -0300 | [diff] [blame] | 1830 | hdw_desc = (const struct pvr2_device_desc *)(devid->driver_info); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1831 | |
Mike Isely | ca545f7 | 2007-01-20 00:37:11 -0300 | [diff] [blame] | 1832 | hdw = kzalloc(sizeof(*hdw),GFP_KERNEL); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1833 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_create: hdw=%p, type \"%s\"", |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1834 | hdw,hdw_desc->description); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1835 | if (!hdw) goto fail; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 1836 | |
| 1837 | init_timer(&hdw->quiescent_timer); |
| 1838 | hdw->quiescent_timer.data = (unsigned long)hdw; |
| 1839 | hdw->quiescent_timer.function = pvr2_hdw_quiescent_timeout; |
| 1840 | |
| 1841 | init_timer(&hdw->encoder_wait_timer); |
| 1842 | hdw->encoder_wait_timer.data = (unsigned long)hdw; |
| 1843 | hdw->encoder_wait_timer.function = pvr2_hdw_encoder_wait_timeout; |
| 1844 | |
| 1845 | hdw->master_state = PVR2_STATE_DEAD; |
| 1846 | |
| 1847 | init_waitqueue_head(&hdw->state_wait_data); |
| 1848 | |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 1849 | hdw->tuner_signal_stale = !0; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 1850 | cx2341x_fill_defaults(&hdw->enc_ctl_state); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1851 | |
Mike Isely | 7fb20fa | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 1852 | /* Calculate which inputs are OK */ |
| 1853 | m = 0; |
| 1854 | if (hdw_desc->flag_has_analogtuner) m |= 1 << PVR2_CVAL_INPUT_TV; |
| 1855 | if (hdw_desc->flag_has_digitaltuner) m |= 1 << PVR2_CVAL_INPUT_DTV; |
| 1856 | if (hdw_desc->flag_has_svideo) m |= 1 << PVR2_CVAL_INPUT_SVIDEO; |
| 1857 | if (hdw_desc->flag_has_composite) m |= 1 << PVR2_CVAL_INPUT_COMPOSITE; |
| 1858 | if (hdw_desc->flag_has_fmradio) m |= 1 << PVR2_CVAL_INPUT_RADIO; |
| 1859 | hdw->input_avail_mask = m; |
| 1860 | |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 1861 | hdw->control_cnt = CTRLDEF_COUNT; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 1862 | hdw->control_cnt += MPEGDEF_COUNT; |
Mike Isely | ca545f7 | 2007-01-20 00:37:11 -0300 | [diff] [blame] | 1863 | hdw->controls = kzalloc(sizeof(struct pvr2_ctrl) * hdw->control_cnt, |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1864 | GFP_KERNEL); |
| 1865 | if (!hdw->controls) goto fail; |
Mike Isely | 989eb15 | 2007-11-26 01:53:12 -0300 | [diff] [blame] | 1866 | hdw->hdw_desc = hdw_desc; |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 1867 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
| 1868 | cptr = hdw->controls + idx; |
| 1869 | cptr->hdw = hdw; |
| 1870 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1871 | for (idx = 0; idx < 32; idx++) { |
| 1872 | hdw->std_mask_ptrs[idx] = hdw->std_mask_names[idx]; |
| 1873 | } |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 1874 | for (idx = 0; idx < CTRLDEF_COUNT; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1875 | cptr = hdw->controls + idx; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1876 | cptr->info = control_defs+idx; |
| 1877 | } |
Mike Isely | dbc40a0 | 2008-04-22 14:45:39 -0300 | [diff] [blame] | 1878 | |
| 1879 | /* Ensure that default input choice is a valid one. */ |
| 1880 | m = hdw->input_avail_mask; |
| 1881 | if (m) for (idx = 0; idx < (sizeof(m) << 3); idx++) { |
| 1882 | if (!((1 << idx) & m)) continue; |
| 1883 | hdw->input_val = idx; |
| 1884 | break; |
| 1885 | } |
| 1886 | |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 1887 | /* Define and configure additional controls from cx2341x module. */ |
Mike Isely | ca545f7 | 2007-01-20 00:37:11 -0300 | [diff] [blame] | 1888 | hdw->mpeg_ctrl_info = kzalloc( |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 1889 | sizeof(*(hdw->mpeg_ctrl_info)) * MPEGDEF_COUNT, GFP_KERNEL); |
| 1890 | if (!hdw->mpeg_ctrl_info) goto fail; |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 1891 | for (idx = 0; idx < MPEGDEF_COUNT; idx++) { |
| 1892 | cptr = hdw->controls + idx + CTRLDEF_COUNT; |
| 1893 | ciptr = &(hdw->mpeg_ctrl_info[idx].info); |
| 1894 | ciptr->desc = hdw->mpeg_ctrl_info[idx].desc; |
| 1895 | ciptr->name = mpeg_ids[idx].strid; |
| 1896 | ciptr->v4l_id = mpeg_ids[idx].id; |
| 1897 | ciptr->skip_init = !0; |
| 1898 | ciptr->get_value = ctrl_cx2341x_get; |
| 1899 | ciptr->get_v4lflags = ctrl_cx2341x_getv4lflags; |
| 1900 | ciptr->is_dirty = ctrl_cx2341x_is_dirty; |
| 1901 | if (!idx) ciptr->clear_dirty = ctrl_cx2341x_clear_dirty; |
| 1902 | qctrl.id = ciptr->v4l_id; |
| 1903 | cx2341x_ctrl_query(&hdw->enc_ctl_state,&qctrl); |
| 1904 | if (!(qctrl.flags & V4L2_CTRL_FLAG_READ_ONLY)) { |
| 1905 | ciptr->set_value = ctrl_cx2341x_set; |
| 1906 | } |
| 1907 | strncpy(hdw->mpeg_ctrl_info[idx].desc,qctrl.name, |
| 1908 | PVR2_CTLD_INFO_DESC_SIZE); |
| 1909 | hdw->mpeg_ctrl_info[idx].desc[PVR2_CTLD_INFO_DESC_SIZE-1] = 0; |
| 1910 | ciptr->default_value = qctrl.default_value; |
| 1911 | switch (qctrl.type) { |
| 1912 | default: |
| 1913 | case V4L2_CTRL_TYPE_INTEGER: |
| 1914 | ciptr->type = pvr2_ctl_int; |
| 1915 | ciptr->def.type_int.min_value = qctrl.minimum; |
| 1916 | ciptr->def.type_int.max_value = qctrl.maximum; |
| 1917 | break; |
| 1918 | case V4L2_CTRL_TYPE_BOOLEAN: |
| 1919 | ciptr->type = pvr2_ctl_bool; |
| 1920 | break; |
| 1921 | case V4L2_CTRL_TYPE_MENU: |
| 1922 | ciptr->type = pvr2_ctl_enum; |
| 1923 | ciptr->def.type_enum.value_names = |
| 1924 | cx2341x_ctrl_get_menu(ciptr->v4l_id); |
| 1925 | for (cnt1 = 0; |
| 1926 | ciptr->def.type_enum.value_names[cnt1] != NULL; |
| 1927 | cnt1++) { } |
| 1928 | ciptr->def.type_enum.count = cnt1; |
| 1929 | break; |
| 1930 | } |
| 1931 | cptr->info = ciptr; |
| 1932 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1933 | |
| 1934 | // Initialize video standard enum dynamic control |
| 1935 | cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDENUM); |
| 1936 | if (cptr) { |
| 1937 | memcpy(&hdw->std_info_enum,cptr->info, |
| 1938 | sizeof(hdw->std_info_enum)); |
| 1939 | cptr->info = &hdw->std_info_enum; |
| 1940 | |
| 1941 | } |
| 1942 | // Initialize control data regarding video standard masks |
| 1943 | valid_std_mask = pvr2_std_get_usable(); |
| 1944 | for (idx = 0; idx < 32; idx++) { |
| 1945 | if (!(valid_std_mask & (1 << idx))) continue; |
| 1946 | cnt1 = pvr2_std_id_to_str( |
| 1947 | hdw->std_mask_names[idx], |
| 1948 | sizeof(hdw->std_mask_names[idx])-1, |
| 1949 | 1 << idx); |
| 1950 | hdw->std_mask_names[idx][cnt1] = 0; |
| 1951 | } |
| 1952 | cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDAVAIL); |
| 1953 | if (cptr) { |
| 1954 | memcpy(&hdw->std_info_avail,cptr->info, |
| 1955 | sizeof(hdw->std_info_avail)); |
| 1956 | cptr->info = &hdw->std_info_avail; |
| 1957 | hdw->std_info_avail.def.type_bitmask.bit_names = |
| 1958 | hdw->std_mask_ptrs; |
| 1959 | hdw->std_info_avail.def.type_bitmask.valid_bits = |
| 1960 | valid_std_mask; |
| 1961 | } |
| 1962 | cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDCUR); |
| 1963 | if (cptr) { |
| 1964 | memcpy(&hdw->std_info_cur,cptr->info, |
| 1965 | sizeof(hdw->std_info_cur)); |
| 1966 | cptr->info = &hdw->std_info_cur; |
| 1967 | hdw->std_info_cur.def.type_bitmask.bit_names = |
| 1968 | hdw->std_mask_ptrs; |
| 1969 | hdw->std_info_avail.def.type_bitmask.valid_bits = |
| 1970 | valid_std_mask; |
| 1971 | } |
| 1972 | |
| 1973 | hdw->eeprom_addr = -1; |
| 1974 | hdw->unit_number = -1; |
Mike Isely | 8079384 | 2006-12-27 23:12:28 -0300 | [diff] [blame] | 1975 | hdw->v4l_minor_number_video = -1; |
| 1976 | hdw->v4l_minor_number_vbi = -1; |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 1977 | hdw->v4l_minor_number_radio = -1; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1978 | hdw->ctl_write_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL); |
| 1979 | if (!hdw->ctl_write_buffer) goto fail; |
| 1980 | hdw->ctl_read_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL); |
| 1981 | if (!hdw->ctl_read_buffer) goto fail; |
| 1982 | hdw->ctl_write_urb = usb_alloc_urb(0,GFP_KERNEL); |
| 1983 | if (!hdw->ctl_write_urb) goto fail; |
| 1984 | hdw->ctl_read_urb = usb_alloc_urb(0,GFP_KERNEL); |
| 1985 | if (!hdw->ctl_read_urb) goto fail; |
| 1986 | |
Matthias Kaehlcke | 8df0c87 | 2007-04-28 20:00:18 -0300 | [diff] [blame] | 1987 | mutex_lock(&pvr2_unit_mtx); do { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1988 | for (idx = 0; idx < PVR_NUM; idx++) { |
| 1989 | if (unit_pointers[idx]) continue; |
| 1990 | hdw->unit_number = idx; |
| 1991 | unit_pointers[idx] = hdw; |
| 1992 | break; |
| 1993 | } |
Matthias Kaehlcke | 8df0c87 | 2007-04-28 20:00:18 -0300 | [diff] [blame] | 1994 | } while (0); mutex_unlock(&pvr2_unit_mtx); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 1995 | |
| 1996 | cnt1 = 0; |
| 1997 | cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"pvrusb2"); |
| 1998 | cnt1 += cnt2; |
| 1999 | if (hdw->unit_number >= 0) { |
| 2000 | cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"_%c", |
| 2001 | ('a' + hdw->unit_number)); |
| 2002 | cnt1 += cnt2; |
| 2003 | } |
| 2004 | if (cnt1 >= sizeof(hdw->name)) cnt1 = sizeof(hdw->name)-1; |
| 2005 | hdw->name[cnt1] = 0; |
| 2006 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2007 | hdw->workqueue = create_singlethread_workqueue(hdw->name); |
| 2008 | INIT_WORK(&hdw->workpoll,pvr2_hdw_worker_poll); |
| 2009 | INIT_WORK(&hdw->worki2csync,pvr2_hdw_worker_i2c); |
| 2010 | INIT_WORK(&hdw->workinit,pvr2_hdw_worker_init); |
| 2011 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2012 | pvr2_trace(PVR2_TRACE_INIT,"Driver unit number is %d, name is %s", |
| 2013 | hdw->unit_number,hdw->name); |
| 2014 | |
| 2015 | hdw->tuner_type = -1; |
| 2016 | hdw->flag_ok = !0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2017 | |
| 2018 | hdw->usb_intf = intf; |
| 2019 | hdw->usb_dev = interface_to_usbdev(intf); |
| 2020 | |
Mike Isely | 31a1854 | 2007-04-08 01:11:47 -0300 | [diff] [blame] | 2021 | scnprintf(hdw->bus_info,sizeof(hdw->bus_info), |
| 2022 | "usb %s address %d", |
| 2023 | hdw->usb_dev->dev.bus_id, |
| 2024 | hdw->usb_dev->devnum); |
| 2025 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2026 | ifnum = hdw->usb_intf->cur_altsetting->desc.bInterfaceNumber; |
| 2027 | usb_set_interface(hdw->usb_dev,ifnum,0); |
| 2028 | |
| 2029 | mutex_init(&hdw->ctl_lock_mutex); |
| 2030 | mutex_init(&hdw->big_lock_mutex); |
| 2031 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2032 | queue_work(hdw->workqueue,&hdw->workinit); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2033 | return hdw; |
| 2034 | fail: |
| 2035 | if (hdw) { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2036 | del_timer_sync(&hdw->quiescent_timer); |
| 2037 | del_timer_sync(&hdw->encoder_wait_timer); |
| 2038 | if (hdw->workqueue) { |
| 2039 | flush_workqueue(hdw->workqueue); |
| 2040 | destroy_workqueue(hdw->workqueue); |
| 2041 | hdw->workqueue = NULL; |
| 2042 | } |
Mariusz Kozlowski | 5e55d2c | 2006-11-08 15:34:31 +0100 | [diff] [blame] | 2043 | usb_free_urb(hdw->ctl_read_urb); |
| 2044 | usb_free_urb(hdw->ctl_write_urb); |
Mariusz Kozlowski | 22071a4 | 2007-01-07 10:33:39 -0300 | [diff] [blame] | 2045 | kfree(hdw->ctl_read_buffer); |
| 2046 | kfree(hdw->ctl_write_buffer); |
| 2047 | kfree(hdw->controls); |
| 2048 | kfree(hdw->mpeg_ctrl_info); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2049 | kfree(hdw->std_defs); |
| 2050 | kfree(hdw->std_enum_names); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2051 | kfree(hdw); |
| 2052 | } |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2053 | return NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2054 | } |
| 2055 | |
| 2056 | |
| 2057 | /* Remove _all_ associations between this driver and the underlying USB |
| 2058 | layer. */ |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 2059 | static void pvr2_hdw_remove_usb_stuff(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2060 | { |
| 2061 | if (hdw->flag_disconnected) return; |
| 2062 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_remove_usb_stuff: hdw=%p",hdw); |
| 2063 | if (hdw->ctl_read_urb) { |
| 2064 | usb_kill_urb(hdw->ctl_read_urb); |
| 2065 | usb_free_urb(hdw->ctl_read_urb); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2066 | hdw->ctl_read_urb = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2067 | } |
| 2068 | if (hdw->ctl_write_urb) { |
| 2069 | usb_kill_urb(hdw->ctl_write_urb); |
| 2070 | usb_free_urb(hdw->ctl_write_urb); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2071 | hdw->ctl_write_urb = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2072 | } |
| 2073 | if (hdw->ctl_read_buffer) { |
| 2074 | kfree(hdw->ctl_read_buffer); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2075 | hdw->ctl_read_buffer = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2076 | } |
| 2077 | if (hdw->ctl_write_buffer) { |
| 2078 | kfree(hdw->ctl_write_buffer); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2079 | hdw->ctl_write_buffer = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2080 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2081 | hdw->flag_disconnected = !0; |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2082 | hdw->usb_dev = NULL; |
| 2083 | hdw->usb_intf = NULL; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2084 | pvr2_hdw_render_useless(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2085 | } |
| 2086 | |
| 2087 | |
| 2088 | /* Destroy hardware interaction structure */ |
| 2089 | void pvr2_hdw_destroy(struct pvr2_hdw *hdw) |
| 2090 | { |
Mike Isely | 401c27c | 2007-09-08 22:11:46 -0300 | [diff] [blame] | 2091 | if (!hdw) return; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2092 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_destroy: hdw=%p",hdw); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2093 | del_timer_sync(&hdw->quiescent_timer); |
| 2094 | del_timer_sync(&hdw->encoder_wait_timer); |
| 2095 | if (hdw->workqueue) { |
| 2096 | flush_workqueue(hdw->workqueue); |
| 2097 | destroy_workqueue(hdw->workqueue); |
| 2098 | hdw->workqueue = NULL; |
| 2099 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2100 | if (hdw->fw_buffer) { |
| 2101 | kfree(hdw->fw_buffer); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2102 | hdw->fw_buffer = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2103 | } |
| 2104 | if (hdw->vid_stream) { |
| 2105 | pvr2_stream_destroy(hdw->vid_stream); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2106 | hdw->vid_stream = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2107 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2108 | if (hdw->decoder_ctrl) { |
| 2109 | hdw->decoder_ctrl->detach(hdw->decoder_ctrl->ctxt); |
| 2110 | } |
| 2111 | pvr2_i2c_core_done(hdw); |
| 2112 | pvr2_hdw_remove_usb_stuff(hdw); |
Matthias Kaehlcke | 8df0c87 | 2007-04-28 20:00:18 -0300 | [diff] [blame] | 2113 | mutex_lock(&pvr2_unit_mtx); do { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2114 | if ((hdw->unit_number >= 0) && |
| 2115 | (hdw->unit_number < PVR_NUM) && |
| 2116 | (unit_pointers[hdw->unit_number] == hdw)) { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2117 | unit_pointers[hdw->unit_number] = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2118 | } |
Matthias Kaehlcke | 8df0c87 | 2007-04-28 20:00:18 -0300 | [diff] [blame] | 2119 | } while (0); mutex_unlock(&pvr2_unit_mtx); |
Mariusz Kozlowski | 22071a4 | 2007-01-07 10:33:39 -0300 | [diff] [blame] | 2120 | kfree(hdw->controls); |
| 2121 | kfree(hdw->mpeg_ctrl_info); |
| 2122 | kfree(hdw->std_defs); |
| 2123 | kfree(hdw->std_enum_names); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2124 | kfree(hdw); |
| 2125 | } |
| 2126 | |
| 2127 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2128 | int pvr2_hdw_dev_ok(struct pvr2_hdw *hdw) |
| 2129 | { |
| 2130 | return (hdw && hdw->flag_ok); |
| 2131 | } |
| 2132 | |
| 2133 | |
| 2134 | /* Called when hardware has been unplugged */ |
| 2135 | void pvr2_hdw_disconnect(struct pvr2_hdw *hdw) |
| 2136 | { |
| 2137 | pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_disconnect(hdw=%p)",hdw); |
| 2138 | LOCK_TAKE(hdw->big_lock); |
| 2139 | LOCK_TAKE(hdw->ctl_lock); |
| 2140 | pvr2_hdw_remove_usb_stuff(hdw); |
| 2141 | LOCK_GIVE(hdw->ctl_lock); |
| 2142 | LOCK_GIVE(hdw->big_lock); |
| 2143 | } |
| 2144 | |
| 2145 | |
| 2146 | // Attempt to autoselect an appropriate value for std_enum_cur given |
| 2147 | // whatever is currently in std_mask_cur |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 2148 | static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2149 | { |
| 2150 | unsigned int idx; |
| 2151 | for (idx = 1; idx < hdw->std_enum_cnt; idx++) { |
| 2152 | if (hdw->std_defs[idx-1].id == hdw->std_mask_cur) { |
| 2153 | hdw->std_enum_cur = idx; |
| 2154 | return; |
| 2155 | } |
| 2156 | } |
| 2157 | hdw->std_enum_cur = 0; |
| 2158 | } |
| 2159 | |
| 2160 | |
| 2161 | // Calculate correct set of enumerated standards based on currently known |
| 2162 | // set of available standards bits. |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 2163 | static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2164 | { |
| 2165 | struct v4l2_standard *newstd; |
| 2166 | unsigned int std_cnt; |
| 2167 | unsigned int idx; |
| 2168 | |
| 2169 | newstd = pvr2_std_create_enum(&std_cnt,hdw->std_mask_avail); |
| 2170 | |
| 2171 | if (hdw->std_defs) { |
| 2172 | kfree(hdw->std_defs); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2173 | hdw->std_defs = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2174 | } |
| 2175 | hdw->std_enum_cnt = 0; |
| 2176 | if (hdw->std_enum_names) { |
| 2177 | kfree(hdw->std_enum_names); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2178 | hdw->std_enum_names = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2179 | } |
| 2180 | |
| 2181 | if (!std_cnt) { |
| 2182 | pvr2_trace( |
| 2183 | PVR2_TRACE_ERROR_LEGS, |
| 2184 | "WARNING: Failed to identify any viable standards"); |
| 2185 | } |
| 2186 | hdw->std_enum_names = kmalloc(sizeof(char *)*(std_cnt+1),GFP_KERNEL); |
| 2187 | hdw->std_enum_names[0] = "none"; |
| 2188 | for (idx = 0; idx < std_cnt; idx++) { |
| 2189 | hdw->std_enum_names[idx+1] = |
| 2190 | newstd[idx].name; |
| 2191 | } |
| 2192 | // Set up the dynamic control for this standard |
| 2193 | hdw->std_info_enum.def.type_enum.value_names = hdw->std_enum_names; |
| 2194 | hdw->std_info_enum.def.type_enum.count = std_cnt+1; |
| 2195 | hdw->std_defs = newstd; |
| 2196 | hdw->std_enum_cnt = std_cnt+1; |
| 2197 | hdw->std_enum_cur = 0; |
| 2198 | hdw->std_info_cur.def.type_bitmask.valid_bits = hdw->std_mask_avail; |
| 2199 | } |
| 2200 | |
| 2201 | |
| 2202 | int pvr2_hdw_get_stdenum_value(struct pvr2_hdw *hdw, |
| 2203 | struct v4l2_standard *std, |
| 2204 | unsigned int idx) |
| 2205 | { |
| 2206 | int ret = -EINVAL; |
| 2207 | if (!idx) return ret; |
| 2208 | LOCK_TAKE(hdw->big_lock); do { |
| 2209 | if (idx >= hdw->std_enum_cnt) break; |
| 2210 | idx--; |
| 2211 | memcpy(std,hdw->std_defs+idx,sizeof(*std)); |
| 2212 | ret = 0; |
| 2213 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 2214 | return ret; |
| 2215 | } |
| 2216 | |
| 2217 | |
| 2218 | /* Get the number of defined controls */ |
| 2219 | unsigned int pvr2_hdw_get_ctrl_count(struct pvr2_hdw *hdw) |
| 2220 | { |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2221 | return hdw->control_cnt; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2222 | } |
| 2223 | |
| 2224 | |
| 2225 | /* Retrieve a control handle given its index (0..count-1) */ |
| 2226 | struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_index(struct pvr2_hdw *hdw, |
| 2227 | unsigned int idx) |
| 2228 | { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2229 | if (idx >= hdw->control_cnt) return NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2230 | return hdw->controls + idx; |
| 2231 | } |
| 2232 | |
| 2233 | |
| 2234 | /* Retrieve a control handle given its index (0..count-1) */ |
| 2235 | struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_id(struct pvr2_hdw *hdw, |
| 2236 | unsigned int ctl_id) |
| 2237 | { |
| 2238 | struct pvr2_ctrl *cptr; |
| 2239 | unsigned int idx; |
| 2240 | int i; |
| 2241 | |
| 2242 | /* This could be made a lot more efficient, but for now... */ |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2243 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2244 | cptr = hdw->controls + idx; |
| 2245 | i = cptr->info->internal_id; |
| 2246 | if (i && (i == ctl_id)) return cptr; |
| 2247 | } |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2248 | return NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2249 | } |
| 2250 | |
| 2251 | |
Mike Isely | a761f43 | 2006-06-25 20:04:44 -0300 | [diff] [blame] | 2252 | /* Given a V4L ID, retrieve the control structure associated with it. */ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2253 | struct pvr2_ctrl *pvr2_hdw_get_ctrl_v4l(struct pvr2_hdw *hdw,unsigned int ctl_id) |
| 2254 | { |
| 2255 | struct pvr2_ctrl *cptr; |
| 2256 | unsigned int idx; |
| 2257 | int i; |
| 2258 | |
| 2259 | /* This could be made a lot more efficient, but for now... */ |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2260 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2261 | cptr = hdw->controls + idx; |
| 2262 | i = cptr->info->v4l_id; |
| 2263 | if (i && (i == ctl_id)) return cptr; |
| 2264 | } |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2265 | return NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2266 | } |
| 2267 | |
| 2268 | |
Mike Isely | a761f43 | 2006-06-25 20:04:44 -0300 | [diff] [blame] | 2269 | /* Given a V4L ID for its immediate predecessor, retrieve the control |
| 2270 | structure associated with it. */ |
| 2271 | struct pvr2_ctrl *pvr2_hdw_get_ctrl_nextv4l(struct pvr2_hdw *hdw, |
| 2272 | unsigned int ctl_id) |
| 2273 | { |
| 2274 | struct pvr2_ctrl *cptr,*cp2; |
| 2275 | unsigned int idx; |
| 2276 | int i; |
| 2277 | |
| 2278 | /* This could be made a lot more efficient, but for now... */ |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2279 | cp2 = NULL; |
Mike Isely | a761f43 | 2006-06-25 20:04:44 -0300 | [diff] [blame] | 2280 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
| 2281 | cptr = hdw->controls + idx; |
| 2282 | i = cptr->info->v4l_id; |
| 2283 | if (!i) continue; |
| 2284 | if (i <= ctl_id) continue; |
| 2285 | if (cp2 && (cp2->info->v4l_id < i)) continue; |
| 2286 | cp2 = cptr; |
| 2287 | } |
| 2288 | return cp2; |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2289 | return NULL; |
Mike Isely | a761f43 | 2006-06-25 20:04:44 -0300 | [diff] [blame] | 2290 | } |
| 2291 | |
| 2292 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2293 | static const char *get_ctrl_typename(enum pvr2_ctl_type tp) |
| 2294 | { |
| 2295 | switch (tp) { |
| 2296 | case pvr2_ctl_int: return "integer"; |
| 2297 | case pvr2_ctl_enum: return "enum"; |
Mike Isely | 3321396 | 2006-06-25 20:04:40 -0300 | [diff] [blame] | 2298 | case pvr2_ctl_bool: return "boolean"; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2299 | case pvr2_ctl_bitmask: return "bitmask"; |
| 2300 | } |
| 2301 | return ""; |
| 2302 | } |
| 2303 | |
| 2304 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2305 | /* Figure out if we need to commit control changes. If so, mark internal |
| 2306 | state flags to indicate this fact and return true. Otherwise do nothing |
| 2307 | else and return false. */ |
| 2308 | static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2309 | { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2310 | unsigned int idx; |
| 2311 | struct pvr2_ctrl *cptr; |
| 2312 | int value; |
| 2313 | int commit_flag = 0; |
| 2314 | char buf[100]; |
| 2315 | unsigned int bcnt,ccnt; |
| 2316 | |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2317 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2318 | cptr = hdw->controls + idx; |
Al Viro | 5fa1247 | 2008-03-29 03:07:38 +0000 | [diff] [blame] | 2319 | if (!cptr->info->is_dirty) continue; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2320 | if (!cptr->info->is_dirty(cptr)) continue; |
Mike Isely | fe23a28 | 2007-01-20 00:10:55 -0300 | [diff] [blame] | 2321 | commit_flag = !0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2322 | |
Mike Isely | fe23a28 | 2007-01-20 00:10:55 -0300 | [diff] [blame] | 2323 | if (!(pvrusb2_debug & PVR2_TRACE_CTL)) continue; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2324 | bcnt = scnprintf(buf,sizeof(buf),"\"%s\" <-- ", |
| 2325 | cptr->info->name); |
| 2326 | value = 0; |
| 2327 | cptr->info->get_value(cptr,&value); |
| 2328 | pvr2_ctrl_value_to_sym_internal(cptr,~0,value, |
| 2329 | buf+bcnt, |
| 2330 | sizeof(buf)-bcnt,&ccnt); |
| 2331 | bcnt += ccnt; |
| 2332 | bcnt += scnprintf(buf+bcnt,sizeof(buf)-bcnt," <%s>", |
| 2333 | get_ctrl_typename(cptr->info->type)); |
| 2334 | pvr2_trace(PVR2_TRACE_CTL, |
| 2335 | "/*--TRACE_COMMIT--*/ %.*s", |
| 2336 | bcnt,buf); |
| 2337 | } |
| 2338 | |
| 2339 | if (!commit_flag) { |
| 2340 | /* Nothing has changed */ |
| 2341 | return 0; |
| 2342 | } |
| 2343 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2344 | hdw->state_pipeline_config = 0; |
| 2345 | trace_stbit("state_pipeline_config",hdw->state_pipeline_config); |
| 2346 | pvr2_hdw_state_sched(hdw); |
| 2347 | |
| 2348 | return !0; |
| 2349 | } |
| 2350 | |
| 2351 | |
| 2352 | /* Perform all operations needed to commit all control changes. This must |
| 2353 | be performed in synchronization with the pipeline state and is thus |
| 2354 | expected to be called as part of the driver's worker thread. Return |
| 2355 | true if commit successful, otherwise return false to indicate that |
| 2356 | commit isn't possible at this time. */ |
| 2357 | static int pvr2_hdw_commit_execute(struct pvr2_hdw *hdw) |
| 2358 | { |
| 2359 | unsigned int idx; |
| 2360 | struct pvr2_ctrl *cptr; |
| 2361 | int disruptive_change; |
| 2362 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2363 | /* When video standard changes, reset the hres and vres values - |
| 2364 | but if the user has pending changes there, then let the changes |
| 2365 | take priority. */ |
| 2366 | if (hdw->std_dirty) { |
| 2367 | /* Rewrite the vertical resolution to be appropriate to the |
| 2368 | video standard that has been selected. */ |
| 2369 | int nvres; |
| 2370 | if (hdw->std_mask_cur & V4L2_STD_525_60) { |
| 2371 | nvres = 480; |
| 2372 | } else { |
| 2373 | nvres = 576; |
| 2374 | } |
| 2375 | if (nvres != hdw->res_ver_val) { |
| 2376 | hdw->res_ver_val = nvres; |
| 2377 | hdw->res_ver_dirty = !0; |
| 2378 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2379 | } |
| 2380 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2381 | /* If any of the below has changed, then we can't do the update |
| 2382 | while the pipeline is running. Pipeline must be paused first |
| 2383 | and decoder -> encoder connection be made quiescent before we |
| 2384 | can proceed. */ |
| 2385 | disruptive_change = |
| 2386 | (hdw->std_dirty || |
| 2387 | hdw->enc_unsafe_stale || |
| 2388 | hdw->srate_dirty || |
| 2389 | hdw->res_ver_dirty || |
| 2390 | hdw->res_hor_dirty || |
| 2391 | hdw->input_dirty || |
| 2392 | (hdw->active_stream_type != hdw->desired_stream_type)); |
| 2393 | if (disruptive_change && !hdw->state_pipeline_idle) { |
| 2394 | /* Pipeline is not idle; we can't proceed. Arrange to |
| 2395 | cause pipeline to stop so that we can try this again |
| 2396 | later.... */ |
| 2397 | hdw->state_pipeline_pause = !0; |
| 2398 | return 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2399 | } |
| 2400 | |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 2401 | if (hdw->srate_dirty) { |
| 2402 | /* Write new sample rate into control structure since |
| 2403 | * the master copy is stale. We must track srate |
| 2404 | * separate from the mpeg control structure because |
| 2405 | * other logic also uses this value. */ |
| 2406 | struct v4l2_ext_controls cs; |
| 2407 | struct v4l2_ext_control c1; |
| 2408 | memset(&cs,0,sizeof(cs)); |
| 2409 | memset(&c1,0,sizeof(c1)); |
| 2410 | cs.controls = &c1; |
| 2411 | cs.count = 1; |
| 2412 | c1.id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ; |
| 2413 | c1.value = hdw->srate_val; |
Hans Verkuil | 01f1e44 | 2007-08-21 18:32:42 -0300 | [diff] [blame] | 2414 | cx2341x_ext_ctrls(&hdw->enc_ctl_state, 0, &cs,VIDIOC_S_EXT_CTRLS); |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 2415 | } |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2416 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2417 | /* Scan i2c core at this point - before we clear all the dirty |
| 2418 | bits. Various parts of the i2c core will notice dirty bits as |
| 2419 | appropriate and arrange to broadcast or directly send updates to |
| 2420 | the client drivers in order to keep everything in sync */ |
| 2421 | pvr2_i2c_core_check_stale(hdw); |
| 2422 | |
Mike Isely | c05c046 | 2006-06-25 20:04:25 -0300 | [diff] [blame] | 2423 | for (idx = 0; idx < hdw->control_cnt; idx++) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2424 | cptr = hdw->controls + idx; |
| 2425 | if (!cptr->info->clear_dirty) continue; |
| 2426 | cptr->info->clear_dirty(cptr); |
| 2427 | } |
| 2428 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2429 | if (hdw->active_stream_type != hdw->desired_stream_type) { |
| 2430 | /* Handle any side effects of stream config here */ |
| 2431 | hdw->active_stream_type = hdw->desired_stream_type; |
| 2432 | } |
| 2433 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2434 | /* Now execute i2c core update */ |
| 2435 | pvr2_i2c_core_sync(hdw); |
| 2436 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2437 | if (hdw->state_encoder_run) { |
| 2438 | /* If encoder isn't running, then this will get worked out |
| 2439 | later when we start the encoder. */ |
| 2440 | if (pvr2_encoder_adjust(hdw) < 0) return !0; |
| 2441 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2442 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2443 | hdw->state_pipeline_config = !0; |
| 2444 | trace_stbit("state_pipeline_config",hdw->state_pipeline_config); |
| 2445 | return !0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2446 | } |
| 2447 | |
| 2448 | |
| 2449 | int pvr2_hdw_commit_ctl(struct pvr2_hdw *hdw) |
| 2450 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2451 | int fl; |
| 2452 | LOCK_TAKE(hdw->big_lock); |
| 2453 | fl = pvr2_hdw_commit_setup(hdw); |
| 2454 | LOCK_GIVE(hdw->big_lock); |
| 2455 | if (!fl) return 0; |
| 2456 | return pvr2_hdw_wait(hdw,0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2457 | } |
| 2458 | |
| 2459 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2460 | static void pvr2_hdw_worker_i2c(struct work_struct *work) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2461 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2462 | struct pvr2_hdw *hdw = container_of(work,struct pvr2_hdw,worki2csync); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2463 | LOCK_TAKE(hdw->big_lock); do { |
| 2464 | pvr2_i2c_core_sync(hdw); |
| 2465 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 2466 | } |
| 2467 | |
| 2468 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2469 | static void pvr2_hdw_worker_poll(struct work_struct *work) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2470 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2471 | int fl = 0; |
| 2472 | struct pvr2_hdw *hdw = container_of(work,struct pvr2_hdw,workpoll); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2473 | LOCK_TAKE(hdw->big_lock); do { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2474 | fl = pvr2_hdw_state_eval(hdw); |
| 2475 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 2476 | if (fl && hdw->state_func) { |
| 2477 | hdw->state_func(hdw->state_data); |
| 2478 | } |
| 2479 | } |
| 2480 | |
| 2481 | |
| 2482 | static void pvr2_hdw_worker_init(struct work_struct *work) |
| 2483 | { |
| 2484 | struct pvr2_hdw *hdw = container_of(work,struct pvr2_hdw,workinit); |
| 2485 | LOCK_TAKE(hdw->big_lock); do { |
| 2486 | pvr2_hdw_setup(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2487 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 2488 | } |
| 2489 | |
| 2490 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2491 | static int pvr2_hdw_wait(struct pvr2_hdw *hdw,int state) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2492 | { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2493 | return wait_event_interruptible( |
| 2494 | hdw->state_wait_data, |
| 2495 | (hdw->state_stale == 0) && |
| 2496 | (!state || (hdw->master_state != state))); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2497 | } |
| 2498 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2499 | |
| 2500 | void pvr2_hdw_set_state_callback(struct pvr2_hdw *hdw, |
| 2501 | void (*callback_func)(void *), |
| 2502 | void *callback_data) |
| 2503 | { |
| 2504 | LOCK_TAKE(hdw->big_lock); do { |
| 2505 | hdw->state_data = callback_data; |
| 2506 | hdw->state_func = callback_func; |
| 2507 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 2508 | } |
| 2509 | |
| 2510 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2511 | /* Return name for this driver instance */ |
| 2512 | const char *pvr2_hdw_get_driver_name(struct pvr2_hdw *hdw) |
| 2513 | { |
| 2514 | return hdw->name; |
| 2515 | } |
| 2516 | |
| 2517 | |
Mike Isely | 78a4710 | 2007-11-26 01:58:20 -0300 | [diff] [blame] | 2518 | const char *pvr2_hdw_get_desc(struct pvr2_hdw *hdw) |
| 2519 | { |
| 2520 | return hdw->hdw_desc->description; |
| 2521 | } |
| 2522 | |
| 2523 | |
| 2524 | const char *pvr2_hdw_get_type(struct pvr2_hdw *hdw) |
| 2525 | { |
| 2526 | return hdw->hdw_desc->shortname; |
| 2527 | } |
| 2528 | |
| 2529 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2530 | int pvr2_hdw_is_hsm(struct pvr2_hdw *hdw) |
| 2531 | { |
| 2532 | int result; |
| 2533 | LOCK_TAKE(hdw->ctl_lock); do { |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 2534 | hdw->cmd_buffer[0] = FX2CMD_GET_USB_SPEED; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2535 | result = pvr2_send_request(hdw, |
| 2536 | hdw->cmd_buffer,1, |
| 2537 | hdw->cmd_buffer,1); |
| 2538 | if (result < 0) break; |
| 2539 | result = (hdw->cmd_buffer[0] != 0); |
| 2540 | } while(0); LOCK_GIVE(hdw->ctl_lock); |
| 2541 | return result; |
| 2542 | } |
| 2543 | |
| 2544 | |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 2545 | /* Execute poll of tuner status */ |
| 2546 | void pvr2_hdw_execute_tuner_poll(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2547 | { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2548 | LOCK_TAKE(hdw->big_lock); do { |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 2549 | pvr2_i2c_core_status_poll(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2550 | } while (0); LOCK_GIVE(hdw->big_lock); |
Mike Isely | 18103c57 | 2007-01-20 00:09:47 -0300 | [diff] [blame] | 2551 | } |
| 2552 | |
| 2553 | |
| 2554 | /* Return information about the tuner */ |
| 2555 | int pvr2_hdw_get_tuner_status(struct pvr2_hdw *hdw,struct v4l2_tuner *vtp) |
| 2556 | { |
| 2557 | LOCK_TAKE(hdw->big_lock); do { |
| 2558 | if (hdw->tuner_signal_stale) { |
| 2559 | pvr2_i2c_core_status_poll(hdw); |
| 2560 | } |
| 2561 | memcpy(vtp,&hdw->tuner_signal_info,sizeof(struct v4l2_tuner)); |
| 2562 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 2563 | return 0; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2564 | } |
| 2565 | |
| 2566 | |
| 2567 | /* Get handle to video output stream */ |
| 2568 | struct pvr2_stream *pvr2_hdw_get_video_stream(struct pvr2_hdw *hp) |
| 2569 | { |
| 2570 | return hp->vid_stream; |
| 2571 | } |
| 2572 | |
| 2573 | |
| 2574 | void pvr2_hdw_trigger_module_log(struct pvr2_hdw *hdw) |
| 2575 | { |
Mike Isely | 4f1a3e5 | 2006-06-25 20:04:31 -0300 | [diff] [blame] | 2576 | int nr = pvr2_hdw_get_unit_number(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2577 | LOCK_TAKE(hdw->big_lock); do { |
| 2578 | hdw->log_requested = !0; |
Mike Isely | 4f1a3e5 | 2006-06-25 20:04:31 -0300 | [diff] [blame] | 2579 | printk(KERN_INFO "pvrusb2: ================= START STATUS CARD #%d =================\n", nr); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2580 | pvr2_i2c_core_check_stale(hdw); |
| 2581 | hdw->log_requested = 0; |
| 2582 | pvr2_i2c_core_sync(hdw); |
Mike Isely | b30d244 | 2006-06-25 20:05:01 -0300 | [diff] [blame] | 2583 | pvr2_trace(PVR2_TRACE_INFO,"cx2341x config:"); |
Hans Verkuil | 99eb44f | 2006-06-26 18:24:05 -0300 | [diff] [blame] | 2584 | cx2341x_log_status(&hdw->enc_ctl_state, "pvrusb2"); |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2585 | pvr2_hdw_state_log_state(hdw); |
Mike Isely | 4f1a3e5 | 2006-06-25 20:04:31 -0300 | [diff] [blame] | 2586 | printk(KERN_INFO "pvrusb2: ================== END STATUS CARD #%d ==================\n", nr); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2587 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 2588 | } |
| 2589 | |
Mike Isely | 4db666c | 2007-09-08 22:16:27 -0300 | [diff] [blame] | 2590 | |
| 2591 | /* Grab EEPROM contents, needed for direct method. */ |
| 2592 | #define EEPROM_SIZE 8192 |
| 2593 | #define trace_eeprom(...) pvr2_trace(PVR2_TRACE_EEPROM,__VA_ARGS__) |
| 2594 | static u8 *pvr2_full_eeprom_fetch(struct pvr2_hdw *hdw) |
| 2595 | { |
| 2596 | struct i2c_msg msg[2]; |
| 2597 | u8 *eeprom; |
| 2598 | u8 iadd[2]; |
| 2599 | u8 addr; |
| 2600 | u16 eepromSize; |
| 2601 | unsigned int offs; |
| 2602 | int ret; |
| 2603 | int mode16 = 0; |
| 2604 | unsigned pcnt,tcnt; |
| 2605 | eeprom = kmalloc(EEPROM_SIZE,GFP_KERNEL); |
| 2606 | if (!eeprom) { |
| 2607 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2608 | "Failed to allocate memory" |
| 2609 | " required to read eeprom"); |
| 2610 | return NULL; |
| 2611 | } |
| 2612 | |
| 2613 | trace_eeprom("Value for eeprom addr from controller was 0x%x", |
| 2614 | hdw->eeprom_addr); |
| 2615 | addr = hdw->eeprom_addr; |
| 2616 | /* Seems that if the high bit is set, then the *real* eeprom |
| 2617 | address is shifted right now bit position (noticed this in |
| 2618 | newer PVR USB2 hardware) */ |
| 2619 | if (addr & 0x80) addr >>= 1; |
| 2620 | |
| 2621 | /* FX2 documentation states that a 16bit-addressed eeprom is |
| 2622 | expected if the I2C address is an odd number (yeah, this is |
| 2623 | strange but it's what they do) */ |
| 2624 | mode16 = (addr & 1); |
| 2625 | eepromSize = (mode16 ? EEPROM_SIZE : 256); |
| 2626 | trace_eeprom("Examining %d byte eeprom at location 0x%x" |
| 2627 | " using %d bit addressing",eepromSize,addr, |
| 2628 | mode16 ? 16 : 8); |
| 2629 | |
| 2630 | msg[0].addr = addr; |
| 2631 | msg[0].flags = 0; |
| 2632 | msg[0].len = mode16 ? 2 : 1; |
| 2633 | msg[0].buf = iadd; |
| 2634 | msg[1].addr = addr; |
| 2635 | msg[1].flags = I2C_M_RD; |
| 2636 | |
| 2637 | /* We have to do the actual eeprom data fetch ourselves, because |
| 2638 | (1) we're only fetching part of the eeprom, and (2) if we were |
| 2639 | getting the whole thing our I2C driver can't grab it in one |
| 2640 | pass - which is what tveeprom is otherwise going to attempt */ |
| 2641 | memset(eeprom,0,EEPROM_SIZE); |
| 2642 | for (tcnt = 0; tcnt < EEPROM_SIZE; tcnt += pcnt) { |
| 2643 | pcnt = 16; |
| 2644 | if (pcnt + tcnt > EEPROM_SIZE) pcnt = EEPROM_SIZE-tcnt; |
| 2645 | offs = tcnt + (eepromSize - EEPROM_SIZE); |
| 2646 | if (mode16) { |
| 2647 | iadd[0] = offs >> 8; |
| 2648 | iadd[1] = offs; |
| 2649 | } else { |
| 2650 | iadd[0] = offs; |
| 2651 | } |
| 2652 | msg[1].len = pcnt; |
| 2653 | msg[1].buf = eeprom+tcnt; |
| 2654 | if ((ret = i2c_transfer(&hdw->i2c_adap, |
| 2655 | msg,ARRAY_SIZE(msg))) != 2) { |
| 2656 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2657 | "eeprom fetch set offs err=%d",ret); |
| 2658 | kfree(eeprom); |
| 2659 | return NULL; |
| 2660 | } |
| 2661 | } |
| 2662 | return eeprom; |
| 2663 | } |
| 2664 | |
| 2665 | |
| 2666 | void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *hdw, |
| 2667 | int prom_flag, |
| 2668 | int enable_flag) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2669 | { |
| 2670 | int ret; |
| 2671 | u16 address; |
| 2672 | unsigned int pipe; |
| 2673 | LOCK_TAKE(hdw->big_lock); do { |
Al Viro | 5fa1247 | 2008-03-29 03:07:38 +0000 | [diff] [blame] | 2674 | if ((hdw->fw_buffer == NULL) == !enable_flag) break; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2675 | |
| 2676 | if (!enable_flag) { |
| 2677 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 2678 | "Cleaning up after CPU firmware fetch"); |
| 2679 | kfree(hdw->fw_buffer); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 2680 | hdw->fw_buffer = NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2681 | hdw->fw_size = 0; |
Mike Isely | 4db666c | 2007-09-08 22:16:27 -0300 | [diff] [blame] | 2682 | if (hdw->fw_cpu_flag) { |
| 2683 | /* Now release the CPU. It will disconnect |
| 2684 | and reconnect later. */ |
| 2685 | pvr2_hdw_cpureset_assert(hdw,0); |
| 2686 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2687 | break; |
| 2688 | } |
| 2689 | |
Mike Isely | 4db666c | 2007-09-08 22:16:27 -0300 | [diff] [blame] | 2690 | hdw->fw_cpu_flag = (prom_flag == 0); |
| 2691 | if (hdw->fw_cpu_flag) { |
| 2692 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 2693 | "Preparing to suck out CPU firmware"); |
| 2694 | hdw->fw_size = 0x2000; |
| 2695 | hdw->fw_buffer = kzalloc(hdw->fw_size,GFP_KERNEL); |
| 2696 | if (!hdw->fw_buffer) { |
| 2697 | hdw->fw_size = 0; |
| 2698 | break; |
| 2699 | } |
| 2700 | |
| 2701 | /* We have to hold the CPU during firmware upload. */ |
| 2702 | pvr2_hdw_cpureset_assert(hdw,1); |
| 2703 | |
| 2704 | /* download the firmware from address 0000-1fff in 2048 |
| 2705 | (=0x800) bytes chunk. */ |
| 2706 | |
| 2707 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 2708 | "Grabbing CPU firmware"); |
| 2709 | pipe = usb_rcvctrlpipe(hdw->usb_dev, 0); |
| 2710 | for(address = 0; address < hdw->fw_size; |
| 2711 | address += 0x800) { |
| 2712 | ret = usb_control_msg(hdw->usb_dev,pipe, |
| 2713 | 0xa0,0xc0, |
| 2714 | address,0, |
| 2715 | hdw->fw_buffer+address, |
| 2716 | 0x800,HZ); |
| 2717 | if (ret < 0) break; |
| 2718 | } |
| 2719 | |
| 2720 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 2721 | "Done grabbing CPU firmware"); |
| 2722 | } else { |
| 2723 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 2724 | "Sucking down EEPROM contents"); |
| 2725 | hdw->fw_buffer = pvr2_full_eeprom_fetch(hdw); |
| 2726 | if (!hdw->fw_buffer) { |
| 2727 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 2728 | "EEPROM content suck failed."); |
| 2729 | break; |
| 2730 | } |
| 2731 | hdw->fw_size = EEPROM_SIZE; |
| 2732 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 2733 | "Done sucking down EEPROM contents"); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2734 | } |
| 2735 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2736 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 2737 | } |
| 2738 | |
| 2739 | |
| 2740 | /* Return true if we're in a mode for retrieval CPU firmware */ |
| 2741 | int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw *hdw) |
| 2742 | { |
Al Viro | 5fa1247 | 2008-03-29 03:07:38 +0000 | [diff] [blame] | 2743 | return hdw->fw_buffer != NULL; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2744 | } |
| 2745 | |
| 2746 | |
| 2747 | int pvr2_hdw_cpufw_get(struct pvr2_hdw *hdw,unsigned int offs, |
| 2748 | char *buf,unsigned int cnt) |
| 2749 | { |
| 2750 | int ret = -EINVAL; |
| 2751 | LOCK_TAKE(hdw->big_lock); do { |
| 2752 | if (!buf) break; |
| 2753 | if (!cnt) break; |
| 2754 | |
| 2755 | if (!hdw->fw_buffer) { |
| 2756 | ret = -EIO; |
| 2757 | break; |
| 2758 | } |
| 2759 | |
| 2760 | if (offs >= hdw->fw_size) { |
| 2761 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 2762 | "Read firmware data offs=%d EOF", |
| 2763 | offs); |
| 2764 | ret = 0; |
| 2765 | break; |
| 2766 | } |
| 2767 | |
| 2768 | if (offs + cnt > hdw->fw_size) cnt = hdw->fw_size - offs; |
| 2769 | |
| 2770 | memcpy(buf,hdw->fw_buffer+offs,cnt); |
| 2771 | |
| 2772 | pvr2_trace(PVR2_TRACE_FIRMWARE, |
| 2773 | "Read firmware data offs=%d cnt=%d", |
| 2774 | offs,cnt); |
| 2775 | ret = cnt; |
| 2776 | } while (0); LOCK_GIVE(hdw->big_lock); |
| 2777 | |
| 2778 | return ret; |
| 2779 | } |
| 2780 | |
| 2781 | |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 2782 | int pvr2_hdw_v4l_get_minor_number(struct pvr2_hdw *hdw, |
Mike Isely | 8079384 | 2006-12-27 23:12:28 -0300 | [diff] [blame] | 2783 | enum pvr2_v4l_type index) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2784 | { |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 2785 | switch (index) { |
Mike Isely | 8079384 | 2006-12-27 23:12:28 -0300 | [diff] [blame] | 2786 | case pvr2_v4l_type_video: return hdw->v4l_minor_number_video; |
| 2787 | case pvr2_v4l_type_vbi: return hdw->v4l_minor_number_vbi; |
| 2788 | case pvr2_v4l_type_radio: return hdw->v4l_minor_number_radio; |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 2789 | default: return -1; |
| 2790 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2791 | } |
| 2792 | |
| 2793 | |
Pantelis Koukousoulas | 2fdf3d9 | 2006-12-27 23:07:58 -0300 | [diff] [blame] | 2794 | /* Store a v4l minor device number */ |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 2795 | void pvr2_hdw_v4l_store_minor_number(struct pvr2_hdw *hdw, |
Mike Isely | 8079384 | 2006-12-27 23:12:28 -0300 | [diff] [blame] | 2796 | enum pvr2_v4l_type index,int v) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2797 | { |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 2798 | switch (index) { |
Mike Isely | 8079384 | 2006-12-27 23:12:28 -0300 | [diff] [blame] | 2799 | case pvr2_v4l_type_video: hdw->v4l_minor_number_video = v; |
| 2800 | case pvr2_v4l_type_vbi: hdw->v4l_minor_number_vbi = v; |
| 2801 | case pvr2_v4l_type_radio: hdw->v4l_minor_number_radio = v; |
Mike Isely | fd5a75f | 2006-12-27 23:11:22 -0300 | [diff] [blame] | 2802 | default: break; |
| 2803 | } |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2804 | } |
| 2805 | |
| 2806 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 2807 | static void pvr2_ctl_write_complete(struct urb *urb) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2808 | { |
| 2809 | struct pvr2_hdw *hdw = urb->context; |
| 2810 | hdw->ctl_write_pend_flag = 0; |
| 2811 | if (hdw->ctl_read_pend_flag) return; |
| 2812 | complete(&hdw->ctl_done); |
| 2813 | } |
| 2814 | |
| 2815 | |
David Howells | 7d12e78 | 2006-10-05 14:55:46 +0100 | [diff] [blame] | 2816 | static void pvr2_ctl_read_complete(struct urb *urb) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2817 | { |
| 2818 | struct pvr2_hdw *hdw = urb->context; |
| 2819 | hdw->ctl_read_pend_flag = 0; |
| 2820 | if (hdw->ctl_write_pend_flag) return; |
| 2821 | complete(&hdw->ctl_done); |
| 2822 | } |
| 2823 | |
| 2824 | |
| 2825 | static void pvr2_ctl_timeout(unsigned long data) |
| 2826 | { |
| 2827 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; |
| 2828 | if (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) { |
| 2829 | hdw->ctl_timeout_flag = !0; |
Mariusz Kozlowski | 5e55d2c | 2006-11-08 15:34:31 +0100 | [diff] [blame] | 2830 | if (hdw->ctl_write_pend_flag) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2831 | usb_unlink_urb(hdw->ctl_write_urb); |
Mariusz Kozlowski | 5e55d2c | 2006-11-08 15:34:31 +0100 | [diff] [blame] | 2832 | if (hdw->ctl_read_pend_flag) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2833 | usb_unlink_urb(hdw->ctl_read_urb); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2834 | } |
| 2835 | } |
| 2836 | |
| 2837 | |
Mike Isely | e61b6fc | 2006-07-18 22:42:18 -0300 | [diff] [blame] | 2838 | /* Issue a command and get a response from the device. This extended |
| 2839 | version includes a probe flag (which if set means that device errors |
| 2840 | should not be logged or treated as fatal) and a timeout in jiffies. |
| 2841 | This can be used to non-lethally probe the health of endpoint 1. */ |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 2842 | static int pvr2_send_request_ex(struct pvr2_hdw *hdw, |
| 2843 | unsigned int timeout,int probe_fl, |
| 2844 | void *write_data,unsigned int write_len, |
| 2845 | void *read_data,unsigned int read_len) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2846 | { |
| 2847 | unsigned int idx; |
| 2848 | int status = 0; |
| 2849 | struct timer_list timer; |
| 2850 | if (!hdw->ctl_lock_held) { |
| 2851 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2852 | "Attempted to execute control transfer" |
| 2853 | " without lock!!"); |
| 2854 | return -EDEADLK; |
| 2855 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 2856 | if (!hdw->flag_ok && !probe_fl) { |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 2857 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2858 | "Attempted to execute control transfer" |
| 2859 | " when device not ok"); |
| 2860 | return -EIO; |
| 2861 | } |
| 2862 | if (!(hdw->ctl_read_urb && hdw->ctl_write_urb)) { |
| 2863 | if (!probe_fl) { |
| 2864 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2865 | "Attempted to execute control transfer" |
| 2866 | " when USB is disconnected"); |
| 2867 | } |
| 2868 | return -ENOTTY; |
| 2869 | } |
| 2870 | |
| 2871 | /* Ensure that we have sane parameters */ |
| 2872 | if (!write_data) write_len = 0; |
| 2873 | if (!read_data) read_len = 0; |
| 2874 | if (write_len > PVR2_CTL_BUFFSIZE) { |
| 2875 | pvr2_trace( |
| 2876 | PVR2_TRACE_ERROR_LEGS, |
| 2877 | "Attempted to execute %d byte" |
| 2878 | " control-write transfer (limit=%d)", |
| 2879 | write_len,PVR2_CTL_BUFFSIZE); |
| 2880 | return -EINVAL; |
| 2881 | } |
| 2882 | if (read_len > PVR2_CTL_BUFFSIZE) { |
| 2883 | pvr2_trace( |
| 2884 | PVR2_TRACE_ERROR_LEGS, |
| 2885 | "Attempted to execute %d byte" |
| 2886 | " control-read transfer (limit=%d)", |
| 2887 | write_len,PVR2_CTL_BUFFSIZE); |
| 2888 | return -EINVAL; |
| 2889 | } |
| 2890 | if ((!write_len) && (!read_len)) { |
| 2891 | pvr2_trace( |
| 2892 | PVR2_TRACE_ERROR_LEGS, |
| 2893 | "Attempted to execute null control transfer?"); |
| 2894 | return -EINVAL; |
| 2895 | } |
| 2896 | |
| 2897 | |
| 2898 | hdw->cmd_debug_state = 1; |
| 2899 | if (write_len) { |
| 2900 | hdw->cmd_debug_code = ((unsigned char *)write_data)[0]; |
| 2901 | } else { |
| 2902 | hdw->cmd_debug_code = 0; |
| 2903 | } |
| 2904 | hdw->cmd_debug_write_len = write_len; |
| 2905 | hdw->cmd_debug_read_len = read_len; |
| 2906 | |
| 2907 | /* Initialize common stuff */ |
| 2908 | init_completion(&hdw->ctl_done); |
| 2909 | hdw->ctl_timeout_flag = 0; |
| 2910 | hdw->ctl_write_pend_flag = 0; |
| 2911 | hdw->ctl_read_pend_flag = 0; |
| 2912 | init_timer(&timer); |
| 2913 | timer.expires = jiffies + timeout; |
| 2914 | timer.data = (unsigned long)hdw; |
| 2915 | timer.function = pvr2_ctl_timeout; |
| 2916 | |
| 2917 | if (write_len) { |
| 2918 | hdw->cmd_debug_state = 2; |
| 2919 | /* Transfer write data to internal buffer */ |
| 2920 | for (idx = 0; idx < write_len; idx++) { |
| 2921 | hdw->ctl_write_buffer[idx] = |
| 2922 | ((unsigned char *)write_data)[idx]; |
| 2923 | } |
| 2924 | /* Initiate a write request */ |
| 2925 | usb_fill_bulk_urb(hdw->ctl_write_urb, |
| 2926 | hdw->usb_dev, |
| 2927 | usb_sndbulkpipe(hdw->usb_dev, |
| 2928 | PVR2_CTL_WRITE_ENDPOINT), |
| 2929 | hdw->ctl_write_buffer, |
| 2930 | write_len, |
| 2931 | pvr2_ctl_write_complete, |
| 2932 | hdw); |
| 2933 | hdw->ctl_write_urb->actual_length = 0; |
| 2934 | hdw->ctl_write_pend_flag = !0; |
| 2935 | status = usb_submit_urb(hdw->ctl_write_urb,GFP_KERNEL); |
| 2936 | if (status < 0) { |
| 2937 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2938 | "Failed to submit write-control" |
| 2939 | " URB status=%d",status); |
| 2940 | hdw->ctl_write_pend_flag = 0; |
| 2941 | goto done; |
| 2942 | } |
| 2943 | } |
| 2944 | |
| 2945 | if (read_len) { |
| 2946 | hdw->cmd_debug_state = 3; |
| 2947 | memset(hdw->ctl_read_buffer,0x43,read_len); |
| 2948 | /* Initiate a read request */ |
| 2949 | usb_fill_bulk_urb(hdw->ctl_read_urb, |
| 2950 | hdw->usb_dev, |
| 2951 | usb_rcvbulkpipe(hdw->usb_dev, |
| 2952 | PVR2_CTL_READ_ENDPOINT), |
| 2953 | hdw->ctl_read_buffer, |
| 2954 | read_len, |
| 2955 | pvr2_ctl_read_complete, |
| 2956 | hdw); |
| 2957 | hdw->ctl_read_urb->actual_length = 0; |
| 2958 | hdw->ctl_read_pend_flag = !0; |
| 2959 | status = usb_submit_urb(hdw->ctl_read_urb,GFP_KERNEL); |
| 2960 | if (status < 0) { |
| 2961 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2962 | "Failed to submit read-control" |
| 2963 | " URB status=%d",status); |
| 2964 | hdw->ctl_read_pend_flag = 0; |
| 2965 | goto done; |
| 2966 | } |
| 2967 | } |
| 2968 | |
| 2969 | /* Start timer */ |
| 2970 | add_timer(&timer); |
| 2971 | |
| 2972 | /* Now wait for all I/O to complete */ |
| 2973 | hdw->cmd_debug_state = 4; |
| 2974 | while (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) { |
| 2975 | wait_for_completion(&hdw->ctl_done); |
| 2976 | } |
| 2977 | hdw->cmd_debug_state = 5; |
| 2978 | |
| 2979 | /* Stop timer */ |
| 2980 | del_timer_sync(&timer); |
| 2981 | |
| 2982 | hdw->cmd_debug_state = 6; |
| 2983 | status = 0; |
| 2984 | |
| 2985 | if (hdw->ctl_timeout_flag) { |
| 2986 | status = -ETIMEDOUT; |
| 2987 | if (!probe_fl) { |
| 2988 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 2989 | "Timed out control-write"); |
| 2990 | } |
| 2991 | goto done; |
| 2992 | } |
| 2993 | |
| 2994 | if (write_len) { |
| 2995 | /* Validate results of write request */ |
| 2996 | if ((hdw->ctl_write_urb->status != 0) && |
| 2997 | (hdw->ctl_write_urb->status != -ENOENT) && |
| 2998 | (hdw->ctl_write_urb->status != -ESHUTDOWN) && |
| 2999 | (hdw->ctl_write_urb->status != -ECONNRESET)) { |
| 3000 | /* USB subsystem is reporting some kind of failure |
| 3001 | on the write */ |
| 3002 | status = hdw->ctl_write_urb->status; |
| 3003 | if (!probe_fl) { |
| 3004 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3005 | "control-write URB failure," |
| 3006 | " status=%d", |
| 3007 | status); |
| 3008 | } |
| 3009 | goto done; |
| 3010 | } |
| 3011 | if (hdw->ctl_write_urb->actual_length < write_len) { |
| 3012 | /* Failed to write enough data */ |
| 3013 | status = -EIO; |
| 3014 | if (!probe_fl) { |
| 3015 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3016 | "control-write URB short," |
| 3017 | " expected=%d got=%d", |
| 3018 | write_len, |
| 3019 | hdw->ctl_write_urb->actual_length); |
| 3020 | } |
| 3021 | goto done; |
| 3022 | } |
| 3023 | } |
| 3024 | if (read_len) { |
| 3025 | /* Validate results of read request */ |
| 3026 | if ((hdw->ctl_read_urb->status != 0) && |
| 3027 | (hdw->ctl_read_urb->status != -ENOENT) && |
| 3028 | (hdw->ctl_read_urb->status != -ESHUTDOWN) && |
| 3029 | (hdw->ctl_read_urb->status != -ECONNRESET)) { |
| 3030 | /* USB subsystem is reporting some kind of failure |
| 3031 | on the read */ |
| 3032 | status = hdw->ctl_read_urb->status; |
| 3033 | if (!probe_fl) { |
| 3034 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3035 | "control-read URB failure," |
| 3036 | " status=%d", |
| 3037 | status); |
| 3038 | } |
| 3039 | goto done; |
| 3040 | } |
| 3041 | if (hdw->ctl_read_urb->actual_length < read_len) { |
| 3042 | /* Failed to read enough data */ |
| 3043 | status = -EIO; |
| 3044 | if (!probe_fl) { |
| 3045 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3046 | "control-read URB short," |
| 3047 | " expected=%d got=%d", |
| 3048 | read_len, |
| 3049 | hdw->ctl_read_urb->actual_length); |
| 3050 | } |
| 3051 | goto done; |
| 3052 | } |
| 3053 | /* Transfer retrieved data out from internal buffer */ |
| 3054 | for (idx = 0; idx < read_len; idx++) { |
| 3055 | ((unsigned char *)read_data)[idx] = |
| 3056 | hdw->ctl_read_buffer[idx]; |
| 3057 | } |
| 3058 | } |
| 3059 | |
| 3060 | done: |
| 3061 | |
| 3062 | hdw->cmd_debug_state = 0; |
| 3063 | if ((status < 0) && (!probe_fl)) { |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3064 | pvr2_hdw_render_useless(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3065 | } |
| 3066 | return status; |
| 3067 | } |
| 3068 | |
| 3069 | |
| 3070 | int pvr2_send_request(struct pvr2_hdw *hdw, |
| 3071 | void *write_data,unsigned int write_len, |
| 3072 | void *read_data,unsigned int read_len) |
| 3073 | { |
| 3074 | return pvr2_send_request_ex(hdw,HZ*4,0, |
| 3075 | write_data,write_len, |
| 3076 | read_data,read_len); |
| 3077 | } |
| 3078 | |
| 3079 | int pvr2_write_register(struct pvr2_hdw *hdw, u16 reg, u32 data) |
| 3080 | { |
| 3081 | int ret; |
| 3082 | |
| 3083 | LOCK_TAKE(hdw->ctl_lock); |
| 3084 | |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 3085 | hdw->cmd_buffer[0] = FX2CMD_REG_WRITE; /* write register prefix */ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3086 | PVR2_DECOMPOSE_LE(hdw->cmd_buffer,1,data); |
| 3087 | hdw->cmd_buffer[5] = 0; |
| 3088 | hdw->cmd_buffer[6] = (reg >> 8) & 0xff; |
| 3089 | hdw->cmd_buffer[7] = reg & 0xff; |
| 3090 | |
| 3091 | |
| 3092 | ret = pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 0); |
| 3093 | |
| 3094 | LOCK_GIVE(hdw->ctl_lock); |
| 3095 | |
| 3096 | return ret; |
| 3097 | } |
| 3098 | |
| 3099 | |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 3100 | static int pvr2_read_register(struct pvr2_hdw *hdw, u16 reg, u32 *data) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3101 | { |
| 3102 | int ret = 0; |
| 3103 | |
| 3104 | LOCK_TAKE(hdw->ctl_lock); |
| 3105 | |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 3106 | hdw->cmd_buffer[0] = FX2CMD_REG_READ; /* read register prefix */ |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3107 | hdw->cmd_buffer[1] = 0; |
| 3108 | hdw->cmd_buffer[2] = 0; |
| 3109 | hdw->cmd_buffer[3] = 0; |
| 3110 | hdw->cmd_buffer[4] = 0; |
| 3111 | hdw->cmd_buffer[5] = 0; |
| 3112 | hdw->cmd_buffer[6] = (reg >> 8) & 0xff; |
| 3113 | hdw->cmd_buffer[7] = reg & 0xff; |
| 3114 | |
| 3115 | ret |= pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 4); |
| 3116 | *data = PVR2_COMPOSE_LE(hdw->cmd_buffer,0); |
| 3117 | |
| 3118 | LOCK_GIVE(hdw->ctl_lock); |
| 3119 | |
| 3120 | return ret; |
| 3121 | } |
| 3122 | |
| 3123 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3124 | void pvr2_hdw_render_useless(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3125 | { |
| 3126 | if (!hdw->flag_ok) return; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3127 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3128 | "Device being rendered inoperable"); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3129 | if (hdw->vid_stream) { |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 3130 | pvr2_stream_setup(hdw->vid_stream,NULL,0,0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3131 | } |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3132 | hdw->flag_ok = 0; |
| 3133 | trace_stbit("flag_ok",hdw->flag_ok); |
| 3134 | pvr2_hdw_state_sched(hdw); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3135 | } |
| 3136 | |
| 3137 | |
| 3138 | void pvr2_hdw_device_reset(struct pvr2_hdw *hdw) |
| 3139 | { |
| 3140 | int ret; |
| 3141 | pvr2_trace(PVR2_TRACE_INIT,"Performing a device reset..."); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 3142 | ret = usb_lock_device_for_reset(hdw->usb_dev,NULL); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3143 | if (ret == 1) { |
| 3144 | ret = usb_reset_device(hdw->usb_dev); |
| 3145 | usb_unlock_device(hdw->usb_dev); |
| 3146 | } else { |
| 3147 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3148 | "Failed to lock USB device ret=%d",ret); |
| 3149 | } |
| 3150 | if (init_pause_msec) { |
| 3151 | pvr2_trace(PVR2_TRACE_INFO, |
| 3152 | "Waiting %u msec for hardware to settle", |
| 3153 | init_pause_msec); |
| 3154 | msleep(init_pause_msec); |
| 3155 | } |
| 3156 | |
| 3157 | } |
| 3158 | |
| 3159 | |
| 3160 | void pvr2_hdw_cpureset_assert(struct pvr2_hdw *hdw,int val) |
| 3161 | { |
| 3162 | char da[1]; |
| 3163 | unsigned int pipe; |
| 3164 | int ret; |
| 3165 | |
| 3166 | if (!hdw->usb_dev) return; |
| 3167 | |
| 3168 | pvr2_trace(PVR2_TRACE_INIT,"cpureset_assert(%d)",val); |
| 3169 | |
| 3170 | da[0] = val ? 0x01 : 0x00; |
| 3171 | |
| 3172 | /* Write the CPUCS register on the 8051. The lsb of the register |
| 3173 | is the reset bit; a 1 asserts reset while a 0 clears it. */ |
| 3174 | pipe = usb_sndctrlpipe(hdw->usb_dev, 0); |
| 3175 | ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0x40,0xe600,0,da,1,HZ); |
| 3176 | if (ret < 0) { |
| 3177 | pvr2_trace(PVR2_TRACE_ERROR_LEGS, |
| 3178 | "cpureset_assert(%d) error=%d",val,ret); |
| 3179 | pvr2_hdw_render_useless(hdw); |
| 3180 | } |
| 3181 | } |
| 3182 | |
| 3183 | |
| 3184 | int pvr2_hdw_cmd_deep_reset(struct pvr2_hdw *hdw) |
| 3185 | { |
| 3186 | int status; |
| 3187 | LOCK_TAKE(hdw->ctl_lock); do { |
| 3188 | pvr2_trace(PVR2_TRACE_INIT,"Requesting uproc hard reset"); |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 3189 | hdw->cmd_buffer[0] = FX2CMD_DEEP_RESET; |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 3190 | status = pvr2_send_request(hdw,hdw->cmd_buffer,1,NULL,0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3191 | } while (0); LOCK_GIVE(hdw->ctl_lock); |
| 3192 | return status; |
| 3193 | } |
| 3194 | |
| 3195 | |
Michael Krufky | e1edb19 | 2008-04-22 14:45:39 -0300 | [diff] [blame^] | 3196 | static int pvr2_hdw_cmd_power_ctrl(struct pvr2_hdw *hdw, int onoff) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3197 | { |
| 3198 | int status; |
| 3199 | LOCK_TAKE(hdw->ctl_lock); do { |
Michael Krufky | e1edb19 | 2008-04-22 14:45:39 -0300 | [diff] [blame^] | 3200 | if (onoff) { |
| 3201 | pvr2_trace(PVR2_TRACE_INIT, "Requesting powerup"); |
| 3202 | hdw->cmd_buffer[0] = FX2CMD_POWER_ON; |
| 3203 | } else { |
| 3204 | pvr2_trace(PVR2_TRACE_INIT, "Requesting powerdown"); |
| 3205 | hdw->cmd_buffer[0] = FX2CMD_POWER_OFF; |
| 3206 | } |
| 3207 | status = pvr2_send_request(hdw, hdw->cmd_buffer, 1, NULL, 0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3208 | } while (0); LOCK_GIVE(hdw->ctl_lock); |
| 3209 | return status; |
| 3210 | } |
| 3211 | |
Michael Krufky | e1edb19 | 2008-04-22 14:45:39 -0300 | [diff] [blame^] | 3212 | int pvr2_hdw_cmd_powerup(struct pvr2_hdw *hdw) |
| 3213 | { |
| 3214 | return pvr2_hdw_cmd_power_ctrl(hdw, 1); |
| 3215 | } |
| 3216 | |
| 3217 | int pvr2_hdw_cmd_powerdown(struct pvr2_hdw *hdw) |
| 3218 | { |
| 3219 | return pvr2_hdw_cmd_power_ctrl(hdw, 0); |
| 3220 | } |
| 3221 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3222 | |
| 3223 | int pvr2_hdw_cmd_decoder_reset(struct pvr2_hdw *hdw) |
| 3224 | { |
| 3225 | if (!hdw->decoder_ctrl) { |
| 3226 | pvr2_trace(PVR2_TRACE_INIT, |
| 3227 | "Unable to reset decoder: nothing attached"); |
| 3228 | return -ENOTTY; |
| 3229 | } |
| 3230 | |
| 3231 | if (!hdw->decoder_ctrl->force_reset) { |
| 3232 | pvr2_trace(PVR2_TRACE_INIT, |
| 3233 | "Unable to reset decoder: not implemented"); |
| 3234 | return -ENOTTY; |
| 3235 | } |
| 3236 | |
| 3237 | pvr2_trace(PVR2_TRACE_INIT, |
| 3238 | "Requesting decoder reset"); |
| 3239 | hdw->decoder_ctrl->force_reset(hdw->decoder_ctrl->ctxt); |
| 3240 | return 0; |
| 3241 | } |
| 3242 | |
| 3243 | |
Mike Isely | e61b6fc | 2006-07-18 22:42:18 -0300 | [diff] [blame] | 3244 | /* Stop / start video stream transport */ |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 3245 | static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3246 | { |
| 3247 | int status; |
| 3248 | LOCK_TAKE(hdw->ctl_lock); do { |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 3249 | hdw->cmd_buffer[0] = |
| 3250 | (runFl ? FX2CMD_STREAMING_ON : FX2CMD_STREAMING_OFF); |
Mike Isely | a0fd1cb | 2006-06-30 11:35:28 -0300 | [diff] [blame] | 3251 | status = pvr2_send_request(hdw,hdw->cmd_buffer,1,NULL,0); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3252 | } while (0); LOCK_GIVE(hdw->ctl_lock); |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3253 | return status; |
| 3254 | } |
| 3255 | |
| 3256 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3257 | /* Evaluate whether or not state_encoder_ok can change */ |
| 3258 | static int state_eval_encoder_ok(struct pvr2_hdw *hdw) |
| 3259 | { |
| 3260 | if (hdw->state_encoder_ok) return 0; |
| 3261 | if (hdw->flag_tripped) return 0; |
| 3262 | if (hdw->state_encoder_run) return 0; |
| 3263 | if (hdw->state_encoder_config) return 0; |
| 3264 | if (hdw->state_decoder_run) return 0; |
| 3265 | if (hdw->state_usbstream_run) return 0; |
| 3266 | if (pvr2_upload_firmware2(hdw) < 0) { |
| 3267 | hdw->flag_tripped = !0; |
| 3268 | trace_stbit("flag_tripped",hdw->flag_tripped); |
| 3269 | return !0; |
| 3270 | } |
| 3271 | hdw->state_encoder_ok = !0; |
| 3272 | trace_stbit("state_encoder_ok",hdw->state_encoder_ok); |
| 3273 | return !0; |
| 3274 | } |
| 3275 | |
| 3276 | |
| 3277 | /* Evaluate whether or not state_encoder_config can change */ |
| 3278 | static int state_eval_encoder_config(struct pvr2_hdw *hdw) |
| 3279 | { |
| 3280 | if (hdw->state_encoder_config) { |
| 3281 | if (hdw->state_encoder_ok) { |
| 3282 | if (hdw->state_pipeline_req && |
| 3283 | !hdw->state_pipeline_pause) return 0; |
| 3284 | } |
| 3285 | hdw->state_encoder_config = 0; |
| 3286 | hdw->state_encoder_waitok = 0; |
| 3287 | trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok); |
| 3288 | /* paranoia - solve race if timer just completed */ |
| 3289 | del_timer_sync(&hdw->encoder_wait_timer); |
| 3290 | } else { |
| 3291 | if (!hdw->state_encoder_ok || |
| 3292 | !hdw->state_pipeline_idle || |
| 3293 | hdw->state_pipeline_pause || |
| 3294 | !hdw->state_pipeline_req || |
| 3295 | !hdw->state_pipeline_config) { |
| 3296 | /* We must reset the enforced wait interval if |
| 3297 | anything has happened that might have disturbed |
| 3298 | the encoder. This should be a rare case. */ |
| 3299 | if (timer_pending(&hdw->encoder_wait_timer)) { |
| 3300 | del_timer_sync(&hdw->encoder_wait_timer); |
| 3301 | } |
| 3302 | if (hdw->state_encoder_waitok) { |
| 3303 | /* Must clear the state - therefore we did |
| 3304 | something to a state bit and must also |
| 3305 | return true. */ |
| 3306 | hdw->state_encoder_waitok = 0; |
| 3307 | trace_stbit("state_encoder_waitok", |
| 3308 | hdw->state_encoder_waitok); |
| 3309 | return !0; |
| 3310 | } |
| 3311 | return 0; |
| 3312 | } |
| 3313 | if (!hdw->state_encoder_waitok) { |
| 3314 | if (!timer_pending(&hdw->encoder_wait_timer)) { |
| 3315 | /* waitok flag wasn't set and timer isn't |
| 3316 | running. Check flag once more to avoid |
| 3317 | a race then start the timer. This is |
| 3318 | the point when we measure out a minimal |
| 3319 | quiet interval before doing something to |
| 3320 | the encoder. */ |
| 3321 | if (!hdw->state_encoder_waitok) { |
| 3322 | hdw->encoder_wait_timer.expires = |
| 3323 | jiffies + (HZ*50/1000); |
| 3324 | add_timer(&hdw->encoder_wait_timer); |
| 3325 | } |
| 3326 | } |
| 3327 | /* We can't continue until we know we have been |
| 3328 | quiet for the interval measured by this |
| 3329 | timer. */ |
| 3330 | return 0; |
| 3331 | } |
| 3332 | pvr2_encoder_configure(hdw); |
| 3333 | if (hdw->state_encoder_ok) hdw->state_encoder_config = !0; |
| 3334 | } |
| 3335 | trace_stbit("state_encoder_config",hdw->state_encoder_config); |
| 3336 | return !0; |
| 3337 | } |
| 3338 | |
| 3339 | |
| 3340 | /* Evaluate whether or not state_encoder_run can change */ |
| 3341 | static int state_eval_encoder_run(struct pvr2_hdw *hdw) |
| 3342 | { |
| 3343 | if (hdw->state_encoder_run) { |
| 3344 | if (hdw->state_encoder_ok) { |
| 3345 | if (hdw->state_decoder_run) return 0; |
| 3346 | if (pvr2_encoder_stop(hdw) < 0) return !0; |
| 3347 | } |
| 3348 | hdw->state_encoder_run = 0; |
| 3349 | } else { |
| 3350 | if (!hdw->state_encoder_ok) return 0; |
| 3351 | if (!hdw->state_decoder_run) return 0; |
| 3352 | if (pvr2_encoder_start(hdw) < 0) return !0; |
| 3353 | hdw->state_encoder_run = !0; |
| 3354 | } |
| 3355 | trace_stbit("state_encoder_run",hdw->state_encoder_run); |
| 3356 | return !0; |
| 3357 | } |
| 3358 | |
| 3359 | |
| 3360 | /* Timeout function for quiescent timer. */ |
| 3361 | static void pvr2_hdw_quiescent_timeout(unsigned long data) |
| 3362 | { |
| 3363 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; |
| 3364 | hdw->state_decoder_quiescent = !0; |
| 3365 | trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent); |
| 3366 | hdw->state_stale = !0; |
| 3367 | queue_work(hdw->workqueue,&hdw->workpoll); |
| 3368 | } |
| 3369 | |
| 3370 | |
| 3371 | /* Timeout function for encoder wait timer. */ |
| 3372 | static void pvr2_hdw_encoder_wait_timeout(unsigned long data) |
| 3373 | { |
| 3374 | struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; |
| 3375 | hdw->state_encoder_waitok = !0; |
| 3376 | trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok); |
| 3377 | hdw->state_stale = !0; |
| 3378 | queue_work(hdw->workqueue,&hdw->workpoll); |
| 3379 | } |
| 3380 | |
| 3381 | |
| 3382 | /* Evaluate whether or not state_decoder_run can change */ |
| 3383 | static int state_eval_decoder_run(struct pvr2_hdw *hdw) |
| 3384 | { |
| 3385 | if (hdw->state_decoder_run) { |
| 3386 | if (hdw->state_encoder_ok) { |
| 3387 | if (hdw->state_pipeline_req && |
| 3388 | !hdw->state_pipeline_pause) return 0; |
| 3389 | } |
| 3390 | if (!hdw->flag_decoder_missed) { |
| 3391 | pvr2_decoder_enable(hdw,0); |
| 3392 | } |
| 3393 | hdw->state_decoder_quiescent = 0; |
| 3394 | hdw->state_decoder_run = 0; |
| 3395 | /* paranoia - solve race if timer just completed */ |
| 3396 | del_timer_sync(&hdw->quiescent_timer); |
| 3397 | } else { |
| 3398 | if (!hdw->state_decoder_quiescent) { |
| 3399 | if (!timer_pending(&hdw->quiescent_timer)) { |
| 3400 | /* We don't do something about the |
| 3401 | quiescent timer until right here because |
| 3402 | we also want to catch cases where the |
| 3403 | decoder was already not running (like |
| 3404 | after initialization) as opposed to |
| 3405 | knowing that we had just stopped it. |
| 3406 | The second flag check is here to cover a |
| 3407 | race - the timer could have run and set |
| 3408 | this flag just after the previous check |
| 3409 | but before we did the pending check. */ |
| 3410 | if (!hdw->state_decoder_quiescent) { |
| 3411 | hdw->quiescent_timer.expires = |
| 3412 | jiffies + (HZ*50/1000); |
| 3413 | add_timer(&hdw->quiescent_timer); |
| 3414 | } |
| 3415 | } |
| 3416 | /* Don't allow decoder to start again until it has |
| 3417 | been quiesced first. This little detail should |
| 3418 | hopefully further stabilize the encoder. */ |
| 3419 | return 0; |
| 3420 | } |
| 3421 | if (!hdw->state_pipeline_req || |
| 3422 | hdw->state_pipeline_pause || |
| 3423 | !hdw->state_pipeline_config || |
| 3424 | !hdw->state_encoder_config || |
| 3425 | !hdw->state_encoder_ok) return 0; |
| 3426 | del_timer_sync(&hdw->quiescent_timer); |
| 3427 | if (hdw->flag_decoder_missed) return 0; |
| 3428 | if (pvr2_decoder_enable(hdw,!0) < 0) return 0; |
| 3429 | hdw->state_decoder_quiescent = 0; |
| 3430 | hdw->state_decoder_run = !0; |
| 3431 | } |
| 3432 | trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent); |
| 3433 | trace_stbit("state_decoder_run",hdw->state_decoder_run); |
| 3434 | return !0; |
| 3435 | } |
| 3436 | |
| 3437 | |
| 3438 | /* Evaluate whether or not state_usbstream_run can change */ |
| 3439 | static int state_eval_usbstream_run(struct pvr2_hdw *hdw) |
| 3440 | { |
| 3441 | if (hdw->state_usbstream_run) { |
| 3442 | if (hdw->state_encoder_ok) { |
| 3443 | if (hdw->state_encoder_run) return 0; |
| 3444 | } |
| 3445 | pvr2_hdw_cmd_usbstream(hdw,0); |
| 3446 | hdw->state_usbstream_run = 0; |
| 3447 | } else { |
| 3448 | if (!hdw->state_encoder_ok || |
| 3449 | !hdw->state_encoder_run || |
| 3450 | !hdw->state_pipeline_req || |
| 3451 | hdw->state_pipeline_pause) return 0; |
| 3452 | if (pvr2_hdw_cmd_usbstream(hdw,!0) < 0) return 0; |
| 3453 | hdw->state_usbstream_run = !0; |
| 3454 | } |
| 3455 | trace_stbit("state_usbstream_run",hdw->state_usbstream_run); |
| 3456 | return !0; |
| 3457 | } |
| 3458 | |
| 3459 | |
| 3460 | /* Attempt to configure pipeline, if needed */ |
| 3461 | static int state_eval_pipeline_config(struct pvr2_hdw *hdw) |
| 3462 | { |
| 3463 | if (hdw->state_pipeline_config || |
| 3464 | hdw->state_pipeline_pause) return 0; |
| 3465 | pvr2_hdw_commit_execute(hdw); |
| 3466 | return !0; |
| 3467 | } |
| 3468 | |
| 3469 | |
| 3470 | /* Update pipeline idle and pipeline pause tracking states based on other |
| 3471 | inputs. This must be called whenever the other relevant inputs have |
| 3472 | changed. */ |
| 3473 | static int state_update_pipeline_state(struct pvr2_hdw *hdw) |
| 3474 | { |
| 3475 | unsigned int st; |
| 3476 | int updatedFl = 0; |
| 3477 | /* Update pipeline state */ |
| 3478 | st = !(hdw->state_encoder_run || |
| 3479 | hdw->state_decoder_run || |
| 3480 | hdw->state_usbstream_run || |
| 3481 | (!hdw->state_decoder_quiescent)); |
| 3482 | if (!st != !hdw->state_pipeline_idle) { |
| 3483 | hdw->state_pipeline_idle = st; |
| 3484 | updatedFl = !0; |
| 3485 | } |
| 3486 | if (hdw->state_pipeline_idle && hdw->state_pipeline_pause) { |
| 3487 | hdw->state_pipeline_pause = 0; |
| 3488 | updatedFl = !0; |
| 3489 | } |
| 3490 | return updatedFl; |
| 3491 | } |
| 3492 | |
| 3493 | |
| 3494 | typedef int (*state_eval_func)(struct pvr2_hdw *); |
| 3495 | |
| 3496 | /* Set of functions to be run to evaluate various states in the driver. */ |
| 3497 | const static state_eval_func eval_funcs[] = { |
| 3498 | state_eval_pipeline_config, |
| 3499 | state_eval_encoder_ok, |
| 3500 | state_eval_encoder_config, |
| 3501 | state_eval_decoder_run, |
| 3502 | state_eval_encoder_run, |
| 3503 | state_eval_usbstream_run, |
| 3504 | }; |
| 3505 | |
| 3506 | |
| 3507 | /* Process various states and return true if we did anything interesting. */ |
| 3508 | static int pvr2_hdw_state_update(struct pvr2_hdw *hdw) |
| 3509 | { |
| 3510 | unsigned int i; |
| 3511 | int state_updated = 0; |
| 3512 | int check_flag; |
| 3513 | |
| 3514 | if (!hdw->state_stale) return 0; |
| 3515 | if ((hdw->fw1_state != FW1_STATE_OK) || |
| 3516 | !hdw->flag_ok) { |
| 3517 | hdw->state_stale = 0; |
| 3518 | return !0; |
| 3519 | } |
| 3520 | /* This loop is the heart of the entire driver. It keeps trying to |
| 3521 | evaluate various bits of driver state until nothing changes for |
| 3522 | one full iteration. Each "bit of state" tracks some global |
| 3523 | aspect of the driver, e.g. whether decoder should run, if |
| 3524 | pipeline is configured, usb streaming is on, etc. We separately |
| 3525 | evaluate each of those questions based on other driver state to |
| 3526 | arrive at the correct running configuration. */ |
| 3527 | do { |
| 3528 | check_flag = 0; |
| 3529 | state_update_pipeline_state(hdw); |
| 3530 | /* Iterate over each bit of state */ |
| 3531 | for (i = 0; (i<ARRAY_SIZE(eval_funcs)) && hdw->flag_ok; i++) { |
| 3532 | if ((*eval_funcs[i])(hdw)) { |
| 3533 | check_flag = !0; |
| 3534 | state_updated = !0; |
| 3535 | state_update_pipeline_state(hdw); |
| 3536 | } |
| 3537 | } |
| 3538 | } while (check_flag && hdw->flag_ok); |
| 3539 | hdw->state_stale = 0; |
| 3540 | trace_stbit("state_stale",hdw->state_stale); |
| 3541 | return state_updated; |
| 3542 | } |
| 3543 | |
| 3544 | |
| 3545 | static unsigned int pvr2_hdw_report_unlocked(struct pvr2_hdw *hdw,int which, |
| 3546 | char *buf,unsigned int acnt) |
| 3547 | { |
| 3548 | switch (which) { |
| 3549 | case 0: |
| 3550 | return scnprintf( |
| 3551 | buf,acnt, |
| 3552 | "driver:%s%s%s%s%s", |
| 3553 | (hdw->flag_ok ? " <ok>" : " <fail>"), |
| 3554 | (hdw->flag_init_ok ? " <init>" : " <uninitialized>"), |
| 3555 | (hdw->flag_disconnected ? " <disconnected>" : |
| 3556 | " <connected>"), |
| 3557 | (hdw->flag_tripped ? " <tripped>" : ""), |
| 3558 | (hdw->flag_decoder_missed ? " <no decoder>" : "")); |
| 3559 | case 1: |
| 3560 | return scnprintf( |
| 3561 | buf,acnt, |
| 3562 | "pipeline:%s%s%s%s", |
| 3563 | (hdw->state_pipeline_idle ? " <idle>" : ""), |
| 3564 | (hdw->state_pipeline_config ? |
| 3565 | " <configok>" : " <stale>"), |
| 3566 | (hdw->state_pipeline_req ? " <req>" : ""), |
| 3567 | (hdw->state_pipeline_pause ? " <pause>" : "")); |
| 3568 | case 2: |
| 3569 | return scnprintf( |
| 3570 | buf,acnt, |
| 3571 | "worker:%s%s%s%s%s%s", |
| 3572 | (hdw->state_decoder_run ? |
| 3573 | " <decode:run>" : |
| 3574 | (hdw->state_decoder_quiescent ? |
| 3575 | "" : " <decode:stop>")), |
| 3576 | (hdw->state_decoder_quiescent ? |
| 3577 | " <decode:quiescent>" : ""), |
| 3578 | (hdw->state_encoder_ok ? |
| 3579 | "" : " <encode:init>"), |
| 3580 | (hdw->state_encoder_run ? |
| 3581 | " <encode:run>" : " <encode:stop>"), |
| 3582 | (hdw->state_encoder_config ? |
| 3583 | " <encode:configok>" : |
| 3584 | (hdw->state_encoder_waitok ? |
| 3585 | "" : " <encode:wait>")), |
| 3586 | (hdw->state_usbstream_run ? |
| 3587 | " <usb:run>" : " <usb:stop>")); |
| 3588 | break; |
| 3589 | case 3: |
| 3590 | return scnprintf( |
| 3591 | buf,acnt, |
| 3592 | "state: %s", |
| 3593 | pvr2_get_state_name(hdw->master_state)); |
| 3594 | break; |
| 3595 | default: break; |
| 3596 | } |
| 3597 | return 0; |
| 3598 | } |
| 3599 | |
| 3600 | |
| 3601 | unsigned int pvr2_hdw_state_report(struct pvr2_hdw *hdw, |
| 3602 | char *buf,unsigned int acnt) |
| 3603 | { |
| 3604 | unsigned int bcnt,ccnt,idx; |
| 3605 | bcnt = 0; |
| 3606 | LOCK_TAKE(hdw->big_lock); |
| 3607 | for (idx = 0; ; idx++) { |
| 3608 | ccnt = pvr2_hdw_report_unlocked(hdw,idx,buf,acnt); |
| 3609 | if (!ccnt) break; |
| 3610 | bcnt += ccnt; acnt -= ccnt; buf += ccnt; |
| 3611 | if (!acnt) break; |
| 3612 | buf[0] = '\n'; ccnt = 1; |
| 3613 | bcnt += ccnt; acnt -= ccnt; buf += ccnt; |
| 3614 | } |
| 3615 | LOCK_GIVE(hdw->big_lock); |
| 3616 | return bcnt; |
| 3617 | } |
| 3618 | |
| 3619 | |
| 3620 | static void pvr2_hdw_state_log_state(struct pvr2_hdw *hdw) |
| 3621 | { |
| 3622 | char buf[128]; |
| 3623 | unsigned int idx,ccnt; |
| 3624 | |
| 3625 | for (idx = 0; ; idx++) { |
| 3626 | ccnt = pvr2_hdw_report_unlocked(hdw,idx,buf,sizeof(buf)); |
| 3627 | if (!ccnt) break; |
| 3628 | printk(KERN_INFO "%s %.*s\n",hdw->name,ccnt,buf); |
| 3629 | } |
| 3630 | } |
| 3631 | |
| 3632 | |
| 3633 | /* Evaluate and update the driver's current state, taking various actions |
| 3634 | as appropriate for the update. */ |
| 3635 | static int pvr2_hdw_state_eval(struct pvr2_hdw *hdw) |
| 3636 | { |
| 3637 | unsigned int st; |
| 3638 | int state_updated = 0; |
| 3639 | int callback_flag = 0; |
| 3640 | |
| 3641 | pvr2_trace(PVR2_TRACE_STBITS, |
| 3642 | "Drive state check START"); |
| 3643 | if (pvrusb2_debug & PVR2_TRACE_STBITS) { |
| 3644 | pvr2_hdw_state_log_state(hdw); |
| 3645 | } |
| 3646 | |
| 3647 | /* Process all state and get back over disposition */ |
| 3648 | state_updated = pvr2_hdw_state_update(hdw); |
| 3649 | |
| 3650 | /* Update master state based upon all other states. */ |
| 3651 | if (!hdw->flag_ok) { |
| 3652 | st = PVR2_STATE_DEAD; |
| 3653 | } else if (hdw->fw1_state != FW1_STATE_OK) { |
| 3654 | st = PVR2_STATE_COLD; |
| 3655 | } else if (!hdw->state_encoder_ok) { |
| 3656 | st = PVR2_STATE_WARM; |
| 3657 | } else if (hdw->flag_tripped || hdw->flag_decoder_missed) { |
| 3658 | st = PVR2_STATE_ERROR; |
| 3659 | } else if (hdw->state_encoder_run && |
| 3660 | hdw->state_decoder_run && |
| 3661 | hdw->state_usbstream_run) { |
| 3662 | st = PVR2_STATE_RUN; |
| 3663 | } else { |
| 3664 | st = PVR2_STATE_READY; |
| 3665 | } |
| 3666 | if (hdw->master_state != st) { |
| 3667 | pvr2_trace(PVR2_TRACE_STATE, |
| 3668 | "Device state change from %s to %s", |
| 3669 | pvr2_get_state_name(hdw->master_state), |
| 3670 | pvr2_get_state_name(st)); |
| 3671 | hdw->master_state = st; |
| 3672 | state_updated = !0; |
| 3673 | callback_flag = !0; |
| 3674 | } |
| 3675 | if (state_updated) { |
| 3676 | /* Trigger anyone waiting on any state changes here. */ |
| 3677 | wake_up(&hdw->state_wait_data); |
| 3678 | } |
| 3679 | |
| 3680 | if (pvrusb2_debug & PVR2_TRACE_STBITS) { |
| 3681 | pvr2_hdw_state_log_state(hdw); |
| 3682 | } |
| 3683 | pvr2_trace(PVR2_TRACE_STBITS, |
| 3684 | "Drive state check DONE callback=%d",callback_flag); |
| 3685 | |
| 3686 | return callback_flag; |
| 3687 | } |
| 3688 | |
| 3689 | |
| 3690 | /* Cause kernel thread to check / update driver state */ |
| 3691 | static void pvr2_hdw_state_sched(struct pvr2_hdw *hdw) |
| 3692 | { |
| 3693 | if (hdw->state_stale) return; |
| 3694 | hdw->state_stale = !0; |
| 3695 | trace_stbit("state_stale",hdw->state_stale); |
| 3696 | queue_work(hdw->workqueue,&hdw->workpoll); |
| 3697 | } |
| 3698 | |
| 3699 | |
| 3700 | void pvr2_hdw_get_debug_info_unlocked(const struct pvr2_hdw *hdw, |
| 3701 | struct pvr2_hdw_debug_info *ptr) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3702 | { |
| 3703 | ptr->big_lock_held = hdw->big_lock_held; |
| 3704 | ptr->ctl_lock_held = hdw->ctl_lock_held; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3705 | ptr->flag_disconnected = hdw->flag_disconnected; |
| 3706 | ptr->flag_init_ok = hdw->flag_init_ok; |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3707 | ptr->flag_ok = hdw->flag_ok; |
| 3708 | ptr->fw1_state = hdw->fw1_state; |
| 3709 | ptr->flag_decoder_missed = hdw->flag_decoder_missed; |
| 3710 | ptr->flag_tripped = hdw->flag_tripped; |
| 3711 | ptr->state_encoder_ok = hdw->state_encoder_ok; |
| 3712 | ptr->state_encoder_run = hdw->state_encoder_run; |
| 3713 | ptr->state_decoder_run = hdw->state_decoder_run; |
| 3714 | ptr->state_usbstream_run = hdw->state_usbstream_run; |
| 3715 | ptr->state_decoder_quiescent = hdw->state_decoder_quiescent; |
| 3716 | ptr->state_pipeline_config = hdw->state_pipeline_config; |
| 3717 | ptr->state_pipeline_req = hdw->state_pipeline_req; |
| 3718 | ptr->state_pipeline_pause = hdw->state_pipeline_pause; |
| 3719 | ptr->state_pipeline_idle = hdw->state_pipeline_idle; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3720 | ptr->cmd_debug_state = hdw->cmd_debug_state; |
| 3721 | ptr->cmd_code = hdw->cmd_debug_code; |
| 3722 | ptr->cmd_debug_write_len = hdw->cmd_debug_write_len; |
| 3723 | ptr->cmd_debug_read_len = hdw->cmd_debug_read_len; |
| 3724 | ptr->cmd_debug_timeout = hdw->ctl_timeout_flag; |
| 3725 | ptr->cmd_debug_write_pend = hdw->ctl_write_pend_flag; |
| 3726 | ptr->cmd_debug_read_pend = hdw->ctl_read_pend_flag; |
| 3727 | ptr->cmd_debug_rstatus = hdw->ctl_read_urb->status; |
| 3728 | ptr->cmd_debug_wstatus = hdw->ctl_read_urb->status; |
| 3729 | } |
| 3730 | |
| 3731 | |
Mike Isely | 681c739 | 2007-11-26 01:48:52 -0300 | [diff] [blame] | 3732 | void pvr2_hdw_get_debug_info_locked(struct pvr2_hdw *hdw, |
| 3733 | struct pvr2_hdw_debug_info *ptr) |
| 3734 | { |
| 3735 | LOCK_TAKE(hdw->ctl_lock); do { |
| 3736 | pvr2_hdw_get_debug_info_unlocked(hdw,ptr); |
| 3737 | } while(0); LOCK_GIVE(hdw->ctl_lock); |
| 3738 | } |
| 3739 | |
| 3740 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3741 | int pvr2_hdw_gpio_get_dir(struct pvr2_hdw *hdw,u32 *dp) |
| 3742 | { |
| 3743 | return pvr2_read_register(hdw,PVR2_GPIO_DIR,dp); |
| 3744 | } |
| 3745 | |
| 3746 | |
| 3747 | int pvr2_hdw_gpio_get_out(struct pvr2_hdw *hdw,u32 *dp) |
| 3748 | { |
| 3749 | return pvr2_read_register(hdw,PVR2_GPIO_OUT,dp); |
| 3750 | } |
| 3751 | |
| 3752 | |
| 3753 | int pvr2_hdw_gpio_get_in(struct pvr2_hdw *hdw,u32 *dp) |
| 3754 | { |
| 3755 | return pvr2_read_register(hdw,PVR2_GPIO_IN,dp); |
| 3756 | } |
| 3757 | |
| 3758 | |
| 3759 | int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val) |
| 3760 | { |
| 3761 | u32 cval,nval; |
| 3762 | int ret; |
| 3763 | if (~msk) { |
| 3764 | ret = pvr2_read_register(hdw,PVR2_GPIO_DIR,&cval); |
| 3765 | if (ret) return ret; |
| 3766 | nval = (cval & ~msk) | (val & msk); |
| 3767 | pvr2_trace(PVR2_TRACE_GPIO, |
| 3768 | "GPIO direction changing 0x%x:0x%x" |
| 3769 | " from 0x%x to 0x%x", |
| 3770 | msk,val,cval,nval); |
| 3771 | } else { |
| 3772 | nval = val; |
| 3773 | pvr2_trace(PVR2_TRACE_GPIO, |
| 3774 | "GPIO direction changing to 0x%x",nval); |
| 3775 | } |
| 3776 | return pvr2_write_register(hdw,PVR2_GPIO_DIR,nval); |
| 3777 | } |
| 3778 | |
| 3779 | |
| 3780 | int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val) |
| 3781 | { |
| 3782 | u32 cval,nval; |
| 3783 | int ret; |
| 3784 | if (~msk) { |
| 3785 | ret = pvr2_read_register(hdw,PVR2_GPIO_OUT,&cval); |
| 3786 | if (ret) return ret; |
| 3787 | nval = (cval & ~msk) | (val & msk); |
| 3788 | pvr2_trace(PVR2_TRACE_GPIO, |
| 3789 | "GPIO output changing 0x%x:0x%x from 0x%x to 0x%x", |
| 3790 | msk,val,cval,nval); |
| 3791 | } else { |
| 3792 | nval = val; |
| 3793 | pvr2_trace(PVR2_TRACE_GPIO, |
| 3794 | "GPIO output changing to 0x%x",nval); |
| 3795 | } |
| 3796 | return pvr2_write_register(hdw,PVR2_GPIO_OUT,nval); |
| 3797 | } |
| 3798 | |
| 3799 | |
Mike Isely | 7fb20fa | 2008-04-22 14:45:37 -0300 | [diff] [blame] | 3800 | unsigned int pvr2_hdw_get_input_available(struct pvr2_hdw *hdw) |
| 3801 | { |
| 3802 | return hdw->input_avail_mask; |
| 3803 | } |
| 3804 | |
| 3805 | |
Mike Isely | e61b6fc | 2006-07-18 22:42:18 -0300 | [diff] [blame] | 3806 | /* Find I2C address of eeprom */ |
Adrian Bunk | 07e337e | 2006-06-30 11:30:20 -0300 | [diff] [blame] | 3807 | static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw) |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3808 | { |
| 3809 | int result; |
| 3810 | LOCK_TAKE(hdw->ctl_lock); do { |
Michael Krufky | 8d36436 | 2007-01-22 02:17:55 -0300 | [diff] [blame] | 3811 | hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR; |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3812 | result = pvr2_send_request(hdw, |
| 3813 | hdw->cmd_buffer,1, |
| 3814 | hdw->cmd_buffer,1); |
| 3815 | if (result < 0) break; |
| 3816 | result = hdw->cmd_buffer[0]; |
| 3817 | } while(0); LOCK_GIVE(hdw->ctl_lock); |
| 3818 | return result; |
| 3819 | } |
| 3820 | |
| 3821 | |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 3822 | int pvr2_hdw_register_access(struct pvr2_hdw *hdw, |
Hans Verkuil | f3d092b | 2007-02-23 20:55:14 -0300 | [diff] [blame] | 3823 | u32 match_type, u32 match_chip, u64 reg_id, |
| 3824 | int setFl,u64 *val_ptr) |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 3825 | { |
| 3826 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 3827 | struct pvr2_i2c_client *cp; |
| 3828 | struct v4l2_register req; |
Mike Isely | 6d98816 | 2006-09-28 17:53:49 -0300 | [diff] [blame] | 3829 | int stat = 0; |
| 3830 | int okFl = 0; |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 3831 | |
Mike Isely | 201f5c9 | 2007-01-28 16:08:36 -0300 | [diff] [blame] | 3832 | if (!capable(CAP_SYS_ADMIN)) return -EPERM; |
| 3833 | |
Hans Verkuil | f3d092b | 2007-02-23 20:55:14 -0300 | [diff] [blame] | 3834 | req.match_type = match_type; |
| 3835 | req.match_chip = match_chip; |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 3836 | req.reg = reg_id; |
| 3837 | if (setFl) req.val = *val_ptr; |
| 3838 | mutex_lock(&hdw->i2c_list_lock); do { |
Trent Piepho | e77e2c2 | 2007-10-10 05:37:42 -0300 | [diff] [blame] | 3839 | list_for_each_entry(cp, &hdw->i2c_clients, list) { |
Mike Isely | 8481a75 | 2007-04-27 12:31:31 -0300 | [diff] [blame] | 3840 | if (!v4l2_chip_match_i2c_client( |
| 3841 | cp->client, |
| 3842 | req.match_type, req.match_chip)) { |
Hans Verkuil | f3d092b | 2007-02-23 20:55:14 -0300 | [diff] [blame] | 3843 | continue; |
| 3844 | } |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 3845 | stat = pvr2_i2c_client_cmd( |
Trent Piepho | 52ebc76 | 2007-01-23 22:38:13 -0300 | [diff] [blame] | 3846 | cp,(setFl ? VIDIOC_DBG_S_REGISTER : |
| 3847 | VIDIOC_DBG_G_REGISTER),&req); |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 3848 | if (!setFl) *val_ptr = req.val; |
Mike Isely | 6d98816 | 2006-09-28 17:53:49 -0300 | [diff] [blame] | 3849 | okFl = !0; |
| 3850 | break; |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 3851 | } |
| 3852 | } while (0); mutex_unlock(&hdw->i2c_list_lock); |
Mike Isely | 6d98816 | 2006-09-28 17:53:49 -0300 | [diff] [blame] | 3853 | if (okFl) { |
| 3854 | return stat; |
| 3855 | } |
Mike Isely | 32ffa9a | 2006-09-23 22:26:52 -0300 | [diff] [blame] | 3856 | return -EINVAL; |
| 3857 | #else |
| 3858 | return -ENOSYS; |
| 3859 | #endif |
| 3860 | } |
| 3861 | |
| 3862 | |
Mike Isely | d855497 | 2006-06-26 20:58:46 -0300 | [diff] [blame] | 3863 | /* |
| 3864 | Stuff for Emacs to see, in order to encourage consistent editing style: |
| 3865 | *** Local Variables: *** |
| 3866 | *** mode: c *** |
| 3867 | *** fill-column: 75 *** |
| 3868 | *** tab-width: 8 *** |
| 3869 | *** c-basic-offset: 8 *** |
| 3870 | *** End: *** |
| 3871 | */ |