Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | if ARCH_LH7A40X |
| 2 | |
| 3 | menu "LH7A40X Implementations" |
| 4 | |
| 5 | config MACH_KEV7A400 |
| 6 | bool "KEV7A400" |
| 7 | select ARCH_LH7A400 |
| 8 | help |
| 9 | Say Y here if you are using the Sharp KEV7A400 development |
| 10 | board. This hardware is discontinued, so I'd be very |
| 11 | suprised if you wanted this option. |
| 12 | |
| 13 | config MACH_LPD7A400 |
| 14 | bool "LPD7A400 Card Engine" |
| 15 | select ARCH_LH7A400 |
| 16 | # select IDE_POLL |
| 17 | help |
| 18 | Say Y here if you are using Logic Product Development's |
| 19 | LPD7A400 CardEngine. For the time being, the LPD7A400 and |
| 20 | LPD7A404 options are mutually exclusive. |
| 21 | |
| 22 | config MACH_LPD7A404 |
| 23 | bool "LPD7A404 Card Engine" |
| 24 | select ARCH_LH7A404 |
| 25 | # select IDE_POLL |
| 26 | help |
| 27 | Say Y here if you are using Logic Product Development's |
| 28 | LPD7A404 CardEngine. For the time being, the LPD7A400 and |
| 29 | LPD7A404 options are mutually exclusive. |
| 30 | |
| 31 | config ARCH_LH7A400 |
| 32 | bool |
| 33 | |
| 34 | config ARCH_LH7A404 |
| 35 | bool |
| 36 | |
| 37 | config LH7A40X_CONTIGMEM |
| 38 | bool "Disable NUMA Support" |
| 39 | depends on ARCH_LH7A40X |
| 40 | help |
| 41 | Say Y here if your bootloader sets the SROMLL bit(s) in |
| 42 | the SDRAM controller, organizing memory as a contiguous |
| 43 | array. This option will disable CONFIG_DISCONTIGMEM and |
| 44 | force the kernel to manage all memory in one node. |
| 45 | |
| 46 | Setting this option incorrectly may prevent the kernel from |
| 47 | booting. It is OK to leave it N. |
| 48 | |
| 49 | For more information, consult |
| 50 | <file:Documentation/arm/Sharp-LH/SDRAM>. |
| 51 | |
| 52 | config LH7A40X_ONE_BANK_PER_NODE |
| 53 | bool "Optimize NUMA Node Tables for Size" |
| 54 | depends on ARCH_LH7A40X && !LH7A40X_CONTIGMEM |
| 55 | help |
| 56 | Say Y here to produce compact memory node tables. By |
| 57 | default pairs of adjacent physical RAM banks are managed |
| 58 | together in a single node, incurring some wasted overhead |
| 59 | in the node tables, however also maintaining compatibility |
| 60 | with systems where physical memory is truly contiguous. |
| 61 | |
| 62 | Setting this option incorrectly may prevent the kernel from |
| 63 | booting. It is OK to leave it N. |
| 64 | |
| 65 | For more information, consult |
| 66 | <file:Documentation/arm/Sharp-LH/SDRAM>. |
| 67 | |
| 68 | endmenu |
| 69 | |
| 70 | endif |