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Dan Williamsb94d5232015-05-19 22:54:31 -04001/*
2 * NVDIMM Firmware Interface Table - NFIT
3 *
4 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 */
15#ifndef __NFIT_H__
16#define __NFIT_H__
Dan Williams7ae0fa432016-02-19 12:16:34 -080017#include <linux/workqueue.h>
Dan Williamsb94d5232015-05-19 22:54:31 -040018#include <linux/libnvdimm.h>
19#include <linux/types.h>
20#include <linux/uuid.h>
21#include <linux/acpi.h>
22#include <acpi/acuuid.h>
23
24#define UUID_NFIT_BUS "2f10e7a4-9e91-11e4-89d3-123b93f75cba"
25#define UUID_NFIT_DIMM "4309ac30-0d11-11e4-9191-0800200c9a66"
Dan Williams58138822015-06-23 20:08:34 -040026#define ACPI_NFIT_MEM_FAILED_MASK (ACPI_NFIT_MEM_SAVE_FAILED \
27 | ACPI_NFIT_MEM_RESTORE_FAILED | ACPI_NFIT_MEM_FLUSH_FAILED \
Bob Mooreca321d12015-10-19 10:24:52 +080028 | ACPI_NFIT_MEM_NOT_ARMED)
Dan Williamsb94d5232015-05-19 22:54:31 -040029
30enum nfit_uuids {
31 NFIT_SPA_VOLATILE,
32 NFIT_SPA_PM,
33 NFIT_SPA_DCR,
34 NFIT_SPA_BDW,
35 NFIT_SPA_VDISK,
36 NFIT_SPA_VCD,
37 NFIT_SPA_PDISK,
38 NFIT_SPA_PCD,
39 NFIT_DEV_BUS,
40 NFIT_DEV_DIMM,
41 NFIT_UUID_MAX,
42};
43
Dan Williamsbe26f9a2016-02-01 17:48:42 -080044enum nfit_fic {
45 NFIT_FIC_BYTE = 0x101, /* byte-addressable energy backed */
46 NFIT_FIC_BLK = 0x201, /* block-addressable non-energy backed */
47 NFIT_FIC_BYTEN = 0x301, /* byte-addressable non-energy backed */
48};
49
Ross Zwislerf0f2c072015-07-10 11:06:14 -060050enum {
Dan Williamsaef25332016-02-12 17:01:11 -080051 NFIT_BLK_READ_FLUSH = 1,
52 NFIT_BLK_DCR_LATCH = 2,
53 NFIT_ARS_STATUS_DONE = 0,
54 NFIT_ARS_STATUS_BUSY = 1 << 16,
55 NFIT_ARS_STATUS_NONE = 2 << 16,
56 NFIT_ARS_STATUS_INTR = 3 << 16,
57 NFIT_ARS_START_BUSY = 6,
58 NFIT_ARS_CAP_NONE = 1,
59 NFIT_ARS_F_OVERFLOW = 1,
Dan Williams1cf03c02016-02-17 13:01:23 -080060 NFIT_ARS_TIMEOUT = 90,
Ross Zwislerf0f2c072015-07-10 11:06:14 -060061};
62
Dan Williamsb94d5232015-05-19 22:54:31 -040063struct nfit_spa {
64 struct acpi_nfit_system_address *spa;
65 struct list_head list;
Dan Williams1cf03c02016-02-17 13:01:23 -080066 struct nd_region *nd_region;
67 unsigned int ars_done:1;
68 u32 clear_err_unit;
69 u32 max_ars;
Dan Williamsb94d5232015-05-19 22:54:31 -040070};
71
72struct nfit_dcr {
73 struct acpi_nfit_control_region *dcr;
74 struct list_head list;
75};
76
77struct nfit_bdw {
78 struct acpi_nfit_data_region *bdw;
79 struct list_head list;
80};
81
Ross Zwisler047fc8a2015-06-25 04:21:02 -040082struct nfit_idt {
83 struct acpi_nfit_interleave *idt;
84 struct list_head list;
85};
86
Ross Zwislerc2ad2952015-07-10 11:06:13 -060087struct nfit_flush {
88 struct acpi_nfit_flush_address *flush;
89 struct list_head list;
90};
91
Dan Williamsb94d5232015-05-19 22:54:31 -040092struct nfit_memdev {
93 struct acpi_nfit_memory_map *memdev;
94 struct list_head list;
95};
96
97/* assembled tables for a given dimm/memory-device */
98struct nfit_mem {
Dan Williamse6dfb2d2015-04-25 03:56:17 -040099 struct nvdimm *nvdimm;
Dan Williamsb94d5232015-05-19 22:54:31 -0400100 struct acpi_nfit_memory_map *memdev_dcr;
101 struct acpi_nfit_memory_map *memdev_pmem;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400102 struct acpi_nfit_memory_map *memdev_bdw;
Dan Williamsb94d5232015-05-19 22:54:31 -0400103 struct acpi_nfit_control_region *dcr;
104 struct acpi_nfit_data_region *bdw;
105 struct acpi_nfit_system_address *spa_dcr;
106 struct acpi_nfit_system_address *spa_bdw;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400107 struct acpi_nfit_interleave *idt_dcr;
108 struct acpi_nfit_interleave *idt_bdw;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600109 struct nfit_flush *nfit_flush;
Dan Williamsb94d5232015-05-19 22:54:31 -0400110 struct list_head list;
Dan Williams62232e452015-06-08 14:27:06 -0400111 struct acpi_device *adev;
112 unsigned long dsm_mask;
Dan Williamsb94d5232015-05-19 22:54:31 -0400113};
114
115struct acpi_nfit_desc {
116 struct nvdimm_bus_descriptor nd_desc;
Linda Knippers6b577c92015-11-20 19:05:49 -0500117 struct acpi_table_header acpi_header;
118 struct acpi_nfit_header *nfit;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400119 struct mutex spa_map_mutex;
Vishal Verma20985162015-10-27 16:58:27 -0600120 struct mutex init_mutex;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400121 struct list_head spa_maps;
Dan Williamsb94d5232015-05-19 22:54:31 -0400122 struct list_head memdevs;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600123 struct list_head flushes;
Dan Williamsb94d5232015-05-19 22:54:31 -0400124 struct list_head dimms;
125 struct list_head spas;
126 struct list_head dcrs;
127 struct list_head bdws;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400128 struct list_head idts;
Dan Williamsb94d5232015-05-19 22:54:31 -0400129 struct nvdimm_bus *nvdimm_bus;
130 struct device *dev;
Dan Williams1cf03c02016-02-17 13:01:23 -0800131 struct nd_cmd_ars_status *ars_status;
132 size_t ars_status_size;
Dan Williams7ae0fa432016-02-19 12:16:34 -0800133 struct work_struct work;
134 unsigned int cancel:1;
Dan Williams62232e452015-06-08 14:27:06 -0400135 unsigned long dimm_dsm_force_en;
Vishal Verma39c686b2015-07-09 13:25:36 -0600136 unsigned long bus_dsm_force_en;
Dan Williams6bc75612015-06-17 17:23:32 -0400137 int (*blk_do_io)(struct nd_blk_region *ndbr, resource_size_t dpa,
138 void *iobuf, u64 len, int rw);
Dan Williamsb94d5232015-05-19 22:54:31 -0400139};
140
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400141enum nd_blk_mmio_selector {
142 BDW,
143 DCR,
144};
145
Ross Zwisler67a3e8f2015-08-27 13:14:20 -0600146struct nd_blk_addr {
147 union {
148 void __iomem *base;
149 void __pmem *aperture;
150 };
151};
152
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400153struct nfit_blk {
154 struct nfit_blk_mmio {
Ross Zwisler67a3e8f2015-08-27 13:14:20 -0600155 struct nd_blk_addr addr;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400156 u64 size;
157 u64 base_offset;
158 u32 line_size;
159 u32 num_lines;
160 u32 table_size;
161 struct acpi_nfit_interleave *idt;
162 struct acpi_nfit_system_address *spa;
163 } mmio[2];
164 struct nd_region *nd_region;
165 u64 bdw_offset; /* post interleave offset */
166 u64 stat_offset;
167 u64 cmd_offset;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600168 void __iomem *nvdimm_flush;
Ross Zwislerf0f2c072015-07-10 11:06:14 -0600169 u32 dimm_flags;
Ross Zwislerc2ad2952015-07-10 11:06:13 -0600170};
171
172enum spa_map_type {
173 SPA_MAP_CONTROL,
174 SPA_MAP_APERTURE,
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400175};
176
177struct nfit_spa_mapping {
178 struct acpi_nfit_desc *acpi_desc;
179 struct acpi_nfit_system_address *spa;
180 struct list_head list;
181 struct kref kref;
Ross Zwisler67a3e8f2015-08-27 13:14:20 -0600182 enum spa_map_type type;
183 struct nd_blk_addr addr;
Ross Zwisler047fc8a2015-06-25 04:21:02 -0400184};
185
186static inline struct nfit_spa_mapping *to_spa_map(struct kref *kref)
187{
188 return container_of(kref, struct nfit_spa_mapping, kref);
189}
190
Dan Williamsb94d5232015-05-19 22:54:31 -0400191static inline struct acpi_nfit_memory_map *__to_nfit_memdev(
192 struct nfit_mem *nfit_mem)
193{
194 if (nfit_mem->memdev_dcr)
195 return nfit_mem->memdev_dcr;
196 return nfit_mem->memdev_pmem;
197}
Dan Williams45def222015-04-26 19:26:48 -0400198
199static inline struct acpi_nfit_desc *to_acpi_desc(
200 struct nvdimm_bus_descriptor *nd_desc)
201{
202 return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
203}
Dan Williams6bc75612015-06-17 17:23:32 -0400204
205const u8 *to_nfit_uuid(enum nfit_uuids id);
206int acpi_nfit_init(struct acpi_nfit_desc *nfit, acpi_size sz);
Dan Williamsa61fe6f2016-02-19 12:29:32 -0800207void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev);
Dan Williamsb94d5232015-05-19 22:54:31 -0400208#endif /* __NFIT_H__ */