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Bard Liao6adcafa2015-06-26 10:59:49 +08001/*
2 * rt298.c -- RT298 ALSA SoC audio codec driver
3 *
4 * Copyright 2015 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <linux/i2c.h>
18#include <linux/platform_device.h>
19#include <linux/spi/spi.h>
Vinod Koulb9c17f12016-05-12 09:38:50 +053020#include <linux/dmi.h>
Bard Liao6adcafa2015-06-26 10:59:49 +080021#include <linux/acpi.h>
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include <sound/soc-dapm.h>
27#include <sound/initval.h>
28#include <sound/tlv.h>
29#include <sound/jack.h>
30#include <linux/workqueue.h>
31#include <sound/rt298.h>
Bard Liao6adcafa2015-06-26 10:59:49 +080032
33#include "rl6347a.h"
34#include "rt298.h"
35
36#define RT298_VENDOR_ID 0x10ec0298
37
38struct rt298_priv {
39 struct reg_default *index_cache;
40 int index_cache_size;
41 struct regmap *regmap;
42 struct snd_soc_codec *codec;
43 struct rt298_platform_data pdata;
44 struct i2c_client *i2c;
45 struct snd_soc_jack *jack;
46 struct delayed_work jack_detect_work;
47 int sys_clk;
48 int clk_id;
49 int is_hp_in;
50};
51
Axel Lin3943b9e2015-10-05 21:23:48 +080052static const struct reg_default rt298_index_def[] = {
Bard Liao7ba6e4e2015-10-16 15:21:32 +080053 { 0x01, 0xa5a8 },
54 { 0x02, 0x8e95 },
Bard Liao6adcafa2015-06-26 10:59:49 +080055 { 0x03, 0x0002 },
Bard Liao7ba6e4e2015-10-16 15:21:32 +080056 { 0x04, 0xaf67 },
57 { 0x08, 0x200f },
58 { 0x09, 0xd010 },
59 { 0x0a, 0x0100 },
Bard Liao6adcafa2015-06-26 10:59:49 +080060 { 0x0b, 0x0000 },
61 { 0x0d, 0x2800 },
Bard Liao7ba6e4e2015-10-16 15:21:32 +080062 { 0x0f, 0x0022 },
63 { 0x19, 0x0217 },
Bard Liao6adcafa2015-06-26 10:59:49 +080064 { 0x20, 0x0020 },
65 { 0x33, 0x0208 },
66 { 0x46, 0x0300 },
Bard Liao7ba6e4e2015-10-16 15:21:32 +080067 { 0x49, 0x4004 },
68 { 0x4f, 0x50c9 },
69 { 0x50, 0x3000 },
70 { 0x63, 0x1b02 },
Bard Liao6adcafa2015-06-26 10:59:49 +080071 { 0x67, 0x1111 },
72 { 0x68, 0x1016 },
73 { 0x69, 0x273f },
74};
75#define INDEX_CACHE_SIZE ARRAY_SIZE(rt298_index_def)
76
77static const struct reg_default rt298_reg[] = {
78 { 0x00170500, 0x00000400 },
79 { 0x00220000, 0x00000031 },
80 { 0x00239000, 0x0000007f },
81 { 0x0023a000, 0x0000007f },
82 { 0x00270500, 0x00000400 },
83 { 0x00370500, 0x00000400 },
84 { 0x00870500, 0x00000400 },
85 { 0x00920000, 0x00000031 },
86 { 0x00935000, 0x000000c3 },
87 { 0x00936000, 0x000000c3 },
88 { 0x00970500, 0x00000400 },
89 { 0x00b37000, 0x00000097 },
90 { 0x00b37200, 0x00000097 },
91 { 0x00b37300, 0x00000097 },
92 { 0x00c37000, 0x00000000 },
93 { 0x00c37100, 0x00000080 },
94 { 0x01270500, 0x00000400 },
95 { 0x01370500, 0x00000400 },
96 { 0x01371f00, 0x411111f0 },
97 { 0x01439000, 0x00000080 },
98 { 0x0143a000, 0x00000080 },
99 { 0x01470700, 0x00000000 },
100 { 0x01470500, 0x00000400 },
101 { 0x01470c00, 0x00000000 },
102 { 0x01470100, 0x00000000 },
103 { 0x01837000, 0x00000000 },
104 { 0x01870500, 0x00000400 },
105 { 0x02050000, 0x00000000 },
106 { 0x02139000, 0x00000080 },
107 { 0x0213a000, 0x00000080 },
108 { 0x02170100, 0x00000000 },
109 { 0x02170500, 0x00000400 },
110 { 0x02170700, 0x00000000 },
111 { 0x02270100, 0x00000000 },
112 { 0x02370100, 0x00000000 },
113 { 0x01870700, 0x00000020 },
114 { 0x00830000, 0x000000c3 },
115 { 0x00930000, 0x000000c3 },
116 { 0x01270700, 0x00000000 },
117};
118
119static bool rt298_volatile_register(struct device *dev, unsigned int reg)
120{
121 switch (reg) {
122 case 0 ... 0xff:
123 case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
124 case RT298_GET_HP_SENSE:
125 case RT298_GET_MIC1_SENSE:
126 case RT298_PROC_COEF:
127 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0):
128 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0):
129 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0):
130 return true;
131 default:
Bard Liaoa5fe58f2015-10-12 21:34:59 +0800132 return false;
Bard Liao6adcafa2015-06-26 10:59:49 +0800133 }
134
135
136}
137
138static bool rt298_readable_register(struct device *dev, unsigned int reg)
139{
140 switch (reg) {
141 case 0 ... 0xff:
142 case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
143 case RT298_GET_HP_SENSE:
144 case RT298_GET_MIC1_SENSE:
145 case RT298_SET_AUDIO_POWER:
146 case RT298_SET_HPO_POWER:
147 case RT298_SET_SPK_POWER:
148 case RT298_SET_DMIC1_POWER:
149 case RT298_SPK_MUX:
150 case RT298_HPO_MUX:
151 case RT298_ADC0_MUX:
152 case RT298_ADC1_MUX:
153 case RT298_SET_MIC1:
154 case RT298_SET_PIN_HPO:
155 case RT298_SET_PIN_SPK:
156 case RT298_SET_PIN_DMIC1:
157 case RT298_SPK_EAPD:
158 case RT298_SET_AMP_GAIN_HPO:
159 case RT298_SET_DMIC2_DEFAULT:
160 case RT298_DACL_GAIN:
161 case RT298_DACR_GAIN:
162 case RT298_ADCL_GAIN:
163 case RT298_ADCR_GAIN:
164 case RT298_MIC_GAIN:
165 case RT298_SPOL_GAIN:
166 case RT298_SPOR_GAIN:
167 case RT298_HPOL_GAIN:
168 case RT298_HPOR_GAIN:
169 case RT298_F_DAC_SWITCH:
170 case RT298_F_RECMIX_SWITCH:
171 case RT298_REC_MIC_SWITCH:
172 case RT298_REC_I2S_SWITCH:
173 case RT298_REC_LINE_SWITCH:
174 case RT298_REC_BEEP_SWITCH:
175 case RT298_DAC_FORMAT:
176 case RT298_ADC_FORMAT:
177 case RT298_COEF_INDEX:
178 case RT298_PROC_COEF:
179 case RT298_SET_AMP_GAIN_ADC_IN1:
180 case RT298_SET_AMP_GAIN_ADC_IN2:
181 case RT298_SET_POWER(RT298_DAC_OUT1):
182 case RT298_SET_POWER(RT298_DAC_OUT2):
183 case RT298_SET_POWER(RT298_ADC_IN1):
184 case RT298_SET_POWER(RT298_ADC_IN2):
185 case RT298_SET_POWER(RT298_DMIC2):
186 case RT298_SET_POWER(RT298_MIC1):
187 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0):
188 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0):
189 case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0):
190 return true;
191 default:
192 return false;
193 }
194}
195
196#ifdef CONFIG_PM
197static void rt298_index_sync(struct snd_soc_codec *codec)
198{
199 struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
200 int i;
201
202 for (i = 0; i < INDEX_CACHE_SIZE; i++) {
203 snd_soc_write(codec, rt298->index_cache[i].reg,
204 rt298->index_cache[i].def);
205 }
206}
207#endif
208
209static int rt298_support_power_controls[] = {
210 RT298_DAC_OUT1,
211 RT298_DAC_OUT2,
212 RT298_ADC_IN1,
213 RT298_ADC_IN2,
214 RT298_MIC1,
215 RT298_DMIC1,
216 RT298_DMIC2,
217 RT298_SPK_OUT,
218 RT298_HP_OUT,
219};
220#define RT298_POWER_REG_LEN ARRAY_SIZE(rt298_support_power_controls)
221
222static int rt298_jack_detect(struct rt298_priv *rt298, bool *hp, bool *mic)
223{
224 struct snd_soc_dapm_context *dapm;
225 unsigned int val, buf;
226
227 *hp = false;
228 *mic = false;
229
230 if (!rt298->codec)
231 return -EINVAL;
232
233 dapm = snd_soc_codec_get_dapm(rt298->codec);
234
235 if (rt298->pdata.cbj_en) {
236 regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf);
237 *hp = buf & 0x80000000;
238 if (*hp == rt298->is_hp_in)
239 return -1;
240 rt298->is_hp_in = *hp;
241 if (*hp) {
242 /* power on HV,VERF */
243 regmap_update_bits(rt298->regmap,
244 RT298_DC_GAIN, 0x200, 0x200);
245
246 snd_soc_dapm_force_enable_pin(dapm, "HV");
247 snd_soc_dapm_force_enable_pin(dapm, "VREF");
248 /* power LDO1 */
249 snd_soc_dapm_force_enable_pin(dapm, "LDO1");
250 snd_soc_dapm_sync(dapm);
251
252 regmap_write(rt298->regmap, RT298_SET_MIC1, 0x24);
253 msleep(50);
254
255 regmap_update_bits(rt298->regmap,
256 RT298_CBJ_CTRL1, 0xfcc0, 0xd400);
257 msleep(300);
258 regmap_read(rt298->regmap, RT298_CBJ_CTRL2, &val);
259
260 if (0x0070 == (val & 0x0070)) {
261 *mic = true;
262 } else {
263 regmap_update_bits(rt298->regmap,
264 RT298_CBJ_CTRL1, 0xfcc0, 0xe400);
265 msleep(300);
266 regmap_read(rt298->regmap,
267 RT298_CBJ_CTRL2, &val);
268 if (0x0070 == (val & 0x0070))
269 *mic = true;
270 else
271 *mic = false;
272 }
273 regmap_update_bits(rt298->regmap,
274 RT298_DC_GAIN, 0x200, 0x0);
275
276 } else {
277 *mic = false;
278 regmap_write(rt298->regmap, RT298_SET_MIC1, 0x20);
Bard Liao9ff49ce2016-04-26 18:07:11 +0800279 regmap_update_bits(rt298->regmap,
280 RT298_CBJ_CTRL1, 0x0400, 0x0000);
Bard Liao6adcafa2015-06-26 10:59:49 +0800281 }
282 } else {
283 regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf);
284 *hp = buf & 0x80000000;
285 regmap_read(rt298->regmap, RT298_GET_MIC1_SENSE, &buf);
286 *mic = buf & 0x80000000;
287 }
288
289 snd_soc_dapm_disable_pin(dapm, "HV");
290 snd_soc_dapm_disable_pin(dapm, "VREF");
291 if (!*hp)
292 snd_soc_dapm_disable_pin(dapm, "LDO1");
293 snd_soc_dapm_sync(dapm);
294
295 pr_debug("*hp = %d *mic = %d\n", *hp, *mic);
296
297 return 0;
298}
299
300static void rt298_jack_detect_work(struct work_struct *work)
301{
302 struct rt298_priv *rt298 =
303 container_of(work, struct rt298_priv, jack_detect_work.work);
304 int status = 0;
305 bool hp = false;
306 bool mic = false;
307
308 if (rt298_jack_detect(rt298, &hp, &mic) < 0)
309 return;
310
311 if (hp == true)
312 status |= SND_JACK_HEADPHONE;
313
314 if (mic == true)
315 status |= SND_JACK_MICROPHONE;
316
317 snd_soc_jack_report(rt298->jack, status,
318 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
319}
320
321int rt298_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
322{
323 struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
Bard Liaoe3d62cb2016-11-28 13:24:06 +0800324 struct snd_soc_dapm_context *dapm;
325 bool hp = false;
326 bool mic = false;
327 int status = 0;
328
329 /* If jack in NULL, disable HS jack */
330 if (!jack) {
331 regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x2, 0x0);
332 dapm = snd_soc_codec_get_dapm(codec);
333 snd_soc_dapm_disable_pin(dapm, "LDO1");
334 snd_soc_dapm_sync(dapm);
335 return 0;
336 }
Bard Liao6adcafa2015-06-26 10:59:49 +0800337
338 rt298->jack = jack;
Bard Liaoe3d62cb2016-11-28 13:24:06 +0800339 regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x2, 0x2);
Bard Liao6adcafa2015-06-26 10:59:49 +0800340
Bard Liaoe3d62cb2016-11-28 13:24:06 +0800341 rt298_jack_detect(rt298, &hp, &mic);
342 if (hp == true)
343 status |= SND_JACK_HEADPHONE;
344
345 if (mic == true)
346 status |= SND_JACK_MICROPHONE;
347
348 snd_soc_jack_report(rt298->jack, status,
Bard Liao6adcafa2015-06-26 10:59:49 +0800349 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
350
351 return 0;
352}
353EXPORT_SYMBOL_GPL(rt298_mic_detect);
354
355static int is_mclk_mode(struct snd_soc_dapm_widget *source,
356 struct snd_soc_dapm_widget *sink)
357{
358 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
359 struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
360
361 if (rt298->clk_id == RT298_SCLK_S_MCLK)
362 return 1;
363 else
364 return 0;
365}
366
367static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
368static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
369
370static const struct snd_kcontrol_new rt298_snd_controls[] = {
371 SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT298_DACL_GAIN,
372 RT298_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv),
373 SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT298_ADCL_GAIN,
374 RT298_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
375 SOC_SINGLE_TLV("AMIC Volume", RT298_MIC_GAIN,
376 0, 0x3, 0, mic_vol_tlv),
377 SOC_DOUBLE_R("Speaker Playback Switch", RT298_SPOL_GAIN,
378 RT298_SPOR_GAIN, RT298_MUTE_SFT, 1, 1),
379};
380
381/* Digital Mixer */
382static const struct snd_kcontrol_new rt298_front_mix[] = {
383 SOC_DAPM_SINGLE("DAC Switch", RT298_F_DAC_SWITCH,
384 RT298_MUTE_SFT, 1, 1),
385 SOC_DAPM_SINGLE("RECMIX Switch", RT298_F_RECMIX_SWITCH,
386 RT298_MUTE_SFT, 1, 1),
387};
388
389/* Analog Input Mixer */
390static const struct snd_kcontrol_new rt298_rec_mix[] = {
391 SOC_DAPM_SINGLE("Mic1 Switch", RT298_REC_MIC_SWITCH,
392 RT298_MUTE_SFT, 1, 1),
393 SOC_DAPM_SINGLE("I2S Switch", RT298_REC_I2S_SWITCH,
394 RT298_MUTE_SFT, 1, 1),
395 SOC_DAPM_SINGLE("Line1 Switch", RT298_REC_LINE_SWITCH,
396 RT298_MUTE_SFT, 1, 1),
397 SOC_DAPM_SINGLE("Beep Switch", RT298_REC_BEEP_SWITCH,
398 RT298_MUTE_SFT, 1, 1),
399};
400
401static const struct snd_kcontrol_new spo_enable_control =
402 SOC_DAPM_SINGLE("Switch", RT298_SET_PIN_SPK,
403 RT298_SET_PIN_SFT, 1, 0);
404
405static const struct snd_kcontrol_new hpol_enable_control =
406 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOL_GAIN,
407 RT298_MUTE_SFT, 1, 1);
408
409static const struct snd_kcontrol_new hpor_enable_control =
410 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOR_GAIN,
411 RT298_MUTE_SFT, 1, 1);
412
413/* ADC0 source */
414static const char * const rt298_adc_src[] = {
415 "Mic", "RECMIX", "Dmic"
416};
417
418static const int rt298_adc_values[] = {
419 0, 4, 5,
420};
421
422static SOC_VALUE_ENUM_SINGLE_DECL(
423 rt298_adc0_enum, RT298_ADC0_MUX, RT298_ADC_SEL_SFT,
424 RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values);
425
426static const struct snd_kcontrol_new rt298_adc0_mux =
427 SOC_DAPM_ENUM("ADC 0 source", rt298_adc0_enum);
428
429static SOC_VALUE_ENUM_SINGLE_DECL(
430 rt298_adc1_enum, RT298_ADC1_MUX, RT298_ADC_SEL_SFT,
431 RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values);
432
433static const struct snd_kcontrol_new rt298_adc1_mux =
434 SOC_DAPM_ENUM("ADC 1 source", rt298_adc1_enum);
435
436static const char * const rt298_dac_src[] = {
437 "Front", "Surround"
438};
439/* HP-OUT source */
440static SOC_ENUM_SINGLE_DECL(rt298_hpo_enum, RT298_HPO_MUX,
441 0, rt298_dac_src);
442
443static const struct snd_kcontrol_new rt298_hpo_mux =
444SOC_DAPM_ENUM("HPO source", rt298_hpo_enum);
445
446/* SPK-OUT source */
447static SOC_ENUM_SINGLE_DECL(rt298_spo_enum, RT298_SPK_MUX,
448 0, rt298_dac_src);
449
450static const struct snd_kcontrol_new rt298_spo_mux =
451SOC_DAPM_ENUM("SPO source", rt298_spo_enum);
452
453static int rt298_spk_event(struct snd_soc_dapm_widget *w,
454 struct snd_kcontrol *kcontrol, int event)
455{
456 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
457
458 switch (event) {
459 case SND_SOC_DAPM_POST_PMU:
460 snd_soc_write(codec,
461 RT298_SPK_EAPD, RT298_SET_EAPD_HIGH);
462 break;
463 case SND_SOC_DAPM_PRE_PMD:
464 snd_soc_write(codec,
465 RT298_SPK_EAPD, RT298_SET_EAPD_LOW);
466 break;
467
468 default:
469 return 0;
470 }
471
472 return 0;
473}
474
475static int rt298_set_dmic1_event(struct snd_soc_dapm_widget *w,
476 struct snd_kcontrol *kcontrol, int event)
477{
478 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
479
480 switch (event) {
481 case SND_SOC_DAPM_POST_PMU:
482 snd_soc_write(codec, RT298_SET_PIN_DMIC1, 0x20);
483 break;
484 case SND_SOC_DAPM_PRE_PMD:
485 snd_soc_write(codec, RT298_SET_PIN_DMIC1, 0);
486 break;
487 default:
488 return 0;
489 }
490
491 return 0;
492}
493
494static int rt298_adc_event(struct snd_soc_dapm_widget *w,
495 struct snd_kcontrol *kcontrol, int event)
496{
497 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
498 unsigned int nid;
499
500 nid = (w->reg >> 20) & 0xff;
501
502 switch (event) {
503 case SND_SOC_DAPM_POST_PMU:
504 snd_soc_update_bits(codec,
505 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
506 0x7080, 0x7000);
Bard Liao3c9e0142016-04-26 18:07:10 +0800507 /* If MCLK doesn't exist, reset AD filter */
508 if (!(snd_soc_read(codec, RT298_VAD_CTRL) & 0x200)) {
509 pr_info("NO MCLK\n");
510 switch (nid) {
511 case RT298_ADC_IN1:
512 snd_soc_update_bits(codec,
513 RT298_D_FILTER_CTRL, 0x2, 0x2);
514 mdelay(10);
515 snd_soc_update_bits(codec,
516 RT298_D_FILTER_CTRL, 0x2, 0x0);
517 break;
518 case RT298_ADC_IN2:
519 snd_soc_update_bits(codec,
520 RT298_D_FILTER_CTRL, 0x4, 0x4);
521 mdelay(10);
522 snd_soc_update_bits(codec,
523 RT298_D_FILTER_CTRL, 0x4, 0x0);
524 break;
525 }
526 }
Bard Liao6adcafa2015-06-26 10:59:49 +0800527 break;
528 case SND_SOC_DAPM_PRE_PMD:
529 snd_soc_update_bits(codec,
530 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
531 0x7080, 0x7080);
532 break;
533 default:
534 return 0;
535 }
536
537 return 0;
538}
539
540static int rt298_mic1_event(struct snd_soc_dapm_widget *w,
541 struct snd_kcontrol *kcontrol, int event)
542{
543 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
544
545 switch (event) {
546 case SND_SOC_DAPM_PRE_PMU:
547 snd_soc_update_bits(codec,
548 RT298_A_BIAS_CTRL3, 0xc000, 0x8000);
549 snd_soc_update_bits(codec,
550 RT298_A_BIAS_CTRL2, 0xc000, 0x8000);
551 break;
552 case SND_SOC_DAPM_POST_PMD:
553 snd_soc_update_bits(codec,
554 RT298_A_BIAS_CTRL3, 0xc000, 0x0000);
555 snd_soc_update_bits(codec,
556 RT298_A_BIAS_CTRL2, 0xc000, 0x0000);
557 break;
558 default:
559 return 0;
560 }
561
562 return 0;
563}
564
Bard Liao6adcafa2015-06-26 10:59:49 +0800565static const struct snd_soc_dapm_widget rt298_dapm_widgets[] = {
566
567 SND_SOC_DAPM_SUPPLY_S("HV", 1, RT298_POWER_CTRL1,
568 12, 1, NULL, 0),
569 SND_SOC_DAPM_SUPPLY("VREF", RT298_POWER_CTRL1,
Bard Liao9ff49ce2016-04-26 18:07:11 +0800570 0, 1, NULL, 0),
Bard Liao6adcafa2015-06-26 10:59:49 +0800571 SND_SOC_DAPM_SUPPLY_S("BG_MBIAS", 1, RT298_POWER_CTRL2,
572 1, 0, NULL, 0),
573 SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT298_POWER_CTRL2,
574 2, 0, NULL, 0),
575 SND_SOC_DAPM_SUPPLY_S("LDO2", 1, RT298_POWER_CTRL2,
576 3, 0, NULL, 0),
577 SND_SOC_DAPM_SUPPLY_S("VREF1", 1, RT298_POWER_CTRL2,
578 4, 1, NULL, 0),
579 SND_SOC_DAPM_SUPPLY_S("LV", 2, RT298_POWER_CTRL1,
580 13, 1, NULL, 0),
581
582
583 SND_SOC_DAPM_SUPPLY("MCLK MODE", RT298_PLL_CTRL1,
584 5, 0, NULL, 0),
585 SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM,
586 0, 0, rt298_mic1_event, SND_SOC_DAPM_PRE_PMU |
587 SND_SOC_DAPM_POST_PMD),
588
589 /* Input Lines */
590 SND_SOC_DAPM_INPUT("DMIC1 Pin"),
591 SND_SOC_DAPM_INPUT("DMIC2 Pin"),
592 SND_SOC_DAPM_INPUT("MIC1"),
593 SND_SOC_DAPM_INPUT("LINE1"),
594 SND_SOC_DAPM_INPUT("Beep"),
595
596 /* DMIC */
597 SND_SOC_DAPM_PGA_E("DMIC1", RT298_SET_POWER(RT298_DMIC1), 0, 1,
598 NULL, 0, rt298_set_dmic1_event,
599 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
600 SND_SOC_DAPM_PGA("DMIC2", RT298_SET_POWER(RT298_DMIC2), 0, 1,
601 NULL, 0),
602 SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM,
603 0, 0, NULL, 0),
604
605 /* REC Mixer */
606 SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0,
607 rt298_rec_mix, ARRAY_SIZE(rt298_rec_mix)),
608
609 /* ADCs */
610 SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0),
611 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
612
613 /* ADC Mux */
614 SND_SOC_DAPM_MUX_E("ADC 0 Mux", RT298_SET_POWER(RT298_ADC_IN1), 0, 1,
615 &rt298_adc0_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD |
616 SND_SOC_DAPM_POST_PMU),
617 SND_SOC_DAPM_MUX_E("ADC 1 Mux", RT298_SET_POWER(RT298_ADC_IN2), 0, 1,
618 &rt298_adc1_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD |
619 SND_SOC_DAPM_POST_PMU),
620
621 /* Audio Interface */
622 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
623 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
624 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
625 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
626
627 /* Output Side */
628 /* DACs */
629 SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0),
630 SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0),
631
632 /* Output Mux */
633 SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt298_spo_mux),
634 SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt298_hpo_mux),
635
636 SND_SOC_DAPM_SUPPLY("HP Power", RT298_SET_PIN_HPO,
637 RT298_SET_PIN_SFT, 0, NULL, 0),
638
639 /* Output Mixer */
640 SND_SOC_DAPM_MIXER("Front", RT298_SET_POWER(RT298_DAC_OUT1), 0, 1,
641 rt298_front_mix, ARRAY_SIZE(rt298_front_mix)),
642 SND_SOC_DAPM_PGA("Surround", RT298_SET_POWER(RT298_DAC_OUT2), 0, 1,
643 NULL, 0),
644
645 /* Output Pga */
646 SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0,
647 &spo_enable_control, rt298_spk_event,
648 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
649 SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
650 &hpol_enable_control),
651 SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
652 &hpor_enable_control),
653
654 /* Output Lines */
655 SND_SOC_DAPM_OUTPUT("SPOL"),
656 SND_SOC_DAPM_OUTPUT("SPOR"),
657 SND_SOC_DAPM_OUTPUT("HPO Pin"),
658 SND_SOC_DAPM_OUTPUT("SPDIF"),
659};
660
661static const struct snd_soc_dapm_route rt298_dapm_routes[] = {
662
663 {"ADC 0", NULL, "MCLK MODE", is_mclk_mode},
664 {"ADC 1", NULL, "MCLK MODE", is_mclk_mode},
665 {"Front", NULL, "MCLK MODE", is_mclk_mode},
666 {"Surround", NULL, "MCLK MODE", is_mclk_mode},
667
668 {"HP Power", NULL, "LDO1"},
669 {"HP Power", NULL, "LDO2"},
670 {"HP Power", NULL, "LV"},
671 {"HP Power", NULL, "VREF1"},
672 {"HP Power", NULL, "BG_MBIAS"},
673
674 {"MIC1", NULL, "LDO1"},
675 {"MIC1", NULL, "LDO2"},
676 {"MIC1", NULL, "HV"},
677 {"MIC1", NULL, "LV"},
678 {"MIC1", NULL, "VREF"},
679 {"MIC1", NULL, "VREF1"},
680 {"MIC1", NULL, "BG_MBIAS"},
681 {"MIC1", NULL, "MIC1 Input Buffer"},
682
683 {"SPO", NULL, "LDO1"},
684 {"SPO", NULL, "LDO2"},
685 {"SPO", NULL, "HV"},
686 {"SPO", NULL, "LV"},
687 {"SPO", NULL, "VREF"},
688 {"SPO", NULL, "VREF1"},
689 {"SPO", NULL, "BG_MBIAS"},
690
691 {"DMIC1", NULL, "DMIC1 Pin"},
692 {"DMIC2", NULL, "DMIC2 Pin"},
693 {"DMIC1", NULL, "DMIC Receiver"},
694 {"DMIC2", NULL, "DMIC Receiver"},
695
696 {"RECMIX", "Beep Switch", "Beep"},
697 {"RECMIX", "Line1 Switch", "LINE1"},
698 {"RECMIX", "Mic1 Switch", "MIC1"},
699
700 {"ADC 0 Mux", "Dmic", "DMIC1"},
701 {"ADC 0 Mux", "RECMIX", "RECMIX"},
702 {"ADC 0 Mux", "Mic", "MIC1"},
703 {"ADC 1 Mux", "Dmic", "DMIC2"},
704 {"ADC 1 Mux", "RECMIX", "RECMIX"},
705 {"ADC 1 Mux", "Mic", "MIC1"},
706
707 {"ADC 0", NULL, "ADC 0 Mux"},
708 {"ADC 1", NULL, "ADC 1 Mux"},
709
710 {"AIF1TX", NULL, "ADC 0"},
711 {"AIF2TX", NULL, "ADC 1"},
712
713 {"DAC 0", NULL, "AIF1RX"},
714 {"DAC 1", NULL, "AIF2RX"},
715
716 {"Front", "DAC Switch", "DAC 0"},
717 {"Front", "RECMIX Switch", "RECMIX"},
718
719 {"Surround", NULL, "DAC 1"},
720
721 {"SPK Mux", "Front", "Front"},
722 {"SPK Mux", "Surround", "Surround"},
723
724 {"HPO Mux", "Front", "Front"},
725 {"HPO Mux", "Surround", "Surround"},
726
727 {"SPO", "Switch", "SPK Mux"},
728 {"HPO L", "Switch", "HPO Mux"},
729 {"HPO R", "Switch", "HPO Mux"},
730 {"HPO L", NULL, "HP Power"},
731 {"HPO R", NULL, "HP Power"},
732
733 {"SPOL", NULL, "SPO"},
734 {"SPOR", NULL, "SPO"},
735 {"HPO Pin", NULL, "HPO L"},
736 {"HPO Pin", NULL, "HPO R"},
737};
738
739static int rt298_hw_params(struct snd_pcm_substream *substream,
740 struct snd_pcm_hw_params *params,
741 struct snd_soc_dai *dai)
742{
743 struct snd_soc_codec *codec = dai->codec;
744 struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
745 unsigned int val = 0;
746 int d_len_code;
747
748 switch (params_rate(params)) {
749 /* bit 14 0:48K 1:44.1K */
750 case 44100:
751 case 48000:
752 break;
753 default:
754 dev_err(codec->dev, "Unsupported sample rate %d\n",
755 params_rate(params));
756 return -EINVAL;
757 }
758 switch (rt298->sys_clk) {
759 case 12288000:
760 case 24576000:
761 if (params_rate(params) != 48000) {
762 dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
763 params_rate(params), rt298->sys_clk);
764 return -EINVAL;
765 }
766 break;
767 case 11289600:
768 case 22579200:
769 if (params_rate(params) != 44100) {
770 dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
771 params_rate(params), rt298->sys_clk);
772 return -EINVAL;
773 }
774 break;
775 }
776
777 if (params_channels(params) <= 16) {
778 /* bit 3:0 Number of Channel */
779 val |= (params_channels(params) - 1);
780 } else {
781 dev_err(codec->dev, "Unsupported channels %d\n",
782 params_channels(params));
783 return -EINVAL;
784 }
785
786 d_len_code = 0;
787 switch (params_width(params)) {
788 /* bit 6:4 Bits per Sample */
789 case 16:
790 d_len_code = 0;
791 val |= (0x1 << 4);
792 break;
793 case 32:
794 d_len_code = 2;
795 val |= (0x4 << 4);
796 break;
797 case 20:
798 d_len_code = 1;
799 val |= (0x2 << 4);
800 break;
801 case 24:
802 d_len_code = 2;
803 val |= (0x3 << 4);
804 break;
805 case 8:
806 d_len_code = 3;
807 break;
808 default:
809 return -EINVAL;
810 }
811
812 snd_soc_update_bits(codec,
813 RT298_I2S_CTRL1, 0x0018, d_len_code << 3);
814 dev_dbg(codec->dev, "format val = 0x%x\n", val);
815
816 snd_soc_update_bits(codec, RT298_DAC_FORMAT, 0x407f, val);
817 snd_soc_update_bits(codec, RT298_ADC_FORMAT, 0x407f, val);
818
819 return 0;
820}
821
822static int rt298_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
823{
824 struct snd_soc_codec *codec = dai->codec;
825
826 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
827 case SND_SOC_DAIFMT_CBM_CFM:
828 snd_soc_update_bits(codec,
829 RT298_I2S_CTRL1, 0x800, 0x800);
830 break;
831 case SND_SOC_DAIFMT_CBS_CFS:
832 snd_soc_update_bits(codec,
833 RT298_I2S_CTRL1, 0x800, 0x0);
834 break;
835 default:
836 return -EINVAL;
837 }
838
839 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
840 case SND_SOC_DAIFMT_I2S:
841 snd_soc_update_bits(codec,
842 RT298_I2S_CTRL1, 0x300, 0x0);
843 break;
844 case SND_SOC_DAIFMT_LEFT_J:
845 snd_soc_update_bits(codec,
846 RT298_I2S_CTRL1, 0x300, 0x1 << 8);
847 break;
848 case SND_SOC_DAIFMT_DSP_A:
849 snd_soc_update_bits(codec,
850 RT298_I2S_CTRL1, 0x300, 0x2 << 8);
851 break;
852 case SND_SOC_DAIFMT_DSP_B:
853 snd_soc_update_bits(codec,
854 RT298_I2S_CTRL1, 0x300, 0x3 << 8);
855 break;
856 default:
857 return -EINVAL;
858 }
859 /* bit 15 Stream Type 0:PCM 1:Non-PCM */
860 snd_soc_update_bits(codec, RT298_DAC_FORMAT, 0x8000, 0);
861 snd_soc_update_bits(codec, RT298_ADC_FORMAT, 0x8000, 0);
862
863 return 0;
864}
865
866static int rt298_set_dai_sysclk(struct snd_soc_dai *dai,
867 int clk_id, unsigned int freq, int dir)
868{
869 struct snd_soc_codec *codec = dai->codec;
870 struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
871
872 dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq);
873
874 if (RT298_SCLK_S_MCLK == clk_id) {
875 snd_soc_update_bits(codec,
876 RT298_I2S_CTRL2, 0x0100, 0x0);
877 snd_soc_update_bits(codec,
878 RT298_PLL_CTRL1, 0x20, 0x20);
879 } else {
880 snd_soc_update_bits(codec,
881 RT298_I2S_CTRL2, 0x0100, 0x0100);
882 snd_soc_update_bits(codec,
Bard Liao6adcafa2015-06-26 10:59:49 +0800883 RT298_PLL_CTRL1, 0x20, 0x0);
884 }
885
886 switch (freq) {
887 case 19200000:
888 if (RT298_SCLK_S_MCLK == clk_id) {
889 dev_err(codec->dev, "Should not use MCLK\n");
890 return -EINVAL;
891 }
892 snd_soc_update_bits(codec,
893 RT298_I2S_CTRL2, 0x40, 0x40);
894 break;
895 case 24000000:
896 if (RT298_SCLK_S_MCLK == clk_id) {
897 dev_err(codec->dev, "Should not use MCLK\n");
898 return -EINVAL;
899 }
900 snd_soc_update_bits(codec,
901 RT298_I2S_CTRL2, 0x40, 0x0);
902 break;
903 case 12288000:
904 case 11289600:
905 snd_soc_update_bits(codec,
906 RT298_I2S_CTRL2, 0x8, 0x0);
907 snd_soc_update_bits(codec,
908 RT298_CLK_DIV, 0xfc1e, 0x0004);
909 break;
910 case 24576000:
911 case 22579200:
912 snd_soc_update_bits(codec,
913 RT298_I2S_CTRL2, 0x8, 0x8);
914 snd_soc_update_bits(codec,
915 RT298_CLK_DIV, 0xfc1e, 0x5406);
916 break;
917 default:
918 dev_err(codec->dev, "Unsupported system clock\n");
919 return -EINVAL;
920 }
921
922 rt298->sys_clk = freq;
923 rt298->clk_id = clk_id;
924
925 return 0;
926}
927
928static int rt298_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
929{
930 struct snd_soc_codec *codec = dai->codec;
931
932 dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio);
933 if (50 == ratio)
934 snd_soc_update_bits(codec,
935 RT298_I2S_CTRL1, 0x1000, 0x1000);
936 else
937 snd_soc_update_bits(codec,
938 RT298_I2S_CTRL1, 0x1000, 0x0);
939
940
941 return 0;
942}
943
944static int rt298_set_bias_level(struct snd_soc_codec *codec,
945 enum snd_soc_bias_level level)
946{
947 switch (level) {
948 case SND_SOC_BIAS_PREPARE:
949 if (SND_SOC_BIAS_STANDBY ==
950 snd_soc_codec_get_bias_level(codec)) {
951 snd_soc_write(codec,
952 RT298_SET_AUDIO_POWER, AC_PWRST_D0);
953 snd_soc_update_bits(codec, 0x0d, 0x200, 0x200);
954 snd_soc_update_bits(codec, 0x52, 0x80, 0x0);
955 mdelay(20);
956 snd_soc_update_bits(codec, 0x0d, 0x200, 0x0);
957 snd_soc_update_bits(codec, 0x52, 0x80, 0x80);
958 }
959 break;
960
Bard Liao6adcafa2015-06-26 10:59:49 +0800961 case SND_SOC_BIAS_STANDBY:
962 snd_soc_write(codec,
963 RT298_SET_AUDIO_POWER, AC_PWRST_D3);
Bard Liao6adcafa2015-06-26 10:59:49 +0800964 break;
965
966 default:
967 break;
968 }
969
970 return 0;
971}
972
973static irqreturn_t rt298_irq(int irq, void *data)
974{
975 struct rt298_priv *rt298 = data;
976 bool hp = false;
977 bool mic = false;
978 int ret, status = 0;
979
980 ret = rt298_jack_detect(rt298, &hp, &mic);
981
982 /* Clear IRQ */
983 regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x1, 0x1);
984
985 if (ret == 0) {
986 if (hp == true)
987 status |= SND_JACK_HEADPHONE;
988
989 if (mic == true)
990 status |= SND_JACK_MICROPHONE;
991
992 snd_soc_jack_report(rt298->jack, status,
993 SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
994
995 pm_wakeup_event(&rt298->i2c->dev, 300);
996 }
997
998 return IRQ_HANDLED;
999}
1000
1001static int rt298_probe(struct snd_soc_codec *codec)
1002{
1003 struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1004
1005 rt298->codec = codec;
1006
1007 if (rt298->i2c->irq) {
1008 regmap_update_bits(rt298->regmap,
1009 RT298_IRQ_CTRL, 0x2, 0x2);
1010
1011 INIT_DELAYED_WORK(&rt298->jack_detect_work,
1012 rt298_jack_detect_work);
1013 schedule_delayed_work(&rt298->jack_detect_work,
1014 msecs_to_jiffies(1250));
1015 }
1016
1017 return 0;
1018}
1019
1020static int rt298_remove(struct snd_soc_codec *codec)
1021{
1022 struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1023
1024 cancel_delayed_work_sync(&rt298->jack_detect_work);
1025
1026 return 0;
1027}
1028
1029#ifdef CONFIG_PM
1030static int rt298_suspend(struct snd_soc_codec *codec)
1031{
1032 struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1033
1034 rt298->is_hp_in = -1;
1035 regcache_cache_only(rt298->regmap, true);
1036 regcache_mark_dirty(rt298->regmap);
1037
1038 return 0;
1039}
1040
1041static int rt298_resume(struct snd_soc_codec *codec)
1042{
1043 struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1044
1045 regcache_cache_only(rt298->regmap, false);
1046 rt298_index_sync(codec);
1047 regcache_sync(rt298->regmap);
1048
1049 return 0;
1050}
1051#else
1052#define rt298_suspend NULL
1053#define rt298_resume NULL
1054#endif
1055
1056#define RT298_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
1057#define RT298_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1058 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1059
1060static const struct snd_soc_dai_ops rt298_aif_dai_ops = {
1061 .hw_params = rt298_hw_params,
1062 .set_fmt = rt298_set_dai_fmt,
1063 .set_sysclk = rt298_set_dai_sysclk,
1064 .set_bclk_ratio = rt298_set_bclk_ratio,
1065};
1066
1067static struct snd_soc_dai_driver rt298_dai[] = {
1068 {
1069 .name = "rt298-aif1",
1070 .id = RT298_AIF1,
1071 .playback = {
1072 .stream_name = "AIF1 Playback",
1073 .channels_min = 1,
1074 .channels_max = 2,
1075 .rates = RT298_STEREO_RATES,
1076 .formats = RT298_FORMATS,
1077 },
1078 .capture = {
1079 .stream_name = "AIF1 Capture",
1080 .channels_min = 1,
1081 .channels_max = 2,
1082 .rates = RT298_STEREO_RATES,
1083 .formats = RT298_FORMATS,
1084 },
1085 .ops = &rt298_aif_dai_ops,
1086 .symmetric_rates = 1,
1087 },
1088 {
1089 .name = "rt298-aif2",
1090 .id = RT298_AIF2,
1091 .playback = {
1092 .stream_name = "AIF2 Playback",
1093 .channels_min = 1,
1094 .channels_max = 2,
1095 .rates = RT298_STEREO_RATES,
1096 .formats = RT298_FORMATS,
1097 },
1098 .capture = {
1099 .stream_name = "AIF2 Capture",
1100 .channels_min = 1,
1101 .channels_max = 2,
1102 .rates = RT298_STEREO_RATES,
1103 .formats = RT298_FORMATS,
1104 },
1105 .ops = &rt298_aif_dai_ops,
1106 .symmetric_rates = 1,
1107 },
1108
1109};
1110
1111static struct snd_soc_codec_driver soc_codec_dev_rt298 = {
1112 .probe = rt298_probe,
1113 .remove = rt298_remove,
1114 .suspend = rt298_suspend,
1115 .resume = rt298_resume,
1116 .set_bias_level = rt298_set_bias_level,
1117 .idle_bias_off = true,
Kuninori Morimotob5c998b2016-08-08 09:21:37 +00001118 .component_driver = {
1119 .controls = rt298_snd_controls,
1120 .num_controls = ARRAY_SIZE(rt298_snd_controls),
1121 .dapm_widgets = rt298_dapm_widgets,
1122 .num_dapm_widgets = ARRAY_SIZE(rt298_dapm_widgets),
1123 .dapm_routes = rt298_dapm_routes,
1124 .num_dapm_routes = ARRAY_SIZE(rt298_dapm_routes),
1125 },
Bard Liao6adcafa2015-06-26 10:59:49 +08001126};
1127
1128static const struct regmap_config rt298_regmap = {
1129 .reg_bits = 32,
1130 .val_bits = 32,
1131 .max_register = 0x02370100,
1132 .volatile_reg = rt298_volatile_register,
1133 .readable_reg = rt298_readable_register,
1134 .reg_write = rl6347a_hw_write,
1135 .reg_read = rl6347a_hw_read,
1136 .cache_type = REGCACHE_RBTREE,
1137 .reg_defaults = rt298_reg,
1138 .num_reg_defaults = ARRAY_SIZE(rt298_reg),
1139};
1140
1141static const struct i2c_device_id rt298_i2c_id[] = {
1142 {"rt298", 0},
1143 {}
1144};
1145MODULE_DEVICE_TABLE(i2c, rt298_i2c_id);
1146
1147static const struct acpi_device_id rt298_acpi_match[] = {
1148 { "INT343A", 0 },
1149 {},
1150};
1151MODULE_DEVICE_TABLE(acpi, rt298_acpi_match);
1152
Vinod Koulb9c17f12016-05-12 09:38:50 +05301153static const struct dmi_system_id force_combo_jack_table[] = {
1154 {
1155 .ident = "Intel Broxton P",
1156 .matches = {
1157 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp"),
1158 DMI_MATCH(DMI_PRODUCT_NAME, "Broxton P")
1159 }
1160 },
1161 { }
1162};
1163
Bard Liao6adcafa2015-06-26 10:59:49 +08001164static int rt298_i2c_probe(struct i2c_client *i2c,
1165 const struct i2c_device_id *id)
1166{
1167 struct rt298_platform_data *pdata = dev_get_platdata(&i2c->dev);
1168 struct rt298_priv *rt298;
1169 struct device *dev = &i2c->dev;
1170 const struct acpi_device_id *acpiid;
1171 int i, ret;
1172
Bard Liao6adcafa2015-06-26 10:59:49 +08001173 rt298 = devm_kzalloc(&i2c->dev, sizeof(*rt298),
1174 GFP_KERNEL);
1175 if (NULL == rt298)
1176 return -ENOMEM;
1177
1178 rt298->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt298_regmap);
1179 if (IS_ERR(rt298->regmap)) {
1180 ret = PTR_ERR(rt298->regmap);
1181 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1182 ret);
1183 return ret;
1184 }
1185
1186 regmap_read(rt298->regmap,
1187 RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &ret);
1188 if (ret != RT298_VENDOR_ID) {
1189 dev_err(&i2c->dev,
1190 "Device with ID register %#x is not rt298\n", ret);
1191 return -ENODEV;
1192 }
1193
Axel Lin3943b9e2015-10-05 21:23:48 +08001194 rt298->index_cache = devm_kmemdup(&i2c->dev, rt298_index_def,
1195 sizeof(rt298_index_def), GFP_KERNEL);
1196 if (!rt298->index_cache)
1197 return -ENOMEM;
1198
Bard Liao6adcafa2015-06-26 10:59:49 +08001199 rt298->index_cache_size = INDEX_CACHE_SIZE;
1200 rt298->i2c = i2c;
1201 i2c_set_clientdata(i2c, rt298);
1202
1203 /* restore codec default */
1204 for (i = 0; i < INDEX_CACHE_SIZE; i++)
1205 regmap_write(rt298->regmap, rt298->index_cache[i].reg,
1206 rt298->index_cache[i].def);
1207 for (i = 0; i < ARRAY_SIZE(rt298_reg); i++)
1208 regmap_write(rt298->regmap, rt298_reg[i].reg,
1209 rt298_reg[i].def);
1210
1211 if (pdata)
1212 rt298->pdata = *pdata;
1213
1214 /* enable jack combo mode on supported devices */
1215 acpiid = acpi_match_device(dev->driver->acpi_match_table, dev);
Vinod Koulbb7cb542016-05-12 09:38:49 +05301216 if (acpiid && acpiid->driver_data) {
Bard Liao6adcafa2015-06-26 10:59:49 +08001217 rt298->pdata = *(struct rt298_platform_data *)
1218 acpiid->driver_data;
1219 }
1220
Vinod Koulb9c17f12016-05-12 09:38:50 +05301221 if (dmi_check_system(force_combo_jack_table)) {
1222 rt298->pdata.cbj_en = true;
1223 rt298->pdata.gpio2_en = false;
1224 }
1225
Bard Liao6adcafa2015-06-26 10:59:49 +08001226 /* VREF Charging */
1227 regmap_update_bits(rt298->regmap, 0x04, 0x80, 0x80);
1228 regmap_update_bits(rt298->regmap, 0x1b, 0x860, 0x860);
1229 /* Vref2 */
1230 regmap_update_bits(rt298->regmap, 0x08, 0x20, 0x20);
1231
1232 regmap_write(rt298->regmap, RT298_SET_AUDIO_POWER, AC_PWRST_D3);
1233
1234 for (i = 0; i < RT298_POWER_REG_LEN; i++)
1235 regmap_write(rt298->regmap,
1236 RT298_SET_POWER(rt298_support_power_controls[i]),
1237 AC_PWRST_D1);
1238
1239 if (!rt298->pdata.cbj_en) {
1240 regmap_write(rt298->regmap, RT298_CBJ_CTRL2, 0x0000);
1241 regmap_write(rt298->regmap, RT298_MIC1_DET_CTRL, 0x0816);
1242 regmap_update_bits(rt298->regmap,
1243 RT298_CBJ_CTRL1, 0xf000, 0xb000);
1244 } else {
1245 regmap_update_bits(rt298->regmap,
1246 RT298_CBJ_CTRL1, 0xf000, 0x5000);
1247 }
1248
1249 mdelay(10);
1250
1251 if (!rt298->pdata.gpio2_en)
Bard Liaof8f2dc42015-10-21 16:18:18 +08001252 regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0x40);
Bard Liao6adcafa2015-06-26 10:59:49 +08001253 else
1254 regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0);
1255
1256 mdelay(10);
1257
1258 regmap_write(rt298->regmap, RT298_MISC_CTRL1, 0x0000);
1259 regmap_update_bits(rt298->regmap,
1260 RT298_WIND_FILTER_CTRL, 0x0082, 0x0082);
Bard Liao4b2fe382016-02-24 15:51:26 +08001261
1262 regmap_write(rt298->regmap, RT298_UNSOLICITED_INLINE_CMD, 0x81);
1263 regmap_write(rt298->regmap, RT298_UNSOLICITED_HP_OUT, 0x82);
1264 regmap_write(rt298->regmap, RT298_UNSOLICITED_MIC1, 0x84);
1265 regmap_update_bits(rt298->regmap, RT298_IRQ_FLAG_CTRL, 0x2, 0x2);
1266
Bard Liao6adcafa2015-06-26 10:59:49 +08001267 rt298->is_hp_in = -1;
1268
1269 if (rt298->i2c->irq) {
1270 ret = request_threaded_irq(rt298->i2c->irq, NULL, rt298_irq,
1271 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt298", rt298);
1272 if (ret != 0) {
1273 dev_err(&i2c->dev,
1274 "Failed to reguest IRQ: %d\n", ret);
1275 return ret;
1276 }
1277 }
1278
1279 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt298,
1280 rt298_dai, ARRAY_SIZE(rt298_dai));
1281
1282 return ret;
1283}
1284
1285static int rt298_i2c_remove(struct i2c_client *i2c)
1286{
1287 struct rt298_priv *rt298 = i2c_get_clientdata(i2c);
1288
1289 if (i2c->irq)
1290 free_irq(i2c->irq, rt298);
1291 snd_soc_unregister_codec(&i2c->dev);
1292
1293 return 0;
1294}
1295
1296
1297static struct i2c_driver rt298_i2c_driver = {
1298 .driver = {
1299 .name = "rt298",
Bard Liao6adcafa2015-06-26 10:59:49 +08001300 .acpi_match_table = ACPI_PTR(rt298_acpi_match),
1301 },
1302 .probe = rt298_i2c_probe,
1303 .remove = rt298_i2c_remove,
1304 .id_table = rt298_i2c_id,
1305};
1306
1307module_i2c_driver(rt298_i2c_driver);
1308
1309MODULE_DESCRIPTION("ASoC RT298 driver");
1310MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1311MODULE_LICENSE("GPL");