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Sekhar Nori27e6e0d2012-08-29 23:25:27 +05301/*
2 * Device Tree for DA850 EVM board
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation, version 2.
9 */
10/dts-v1/;
Philip Avinasha2bcd772013-06-14 15:15:53 +053011#include "da850.dtsi"
Sekhar Nori27e6e0d2012-08-29 23:25:27 +053012
13/ {
14 compatible = "ti,da850-evm", "ti,da850";
15 model = "DA850/AM1808/OMAP-L138 EVM";
16
David Lechnerc2a3b4b2016-04-01 17:42:03 +020017 soc@1c00000 {
18 pmx_core: pinmux@14120 {
Kumar, Anil1faaba32013-01-16 14:37:39 +053019 status = "okay";
Peter Ujfalusi4ec582e2014-08-01 09:13:28 +030020
21 mcasp0_pins: pinmux_mcasp0_pins {
22 pinctrl-single,bits = <
23 /*
24 * AHCLKX, ACLKX, AFSX, AHCLKR, ACLKR,
25 * AFSR, AMUTE
26 */
27 0x00 0x11111111 0xffffffff
28 /* AXR11, AXR12 */
29 0x04 0x00011000 0x000ff000
30 >;
31 };
Karl Beldan31e3a882016-08-16 22:33:37 +000032 nand_pins: nand_pins {
33 pinctrl-single,bits = <
34 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[4], EMA_CS[3] */
35 0x1c 0x10110110 0xf0ff0ff0
36 /*
37 * EMA_D[0], EMA_D[1], EMA_D[2],
38 * EMA_D[3], EMA_D[4], EMA_D[5],
39 * EMA_D[6], EMA_D[7]
40 */
41 0x24 0x11111111 0xffffffff
42 /* EMA_A[1], EMA_A[2] */
43 0x30 0x01100000 0x0ff00000
44 >;
45 };
Kumar, Anil1faaba32013-01-16 14:37:39 +053046 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020047 serial0: serial@42000 {
Sekhar Nori27e6e0d2012-08-29 23:25:27 +053048 status = "okay";
49 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020050 serial1: serial@10c000 {
Sekhar Nori27e6e0d2012-08-29 23:25:27 +053051 status = "okay";
52 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020053 serial2: serial@10d000 {
Sekhar Nori27e6e0d2012-08-29 23:25:27 +053054 status = "okay";
55 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020056 rtc0: rtc@23000 {
Mrugesh Katepallewar16616362013-01-28 13:17:48 +053057 status = "okay";
58 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020059 i2c0: i2c@22000 {
Vishwanathrao Badarkhe, Manish01729cc2013-02-06 15:06:22 +053060 status = "okay";
61 clock-frequency = <100000>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&i2c0_pins>;
Vishwanathrao Badarkhe, Manishc3847a32013-03-07 11:56:21 +053064
65 tps: tps@48 {
66 reg = <0x48>;
67 };
Peter Ujfalusi204a87e2014-08-01 09:13:29 +030068 tlv320aic3106: tlv320aic3106@18 {
Peter Ujfalusi3f526692014-08-01 09:13:30 +030069 #sound-dai-cells = <0>;
Peter Ujfalusi204a87e2014-08-01 09:13:29 +030070 compatible = "ti,tlv320aic3106";
71 reg = <0x18>;
72 status = "okay";
73
74 /* Regulators */
75 IOVDD-supply = <&vdcdc2_reg>;
76 /* Derived from VBAT: Baseboard 3.3V / 1.8V */
77 AVDD-supply = <&vbat>;
78 DRVDD-supply = <&vbat>;
79 DVDD-supply = <&vbat>;
80 };
81
Vishwanathrao Badarkhe, Manish01729cc2013-02-06 15:06:22 +053082 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020083 wdt: wdt@21000 {
Kumar, Anil518f97d2013-02-06 09:30:03 +053084 status = "okay";
85 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020086 mmc0: mmc@40000 {
Manjunathappa, Prakash88df4122013-03-28 18:42:01 +053087 max-frequency = <50000000>;
88 bus-width = <4>;
89 status = "okay";
90 pinctrl-names = "default";
91 pinctrl-0 = <&mmc0_pins>;
92 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +020093 spi1: spi@30e000 {
Manjunathappa, Prakash4f4d9d42013-04-03 19:39:10 +053094 status = "okay";
95 pinctrl-names = "default";
96 pinctrl-0 = <&spi1_pins &spi1_cs0_pin>;
97 flash: m25p80@0 {
98 #address-cells = <1>;
99 #size-cells = <1>;
100 compatible = "m25p64";
101 spi-max-frequency = <30000000>;
102 reg = <0>;
103 partition@0 {
104 label = "U-Boot-SPL";
105 reg = <0x00000000 0x00010000>;
106 read-only;
107 };
108 partition@1 {
109 label = "U-Boot";
110 reg = <0x00010000 0x00080000>;
111 read-only;
112 };
113 partition@2 {
114 label = "U-Boot-Env";
115 reg = <0x00090000 0x00010000>;
116 read-only;
117 };
118 partition@3 {
119 label = "Kernel";
120 reg = <0x000a0000 0x00280000>;
121 };
122 partition@4 {
123 label = "Filesystem";
124 reg = <0x00320000 0x00400000>;
125 };
126 partition@5 {
127 label = "MAC-Address";
128 reg = <0x007f0000 0x00010000>;
129 read-only;
130 };
131 };
132 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +0200133 mdio: mdio@224000 {
Lad, Prabhakar609f4bc2013-08-15 11:31:34 +0530134 status = "okay";
135 pinctrl-names = "default";
136 pinctrl-0 = <&mdio_pins>;
137 bus_freq = <2200000>;
138 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +0200139 eth0: ethernet@220000 {
Lad, Prabhakardd7deaf2013-08-16 22:37:09 +0530140 status = "okay";
141 pinctrl-names = "default";
142 pinctrl-0 = <&mii_pins>;
143 };
David Lechnerc2a3b4b2016-04-01 17:42:03 +0200144 gpio: gpio@226000 {
KV Sujith3a9574f2013-11-21 23:45:31 +0530145 status = "okay";
146 };
Sekhar Nori27e6e0d2012-08-29 23:25:27 +0530147 };
Javier Martinez Canillas0b0d9122016-08-01 12:46:59 -0400148 vbat: fixedregulator0 {
Vishwanathrao Badarkhe, Manishc3847a32013-03-07 11:56:21 +0530149 compatible = "regulator-fixed";
150 regulator-name = "vbat";
151 regulator-min-microvolt = <5000000>;
152 regulator-max-microvolt = <5000000>;
153 regulator-boot-on;
154 };
Peter Ujfalusi3f526692014-08-01 09:13:30 +0300155
156 sound {
157 compatible = "simple-audio-card";
158 simple-audio-card,name = "DA850/OMAP-L138 EVM";
159 simple-audio-card,widgets =
160 "Line", "Line In",
161 "Line", "Line Out";
162 simple-audio-card,routing =
163 "LINE1L", "Line In",
164 "LINE1R", "Line In",
165 "Line Out", "LLOUT",
166 "Line Out", "RLOUT";
167 simple-audio-card,format = "dsp_b";
168 simple-audio-card,bitclock-master = <&link0_codec>;
169 simple-audio-card,frame-master = <&link0_codec>;
170 simple-audio-card,bitclock-inversion;
171
172 simple-audio-card,cpu {
173 sound-dai = <&mcasp0>;
174 system-clock-frequency = <24576000>;
175 };
176
177 link0_codec: simple-audio-card,codec {
178 sound-dai = <&tlv320aic3106>;
179 system-clock-frequency = <24576000>;
180 };
181 };
Vishwanathrao Badarkhe, Manishc3847a32013-03-07 11:56:21 +0530182};
183
184/include/ "tps6507x.dtsi"
185
186&tps {
187 vdcdc1_2-supply = <&vbat>;
188 vdcdc3-supply = <&vbat>;
189 vldo1_2-supply = <&vbat>;
190
191 regulators {
192 vdcdc1_reg: regulator@0 {
193 regulator-name = "VDCDC1_3.3V";
194 regulator-min-microvolt = <3150000>;
195 regulator-max-microvolt = <3450000>;
196 regulator-always-on;
197 regulator-boot-on;
198 };
199
200 vdcdc2_reg: regulator@1 {
201 regulator-name = "VDCDC2_3.3V";
202 regulator-min-microvolt = <1710000>;
203 regulator-max-microvolt = <3450000>;
204 regulator-always-on;
205 regulator-boot-on;
206 ti,defdcdc_default = <1>;
207 };
208
209 vdcdc3_reg: regulator@2 {
210 regulator-name = "VDCDC3_1.2V";
211 regulator-min-microvolt = <950000>;
212 regulator-max-microvolt = <1350000>;
213 regulator-always-on;
214 regulator-boot-on;
215 ti,defdcdc_default = <1>;
216 };
217
218 ldo1_reg: regulator@3 {
219 regulator-name = "LDO1_1.8V";
220 regulator-min-microvolt = <1710000>;
221 regulator-max-microvolt = <1890000>;
222 regulator-always-on;
223 regulator-boot-on;
224 };
225
226 ldo2_reg: regulator@4 {
227 regulator-name = "LDO2_1.2V";
228 regulator-min-microvolt = <1140000>;
229 regulator-max-microvolt = <1320000>;
230 regulator-always-on;
231 regulator-boot-on;
232 };
233 };
Sekhar Nori27e6e0d2012-08-29 23:25:27 +0530234};
Peter Ujfalusi4ec582e2014-08-01 09:13:28 +0300235
236&mcasp0 {
Peter Ujfalusi3f526692014-08-01 09:13:30 +0300237 #sound-dai-cells = <0>;
Peter Ujfalusi4ec582e2014-08-01 09:13:28 +0300238 status = "okay";
239 pinctrl-names = "default";
240 pinctrl-0 = <&mcasp0_pins>;
241
242 op-mode = <0>; /* MCASP_IIS_MODE */
243 tdm-slots = <2>;
244 /* 4 serializer */
245 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
246 0 0 0 0
247 0 0 0 0
248 0 0 0 1
249 2 0 0 0
250 >;
251 tx-num-evt = <32>;
252 rx-num-evt = <32>;
253};
Peter Ujfalusi7a7faed2015-12-17 15:27:48 +0200254
255&edma0 {
256 ti,edma-reserved-slot-ranges = <32 50>;
257};
Peter Ujfalusib47a8562015-12-17 15:27:49 +0200258
259&edma1 {
260 ti,edma-reserved-slot-ranges = <32 90>;
261};
Karl Beldan31e3a882016-08-16 22:33:37 +0000262
263&aemif {
264 pinctrl-names = "default";
265 pinctrl-0 = <&nand_pins>;
266 status = "ok";
267 cs3 {
268 #address-cells = <2>;
269 #size-cells = <1>;
270 clock-ranges;
271 ranges;
272
273 ti,cs-chipselect = <3>;
274
275 nand@2000000,0 {
276 compatible = "ti,davinci-nand";
277 #address-cells = <1>;
278 #size-cells = <1>;
279 reg = <0 0x02000000 0x02000000
280 1 0x00000000 0x00008000>;
281
282 ti,davinci-chipselect = <1>;
283 ti,davinci-mask-ale = <0>;
284 ti,davinci-mask-cle = <0>;
285 ti,davinci-mask-chipsel = <0>;
286 ti,davinci-ecc-mode = "hw";
287 ti,davinci-ecc-bits = <4>;
288 ti,davinci-nand-use-bbt;
289 };
290 };
291};