Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/include/linux/clk-private.h |
| 3 | * |
| 4 | * Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com> |
| 5 | * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #ifndef __LINUX_CLK_PRIVATE_H |
| 12 | #define __LINUX_CLK_PRIVATE_H |
| 13 | |
| 14 | #include <linux/clk-provider.h> |
| 15 | #include <linux/list.h> |
| 16 | |
| 17 | /* |
| 18 | * WARNING: Do not include clk-private.h from any file that implements struct |
| 19 | * clk_ops. Doing so is a layering violation! |
| 20 | * |
| 21 | * This header exists only to allow for statically initialized clock data. Any |
| 22 | * static clock data must be defined in a separate file from the logic that |
| 23 | * implements the clock operations for that same data. |
| 24 | */ |
| 25 | |
| 26 | #ifdef CONFIG_COMMON_CLK |
| 27 | |
| 28 | struct clk { |
| 29 | const char *name; |
| 30 | const struct clk_ops *ops; |
| 31 | struct clk_hw *hw; |
| 32 | struct clk *parent; |
Mark Brown | d305fb7 | 2012-03-21 20:01:20 +0000 | [diff] [blame] | 33 | const char **parent_names; |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 34 | struct clk **parents; |
| 35 | u8 num_parents; |
| 36 | unsigned long rate; |
| 37 | unsigned long new_rate; |
| 38 | unsigned long flags; |
| 39 | unsigned int enable_count; |
| 40 | unsigned int prepare_count; |
| 41 | struct hlist_head children; |
| 42 | struct hlist_node child_node; |
| 43 | unsigned int notifier_count; |
| 44 | #ifdef CONFIG_COMMON_CLK_DEBUG |
| 45 | struct dentry *dentry; |
| 46 | #endif |
| 47 | }; |
| 48 | |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 49 | /* |
| 50 | * DOC: Basic clock implementations common to many platforms |
| 51 | * |
| 52 | * Each basic clock hardware type is comprised of a structure describing the |
| 53 | * clock hardware, implementations of the relevant callbacks in struct clk_ops, |
| 54 | * unique flags for that hardware type, a registration function and an |
| 55 | * alternative macro for static initialization |
| 56 | */ |
| 57 | |
Viresh Kumar | 182f9e8c | 2012-04-17 16:45:36 +0530 | [diff] [blame] | 58 | #define DEFINE_CLK(_name, _ops, _flags, _parent_names, \ |
| 59 | _parents) \ |
| 60 | static struct clk _name = { \ |
| 61 | .name = #_name, \ |
| 62 | .ops = &_ops, \ |
| 63 | .hw = &_name##_hw.hw, \ |
| 64 | .parent_names = _parent_names, \ |
| 65 | .num_parents = ARRAY_SIZE(_parent_names), \ |
| 66 | .parents = _parents, \ |
| 67 | .flags = _flags, \ |
| 68 | } |
| 69 | |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 70 | #define DEFINE_CLK_FIXED_RATE(_name, _flags, _rate, \ |
| 71 | _fixed_rate_flags) \ |
| 72 | static struct clk _name; \ |
Rajendra Nayak | e447c50 | 2012-04-27 17:58:13 +0530 | [diff] [blame^] | 73 | static const char *_name##_parent_names[] = {}; \ |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 74 | static struct clk_fixed_rate _name##_hw = { \ |
| 75 | .hw = { \ |
| 76 | .clk = &_name, \ |
| 77 | }, \ |
| 78 | .fixed_rate = _rate, \ |
| 79 | .flags = _fixed_rate_flags, \ |
| 80 | }; \ |
Viresh Kumar | 182f9e8c | 2012-04-17 16:45:36 +0530 | [diff] [blame] | 81 | DEFINE_CLK(_name, clk_fixed_rate_ops, _flags, \ |
| 82 | _name##_parent_names, NULL); |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 83 | |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 84 | #define DEFINE_CLK_GATE(_name, _parent_name, _parent_ptr, \ |
| 85 | _flags, _reg, _bit_idx, \ |
| 86 | _gate_flags, _lock) \ |
| 87 | static struct clk _name; \ |
Rajendra Nayak | e447c50 | 2012-04-27 17:58:13 +0530 | [diff] [blame^] | 88 | static const char *_name##_parent_names[] = { \ |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 89 | _parent_name, \ |
| 90 | }; \ |
| 91 | static struct clk *_name##_parents[] = { \ |
| 92 | _parent_ptr, \ |
| 93 | }; \ |
| 94 | static struct clk_gate _name##_hw = { \ |
| 95 | .hw = { \ |
| 96 | .clk = &_name, \ |
| 97 | }, \ |
| 98 | .reg = _reg, \ |
| 99 | .bit_idx = _bit_idx, \ |
| 100 | .flags = _gate_flags, \ |
| 101 | .lock = _lock, \ |
| 102 | }; \ |
Viresh Kumar | 182f9e8c | 2012-04-17 16:45:36 +0530 | [diff] [blame] | 103 | DEFINE_CLK(_name, clk_gate_ops, _flags, \ |
| 104 | _name##_parent_names, _name##_parents); |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 105 | |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 106 | #define DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \ |
| 107 | _flags, _reg, _shift, _width, \ |
| 108 | _divider_flags, _lock) \ |
| 109 | static struct clk _name; \ |
Rajendra Nayak | e447c50 | 2012-04-27 17:58:13 +0530 | [diff] [blame^] | 110 | static const char *_name##_parent_names[] = { \ |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 111 | _parent_name, \ |
| 112 | }; \ |
| 113 | static struct clk *_name##_parents[] = { \ |
| 114 | _parent_ptr, \ |
| 115 | }; \ |
| 116 | static struct clk_divider _name##_hw = { \ |
| 117 | .hw = { \ |
| 118 | .clk = &_name, \ |
| 119 | }, \ |
| 120 | .reg = _reg, \ |
| 121 | .shift = _shift, \ |
| 122 | .width = _width, \ |
| 123 | .flags = _divider_flags, \ |
| 124 | .lock = _lock, \ |
| 125 | }; \ |
Viresh Kumar | 182f9e8c | 2012-04-17 16:45:36 +0530 | [diff] [blame] | 126 | DEFINE_CLK(_name, clk_divider_ops, _flags, \ |
| 127 | _name##_parent_names, _name##_parents); |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 128 | |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 129 | #define DEFINE_CLK_MUX(_name, _parent_names, _parents, _flags, \ |
| 130 | _reg, _shift, _width, \ |
| 131 | _mux_flags, _lock) \ |
| 132 | static struct clk _name; \ |
| 133 | static struct clk_mux _name##_hw = { \ |
| 134 | .hw = { \ |
| 135 | .clk = &_name, \ |
| 136 | }, \ |
| 137 | .reg = _reg, \ |
| 138 | .shift = _shift, \ |
| 139 | .width = _width, \ |
| 140 | .flags = _mux_flags, \ |
| 141 | .lock = _lock, \ |
| 142 | }; \ |
Viresh Kumar | 182f9e8c | 2012-04-17 16:45:36 +0530 | [diff] [blame] | 143 | DEFINE_CLK(_name, clk_mux_ops, _flags, _parent_names, \ |
| 144 | _parents); |
Mike Turquette | 9d9f78e | 2012-03-15 23:11:20 -0700 | [diff] [blame] | 145 | |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 146 | /** |
| 147 | * __clk_init - initialize the data structures in a struct clk |
| 148 | * @dev: device initializing this clk, placeholder for now |
| 149 | * @clk: clk being initialized |
| 150 | * |
| 151 | * Initializes the lists in struct clk, queries the hardware for the |
| 152 | * parent and rate and sets them both. |
| 153 | * |
| 154 | * Any struct clk passed into __clk_init must have the following members |
| 155 | * populated: |
| 156 | * .name |
| 157 | * .ops |
| 158 | * .hw |
| 159 | * .parent_names |
| 160 | * .num_parents |
| 161 | * .flags |
| 162 | * |
| 163 | * It is not necessary to call clk_register if __clk_init is used directly with |
| 164 | * statically initialized clock data. |
Mike Turquette | d1302a3 | 2012-03-29 14:30:40 -0700 | [diff] [blame] | 165 | * |
| 166 | * Returns 0 on success, otherwise an error code. |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 167 | */ |
Mike Turquette | d1302a3 | 2012-03-29 14:30:40 -0700 | [diff] [blame] | 168 | int __clk_init(struct device *dev, struct clk *clk); |
Mike Turquette | b2476490 | 2012-03-15 23:11:19 -0700 | [diff] [blame] | 169 | |
| 170 | #endif /* CONFIG_COMMON_CLK */ |
| 171 | #endif /* CLK_PRIVATE_H */ |