blob: 091934e1d0d97ca26570eb9962aa1890e08e7bd8 [file] [log] [blame]
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001/*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * Thanks to Ben LaHaise for precious feedback.
Ingo Molnar9f4c8152008-01-30 13:33:41 +01004 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005#include <linux/highmem.h>
Ingo Molnar81922062008-01-30 13:34:04 +01006#include <linux/bootmem.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07007#include <linux/module.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +01008#include <linux/sched.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +01009#include <linux/mm.h>
Thomas Gleixner76ebd052008-02-09 23:24:09 +010010#include <linux/interrupt.h>
Thomas Gleixneree7ae7a2008-04-17 17:40:45 +020011#include <linux/seq_file.h>
12#include <linux/debugfs.h>
Tejun Heoe59a1bb2009-06-22 11:56:24 +090013#include <linux/pfn.h>
Tejun Heo8c4bfc62009-07-04 08:10:59 +090014#include <linux/percpu.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090015#include <linux/gfp.h>
Matthieu Castet5bd5a452010-11-16 22:31:26 +010016#include <linux/pci.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010017
Thomas Gleixner950f9d92008-01-30 13:34:06 +010018#include <asm/e820.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <asm/processor.h>
20#include <asm/tlbflush.h>
Dave Jonesf8af0952006-01-06 00:12:10 -080021#include <asm/sections.h>
Jeremy Fitzhardinge93dbda72009-02-26 17:35:44 -080022#include <asm/setup.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010023#include <asm/uaccess.h>
24#include <asm/pgalloc.h>
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010025#include <asm/proto.h>
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -070026#include <asm/pat.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Ingo Molnar9df84992008-02-04 16:48:09 +010028/*
29 * The current flushing context - we pass it instead of 5 arguments:
30 */
Thomas Gleixner72e458d2008-02-04 16:48:07 +010031struct cpa_data {
Shaohua Lid75586a2008-08-21 10:46:06 +080032 unsigned long *vaddr;
Thomas Gleixner72e458d2008-02-04 16:48:07 +010033 pgprot_t mask_set;
34 pgprot_t mask_clr;
Thomas Gleixner65e074d2008-02-04 16:48:07 +010035 int numpages;
Shaohua Lid75586a2008-08-21 10:46:06 +080036 int flags;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010037 unsigned long pfn;
Andi Kleenc9caa022008-03-12 03:53:29 +010038 unsigned force_split : 1;
Shaohua Lid75586a2008-08-21 10:46:06 +080039 int curpage;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -070040 struct page **pages;
Thomas Gleixner72e458d2008-02-04 16:48:07 +010041};
42
Suresh Siddhaad5ca552008-09-23 14:00:42 -070043/*
44 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
45 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
46 * entries change the page attribute in parallel to some other cpu
47 * splitting a large page entry along with changing the attribute.
48 */
49static DEFINE_SPINLOCK(cpa_lock);
50
Shaohua Lid75586a2008-08-21 10:46:06 +080051#define CPA_FLUSHTLB 1
52#define CPA_ARRAY 2
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -070053#define CPA_PAGES_ARRAY 4
Shaohua Lid75586a2008-08-21 10:46:06 +080054
Thomas Gleixner65280e62008-05-05 16:35:21 +020055#ifdef CONFIG_PROC_FS
Andi Kleence0c0e52008-05-02 11:46:49 +020056static unsigned long direct_pages_count[PG_LEVEL_NUM];
57
Thomas Gleixner65280e62008-05-05 16:35:21 +020058void update_page_count(int level, unsigned long pages)
Andi Kleence0c0e52008-05-02 11:46:49 +020059{
Andi Kleence0c0e52008-05-02 11:46:49 +020060 /* Protect against CPA */
Andrea Arcangelia79e53d2011-02-16 15:45:22 -080061 spin_lock(&pgd_lock);
Andi Kleence0c0e52008-05-02 11:46:49 +020062 direct_pages_count[level] += pages;
Andrea Arcangelia79e53d2011-02-16 15:45:22 -080063 spin_unlock(&pgd_lock);
Andi Kleence0c0e52008-05-02 11:46:49 +020064}
65
Thomas Gleixner65280e62008-05-05 16:35:21 +020066static void split_page_count(int level)
67{
68 direct_pages_count[level]--;
69 direct_pages_count[level - 1] += PTRS_PER_PTE;
70}
71
Alexey Dobriyane1759c22008-10-15 23:50:22 +040072void arch_report_meminfo(struct seq_file *m)
Thomas Gleixner65280e62008-05-05 16:35:21 +020073{
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000074 seq_printf(m, "DirectMap4k: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010075 direct_pages_count[PG_LEVEL_4K] << 2);
76#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000077 seq_printf(m, "DirectMap2M: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010078 direct_pages_count[PG_LEVEL_2M] << 11);
79#else
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000080 seq_printf(m, "DirectMap4M: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010081 direct_pages_count[PG_LEVEL_2M] << 12);
82#endif
Thomas Gleixner65280e62008-05-05 16:35:21 +020083#ifdef CONFIG_X86_64
Hugh Dickinsa06de632008-08-15 13:58:32 +010084 if (direct_gbpages)
Hugh Dickinsb9c3bfc2008-11-06 12:05:40 +000085 seq_printf(m, "DirectMap1G: %8lu kB\n",
Hugh Dickinsa06de632008-08-15 13:58:32 +010086 direct_pages_count[PG_LEVEL_1G] << 20);
Thomas Gleixner65280e62008-05-05 16:35:21 +020087#endif
Thomas Gleixner65280e62008-05-05 16:35:21 +020088}
89#else
90static inline void split_page_count(int level) { }
91#endif
92
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010093#ifdef CONFIG_X86_64
94
95static inline unsigned long highmap_start_pfn(void)
96{
Alexander Duyckfc8d7822012-11-16 13:57:13 -080097 return __pa_symbol(_text) >> PAGE_SHIFT;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010098}
99
100static inline unsigned long highmap_end_pfn(void)
101{
Alexander Duyckfc8d7822012-11-16 13:57:13 -0800102 return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100103}
104
105#endif
106
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100107#ifdef CONFIG_DEBUG_PAGEALLOC
108# define debug_pagealloc 1
109#else
110# define debug_pagealloc 0
111#endif
112
Arjan van de Vened724be2008-01-30 13:34:04 +0100113static inline int
114within(unsigned long addr, unsigned long start, unsigned long end)
Ingo Molnar687c4822008-01-30 13:34:04 +0100115{
Arjan van de Vened724be2008-01-30 13:34:04 +0100116 return addr >= start && addr < end;
117}
118
119/*
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100120 * Flushing functions
121 */
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100122
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100123/**
124 * clflush_cache_range - flush a cache range with clflush
Wanpeng Li9efc31b2012-06-10 10:50:52 +0800125 * @vaddr: virtual start address
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100126 * @size: number of bytes to flush
127 *
128 * clflush is an unordered instruction which needs fencing with mfence
129 * to avoid ordering issues.
130 */
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100131void clflush_cache_range(void *vaddr, unsigned int size)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100132{
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100133 void *vend = vaddr + size - 1;
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100134
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100135 mb();
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100136
137 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
138 clflush(vaddr);
139 /*
140 * Flush any possible final partial cacheline:
141 */
142 clflush(vend);
143
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +0100144 mb();
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100145}
Eric Anholte517a5e2009-09-10 17:48:48 -0700146EXPORT_SYMBOL_GPL(clflush_cache_range);
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100147
Thomas Gleixneraf1e6842008-01-30 13:34:08 +0100148static void __cpa_flush_all(void *arg)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100149{
Andi Kleen6bb83832008-02-04 16:48:06 +0100150 unsigned long cache = (unsigned long)arg;
151
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100152 /*
153 * Flush all to work around Errata in early athlons regarding
154 * large page flushing.
155 */
156 __flush_tlb_all();
157
venkatesh.pallipadi@intel.com0b827532009-05-22 13:23:37 -0700158 if (cache && boot_cpu_data.x86 >= 4)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100159 wbinvd();
160}
161
Andi Kleen6bb83832008-02-04 16:48:06 +0100162static void cpa_flush_all(unsigned long cache)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100163{
164 BUG_ON(irqs_disabled());
165
Jens Axboe15c8b6c2008-05-09 09:39:44 +0200166 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100167}
168
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100169static void __cpa_flush_range(void *arg)
170{
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100171 /*
172 * We could optimize that further and do individual per page
173 * tlb invalidates for a low number of pages. Caveat: we must
174 * flush the high aliases on 64bit as well.
175 */
176 __flush_tlb_all();
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100177}
178
Andi Kleen6bb83832008-02-04 16:48:06 +0100179static void cpa_flush_range(unsigned long start, int numpages, int cache)
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100180{
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100181 unsigned int i, level;
182 unsigned long addr;
183
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100184 BUG_ON(irqs_disabled());
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100185 WARN_ON(PAGE_ALIGN(start) != start);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100186
Jens Axboe15c8b6c2008-05-09 09:39:44 +0200187 on_each_cpu(__cpa_flush_range, NULL, 1);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100188
Andi Kleen6bb83832008-02-04 16:48:06 +0100189 if (!cache)
190 return;
191
Thomas Gleixner3b233e52008-01-30 13:34:08 +0100192 /*
193 * We only need to flush on one CPU,
194 * clflush is a MESI-coherent instruction that
195 * will cause all other CPUs to flush the same
196 * cachelines:
197 */
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100198 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
199 pte_t *pte = lookup_address(addr, &level);
200
201 /*
202 * Only flush present addresses:
203 */
Thomas Gleixner7bfb72e2008-02-04 16:48:08 +0100204 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100205 clflush_cache_range((void *) addr, PAGE_SIZE);
206 }
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100207}
208
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700209static void cpa_flush_array(unsigned long *start, int numpages, int cache,
210 int in_flags, struct page **pages)
Shaohua Lid75586a2008-08-21 10:46:06 +0800211{
212 unsigned int i, level;
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700213 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
Shaohua Lid75586a2008-08-21 10:46:06 +0800214
215 BUG_ON(irqs_disabled());
216
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700217 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
Shaohua Lid75586a2008-08-21 10:46:06 +0800218
Pallipadi, Venkatesh21717872009-05-26 10:33:35 -0700219 if (!cache || do_wbinvd)
Shaohua Lid75586a2008-08-21 10:46:06 +0800220 return;
221
Shaohua Lid75586a2008-08-21 10:46:06 +0800222 /*
223 * We only need to flush on one CPU,
224 * clflush is a MESI-coherent instruction that
225 * will cause all other CPUs to flush the same
226 * cachelines:
227 */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700228 for (i = 0; i < numpages; i++) {
229 unsigned long addr;
230 pte_t *pte;
231
232 if (in_flags & CPA_PAGES_ARRAY)
233 addr = (unsigned long)page_address(pages[i]);
234 else
235 addr = start[i];
236
237 pte = lookup_address(addr, &level);
Shaohua Lid75586a2008-08-21 10:46:06 +0800238
239 /*
240 * Only flush present addresses:
241 */
242 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700243 clflush_cache_range((void *)addr, PAGE_SIZE);
Shaohua Lid75586a2008-08-21 10:46:06 +0800244 }
245}
246
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100247/*
Arjan van de Vened724be2008-01-30 13:34:04 +0100248 * Certain areas of memory on x86 require very specific protection flags,
249 * for example the BIOS area or kernel text. Callers don't always get this
250 * right (again, ioremap() on BIOS memory is not uncommon) so this function
251 * checks and fixes these known static required protection bits.
252 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100253static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
254 unsigned long pfn)
Arjan van de Vened724be2008-01-30 13:34:04 +0100255{
256 pgprot_t forbidden = __pgprot(0);
257
Ingo Molnar687c4822008-01-30 13:34:04 +0100258 /*
Arjan van de Vened724be2008-01-30 13:34:04 +0100259 * The BIOS area between 640k and 1Mb needs to be executable for
260 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
Ingo Molnar687c4822008-01-30 13:34:04 +0100261 */
Matthieu Castet5bd5a452010-11-16 22:31:26 +0100262#ifdef CONFIG_PCI_BIOS
263 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
Arjan van de Vened724be2008-01-30 13:34:04 +0100264 pgprot_val(forbidden) |= _PAGE_NX;
Matthieu Castet5bd5a452010-11-16 22:31:26 +0100265#endif
Arjan van de Vened724be2008-01-30 13:34:04 +0100266
267 /*
268 * The kernel text needs to be executable for obvious reasons
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100269 * Does not cover __inittext since that is gone later on. On
270 * 64bit we do not enforce !NX on the low mapping
Arjan van de Vened724be2008-01-30 13:34:04 +0100271 */
272 if (within(address, (unsigned long)_text, (unsigned long)_etext))
273 pgprot_val(forbidden) |= _PAGE_NX;
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100274
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100275 /*
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100276 * The .rodata section needs to be read-only. Using the pfn
277 * catches all aliases.
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100278 */
Alexander Duyckfc8d7822012-11-16 13:57:13 -0800279 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
280 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100281 pgprot_val(forbidden) |= _PAGE_RW;
Arjan van de Vened724be2008-01-30 13:34:04 +0100282
Suresh Siddha55ca3cc2009-10-28 18:46:57 -0800283#if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
Suresh Siddha74e08172009-10-14 14:46:56 -0700284 /*
Suresh Siddha502f6602009-10-28 18:46:56 -0800285 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
286 * kernel text mappings for the large page aligned text, rodata sections
287 * will be always read-only. For the kernel identity mappings covering
288 * the holes caused by this alignment can be anything that user asks.
Suresh Siddha74e08172009-10-14 14:46:56 -0700289 *
290 * This will preserve the large page mappings for kernel text/data
291 * at no extra cost.
292 */
Suresh Siddha502f6602009-10-28 18:46:56 -0800293 if (kernel_set_to_readonly &&
294 within(address, (unsigned long)_text,
Suresh Siddha281ff332010-02-18 11:51:40 -0800295 (unsigned long)__end_rodata_hpage_align)) {
296 unsigned int level;
297
298 /*
299 * Don't enforce the !RW mapping for the kernel text mapping,
300 * if the current mapping is already using small page mapping.
301 * No need to work hard to preserve large page mappings in this
302 * case.
303 *
304 * This also fixes the Linux Xen paravirt guest boot failure
305 * (because of unexpected read-only mappings for kernel identity
306 * mappings). In this paravirt guest case, the kernel text
307 * mapping and the kernel identity mapping share the same
308 * page-table pages. Thus we can't really use different
309 * protections for the kernel text and identity mappings. Also,
310 * these shared mappings are made of small page mappings.
311 * Thus this don't enforce !RW mapping for small page kernel
312 * text mapping logic will help Linux Xen parvirt guest boot
Lucas De Marchi0d2eb442011-03-17 16:24:16 -0300313 * as well.
Suresh Siddha281ff332010-02-18 11:51:40 -0800314 */
315 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
316 pgprot_val(forbidden) |= _PAGE_RW;
317 }
Suresh Siddha74e08172009-10-14 14:46:56 -0700318#endif
319
Arjan van de Vened724be2008-01-30 13:34:04 +0100320 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
Ingo Molnar687c4822008-01-30 13:34:04 +0100321
322 return prot;
323}
324
Thomas Gleixner9a14aef2008-02-04 16:48:07 +0100325/*
326 * Lookup the page table entry for a virtual address. Return a pointer
327 * to the entry and the level of the mapping.
328 *
329 * Note: We return pud and pmd either when the entry is marked large
330 * or when the present bit is not set. Otherwise we would return a
331 * pointer to a nonexisting mapping.
332 */
Harvey Harrisonda7bfc52008-02-09 23:24:08 +0100333pte_t *lookup_address(unsigned long address, unsigned int *level)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100334{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335 pgd_t *pgd = pgd_offset_k(address);
336 pud_t *pud;
337 pmd_t *pmd;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100338
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100339 *level = PG_LEVEL_NONE;
340
Linus Torvalds1da177e2005-04-16 15:20:36 -0700341 if (pgd_none(*pgd))
342 return NULL;
Ingo Molnar9df84992008-02-04 16:48:09 +0100343
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344 pud = pud_offset(pgd, address);
345 if (pud_none(*pud))
346 return NULL;
Andi Kleenc2f71ee2008-02-04 16:48:09 +0100347
348 *level = PG_LEVEL_1G;
349 if (pud_large(*pud) || !pud_present(*pud))
350 return (pte_t *)pud;
351
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352 pmd = pmd_offset(pud, address);
353 if (pmd_none(*pmd))
354 return NULL;
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100355
356 *level = PG_LEVEL_2M;
Thomas Gleixner9a14aef2008-02-04 16:48:07 +0100357 if (pmd_large(*pmd) || !pmd_present(*pmd))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700358 return (pte_t *)pmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100360 *level = PG_LEVEL_4K;
Ingo Molnar9df84992008-02-04 16:48:09 +0100361
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100362 return pte_offset_kernel(pmd, address);
363}
Pekka Paalanen75bb8832008-05-12 21:20:56 +0200364EXPORT_SYMBOL_GPL(lookup_address);
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100365
Ingo Molnar9df84992008-02-04 16:48:09 +0100366/*
Dave Hansend7656532013-01-22 13:24:33 -0800367 * This is necessary because __pa() does not work on some
368 * kinds of memory, like vmalloc() or the alloc_remap()
369 * areas on 32-bit NUMA systems. The percpu areas can
370 * end up in this kind of memory, for instance.
371 *
372 * This could be optimized, but it is only intended to be
373 * used at inititalization time, and keeping it
374 * unoptimized should increase the testing coverage for
375 * the more obscure platforms.
376 */
377phys_addr_t slow_virt_to_phys(void *__virt_addr)
378{
379 unsigned long virt_addr = (unsigned long)__virt_addr;
380 phys_addr_t phys_addr;
381 unsigned long offset;
382 enum pg_level level;
383 unsigned long psize;
384 unsigned long pmask;
385 pte_t *pte;
386
387 pte = lookup_address(virt_addr, &level);
388 BUG_ON(!pte);
389 psize = page_level_size(level);
390 pmask = page_level_mask(level);
391 offset = virt_addr & ~pmask;
392 phys_addr = pte_pfn(*pte) << PAGE_SHIFT;
393 return (phys_addr | offset);
394}
395EXPORT_SYMBOL_GPL(slow_virt_to_phys);
396
397/*
Ingo Molnar9df84992008-02-04 16:48:09 +0100398 * Set the new pmd in all the pgds we know about:
399 */
Ingo Molnar9a3dc782008-01-30 13:33:57 +0100400static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100401{
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100402 /* change init_mm */
403 set_pte_atomic(kpte, pte);
Ingo Molnar44af6c42008-01-30 13:34:03 +0100404#ifdef CONFIG_X86_32
Ingo Molnare4b71dc2008-01-30 13:34:04 +0100405 if (!SHARED_KERNEL_PMD) {
Ingo Molnar44af6c42008-01-30 13:34:03 +0100406 struct page *page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700407
Jeremy Fitzhardingee3ed9102008-01-30 13:34:11 +0100408 list_for_each_entry(page, &pgd_list, lru) {
Ingo Molnar44af6c42008-01-30 13:34:03 +0100409 pgd_t *pgd;
410 pud_t *pud;
411 pmd_t *pmd;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100412
Ingo Molnar44af6c42008-01-30 13:34:03 +0100413 pgd = (pgd_t *)page_address(page) + pgd_index(address);
414 pud = pud_offset(pgd, address);
415 pmd = pmd_offset(pud, address);
416 set_pte_atomic((pte_t *)pmd, pte);
417 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700418 }
Ingo Molnar44af6c42008-01-30 13:34:03 +0100419#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700420}
421
Ingo Molnar9df84992008-02-04 16:48:09 +0100422static int
423try_preserve_large_page(pte_t *kpte, unsigned long address,
424 struct cpa_data *cpa)
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100425{
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800426 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100427 pte_t new_pte, old_pte, *tmp;
matthieu castet64edc8e2010-11-16 22:30:27 +0100428 pgprot_t old_prot, new_prot, req_prot;
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100429 int i, do_split = 1;
Dave Hansenf3c4fbb2013-01-22 13:24:32 -0800430 enum pg_level level;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100431
Andi Kleenc9caa022008-03-12 03:53:29 +0100432 if (cpa->force_split)
433 return 1;
434
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800435 spin_lock(&pgd_lock);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100436 /*
437 * Check for races, another CPU might have split this page
438 * up already:
439 */
440 tmp = lookup_address(address, &level);
441 if (tmp != kpte)
442 goto out_unlock;
443
444 switch (level) {
445 case PG_LEVEL_2M:
Andi Kleenf07333f2008-02-04 16:48:09 +0100446#ifdef CONFIG_X86_64
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100447 case PG_LEVEL_1G:
Andi Kleenf07333f2008-02-04 16:48:09 +0100448#endif
Dave Hansenf3c4fbb2013-01-22 13:24:32 -0800449 psize = page_level_size(level);
450 pmask = page_level_mask(level);
451 break;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100452 default:
Ingo Molnarbeaff632008-02-04 16:48:09 +0100453 do_split = -EINVAL;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100454 goto out_unlock;
455 }
456
457 /*
458 * Calculate the number of pages, which fit into this large
459 * page starting at address:
460 */
461 nextpage_addr = (address + psize) & pmask;
462 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100463 if (numpages < cpa->numpages)
464 cpa->numpages = numpages;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100465
466 /*
467 * We are safe now. Check whether the new pgprot is the same:
468 */
469 old_pte = *kpte;
matthieu castet64edc8e2010-11-16 22:30:27 +0100470 old_prot = new_prot = req_prot = pte_pgprot(old_pte);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100471
matthieu castet64edc8e2010-11-16 22:30:27 +0100472 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
473 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100474
475 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800476 * Set the PSE and GLOBAL flags only if the PRESENT flag is
477 * set otherwise pmd_present/pmd_huge will return true even on
478 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
479 * for the ancient hardware that doesn't support it.
480 */
481 if (pgprot_val(new_prot) & _PAGE_PRESENT)
482 pgprot_val(new_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
483 else
484 pgprot_val(new_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
485
486 new_prot = canon_pgprot(new_prot);
487
488 /*
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100489 * old_pte points to the large page base address. So we need
490 * to add the offset of the virtual address:
491 */
492 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
493 cpa->pfn = pfn;
494
matthieu castet64edc8e2010-11-16 22:30:27 +0100495 new_prot = static_protections(req_prot, address, pfn);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100496
497 /*
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100498 * We need to check the full range, whether
499 * static_protection() requires a different pgprot for one of
500 * the pages in the range we try to preserve:
501 */
matthieu castet64edc8e2010-11-16 22:30:27 +0100502 addr = address & pmask;
503 pfn = pte_pfn(old_pte);
504 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
505 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100506
507 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
508 goto out_unlock;
509 }
510
511 /*
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100512 * If there are no changes, return. maxpages has been updated
513 * above:
514 */
515 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
Ingo Molnarbeaff632008-02-04 16:48:09 +0100516 do_split = 0;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100517 goto out_unlock;
518 }
519
520 /*
521 * We need to change the attributes. Check, whether we can
522 * change the large page in one go. We request a split, when
523 * the address is not aligned and the number of pages is
524 * smaller than the number of pages in the large page. Note
525 * that we limited the number of possible pages already to
526 * the number of pages in the large page.
527 */
matthieu castet64edc8e2010-11-16 22:30:27 +0100528 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100529 /*
530 * The address is aligned and the number of pages
531 * covers the full page.
532 */
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800533 new_pte = pfn_pte(pte_pfn(old_pte), new_prot);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100534 __set_pmd_pte(kpte, address, new_pte);
Shaohua Lid75586a2008-08-21 10:46:06 +0800535 cpa->flags |= CPA_FLUSHTLB;
Ingo Molnarbeaff632008-02-04 16:48:09 +0100536 do_split = 0;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100537 }
538
539out_unlock:
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800540 spin_unlock(&pgd_lock);
Ingo Molnar9df84992008-02-04 16:48:09 +0100541
Ingo Molnarbeaff632008-02-04 16:48:09 +0100542 return do_split;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100543}
544
Wen Congyangae9aae92013-02-22 16:33:04 -0800545int __split_large_page(pte_t *kpte, unsigned long address, pte_t *pbase)
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100546{
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800547 unsigned long pfn, pfninc = 1;
Ingo Molnar86f03982008-01-30 13:34:09 +0100548 unsigned int i, level;
Wen Congyangae9aae92013-02-22 16:33:04 -0800549 pte_t *tmp;
Ingo Molnar9df84992008-02-04 16:48:09 +0100550 pgprot_t ref_prot;
Wen Congyangae9aae92013-02-22 16:33:04 -0800551 struct page *base = virt_to_page(pbase);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100552
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800553 spin_lock(&pgd_lock);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100554 /*
555 * Check for races, another CPU might have split this page
556 * up for us already:
557 */
558 tmp = lookup_address(address, &level);
Wen Congyangae9aae92013-02-22 16:33:04 -0800559 if (tmp != kpte) {
560 spin_unlock(&pgd_lock);
561 return 1;
562 }
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100563
Jeremy Fitzhardinge6944a9c2008-03-17 16:37:01 -0700564 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
Thomas Gleixner07cf89c2008-02-04 16:48:08 +0100565 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
Ingo Molnar7a5714e2009-02-20 17:44:21 +0100566 /*
567 * If we ever want to utilize the PAT bit, we need to
568 * update this function to make sure it's converted from
569 * bit 12 to bit 7 when we cross from the 2MB level to
570 * the 4K level:
571 */
572 WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100573
Andi Kleenf07333f2008-02-04 16:48:09 +0100574#ifdef CONFIG_X86_64
575 if (level == PG_LEVEL_1G) {
576 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800577 /*
578 * Set the PSE flags only if the PRESENT flag is set
579 * otherwise pmd_present/pmd_huge will return true
580 * even on a non present pmd.
581 */
582 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
583 pgprot_val(ref_prot) |= _PAGE_PSE;
584 else
585 pgprot_val(ref_prot) &= ~_PAGE_PSE;
Andi Kleenf07333f2008-02-04 16:48:09 +0100586 }
587#endif
588
Thomas Gleixner63c1dcf2008-02-04 16:48:05 +0100589 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800590 * Set the GLOBAL flags only if the PRESENT flag is set
591 * otherwise pmd/pte_present will return true even on a non
592 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
593 * for the ancient hardware that doesn't support it.
594 */
595 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
596 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
597 else
598 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
599
600 /*
Thomas Gleixner63c1dcf2008-02-04 16:48:05 +0100601 * Get the target pfn from the original entry:
602 */
603 pfn = pte_pfn(*kpte);
Andi Kleenf07333f2008-02-04 16:48:09 +0100604 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800605 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100606
Yinghai Lu8eb57792012-11-16 19:38:49 -0800607 if (pfn_range_is_mapped(PFN_DOWN(__pa(address)),
608 PFN_DOWN(__pa(address)) + 1))
Yinghai Luf361a452008-07-10 20:38:26 -0700609 split_page_count(level);
610
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100611 /*
Ingo Molnar07a66d72009-02-20 08:04:13 +0100612 * Install the new, split up pagetable.
Huang, Ying4c881ca2008-01-30 13:34:04 +0100613 *
Ingo Molnar07a66d72009-02-20 08:04:13 +0100614 * We use the standard kernel pagetable protections for the new
615 * pagetable protections, the actual ptes set above control the
616 * primary protection behavior:
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100617 */
Ingo Molnar07a66d72009-02-20 08:04:13 +0100618 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
Ingo Molnar211b3d02009-03-10 22:31:03 +0100619
620 /*
621 * Intel Atom errata AAH41 workaround.
622 *
623 * The real fix should be in hw or in a microcode update, but
624 * we also probabilistically try to reduce the window of having
625 * a large TLB mixed with 4K TLBs while instruction fetches are
626 * going on.
627 */
628 __flush_tlb_all();
Andrea Arcangelia79e53d2011-02-16 15:45:22 -0800629 spin_unlock(&pgd_lock);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100630
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100631 return 0;
632}
633
Wen Congyangae9aae92013-02-22 16:33:04 -0800634static int split_large_page(pte_t *kpte, unsigned long address)
635{
636 pte_t *pbase;
637 struct page *base;
638
639 if (!debug_pagealloc)
640 spin_unlock(&cpa_lock);
641 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
642 if (!debug_pagealloc)
643 spin_lock(&cpa_lock);
644 if (!base)
645 return -ENOMEM;
646
647 pbase = (pte_t *)page_address(base);
648 if (__split_large_page(kpte, address, pbase))
649 __free_page(base);
650
651 return 0;
652}
653
Suresh Siddhaa1e46212009-01-20 14:20:21 -0800654static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
655 int primary)
656{
657 /*
658 * Ignore all non primary paths.
659 */
660 if (!primary)
661 return 0;
662
663 /*
664 * Ignore the NULL PTE for kernel identity mapping, as it is expected
665 * to have holes.
666 * Also set numpages to '1' indicating that we processed cpa req for
667 * one virtual address page and its pfn. TBD: numpages can be set based
668 * on the initial value and the level returned by lookup_address().
669 */
670 if (within(vaddr, PAGE_OFFSET,
671 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
672 cpa->numpages = 1;
673 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
674 return 0;
675 } else {
676 WARN(1, KERN_WARNING "CPA: called for zero pte. "
677 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
678 *cpa->vaddr);
679
680 return -EFAULT;
681 }
682}
683
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100684static int __change_page_attr(struct cpa_data *cpa, int primary)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100685{
Shaohua Lid75586a2008-08-21 10:46:06 +0800686 unsigned long address;
Harvey Harrisonda7bfc52008-02-09 23:24:08 +0100687 int do_split, err;
688 unsigned int level;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100689 pte_t *kpte, old_pte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700690
Thomas Hellstrom8523acf2009-08-03 09:25:45 +0200691 if (cpa->flags & CPA_PAGES_ARRAY) {
692 struct page *page = cpa->pages[cpa->curpage];
693 if (unlikely(PageHighMem(page)))
694 return 0;
695 address = (unsigned long)page_address(page);
696 } else if (cpa->flags & CPA_ARRAY)
Shaohua Lid75586a2008-08-21 10:46:06 +0800697 address = cpa->vaddr[cpa->curpage];
698 else
699 address = *cpa->vaddr;
Ingo Molnar97f99fe2008-01-30 13:33:55 +0100700repeat:
Ingo Molnarf0646e42008-01-30 13:33:43 +0100701 kpte = lookup_address(address, &level);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700702 if (!kpte)
Suresh Siddhaa1e46212009-01-20 14:20:21 -0800703 return __cpa_process_fault(cpa, address, primary);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100704
705 old_pte = *kpte;
Suresh Siddhaa1e46212009-01-20 14:20:21 -0800706 if (!pte_val(old_pte))
707 return __cpa_process_fault(cpa, address, primary);
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100708
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100709 if (level == PG_LEVEL_4K) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100710 pte_t new_pte;
Arjan van de Ven626c2c92008-02-04 16:48:05 +0100711 pgprot_t new_prot = pte_pgprot(old_pte);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100712 unsigned long pfn = pte_pfn(old_pte);
Thomas Gleixnera72a08a2008-01-30 13:34:07 +0100713
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100714 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
715 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
Ingo Molnar86f03982008-01-30 13:34:09 +0100716
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100717 new_prot = static_protections(new_prot, address, pfn);
Ingo Molnar86f03982008-01-30 13:34:09 +0100718
Arjan van de Ven626c2c92008-02-04 16:48:05 +0100719 /*
Andrea Arcangelia8aed3e2013-02-22 15:11:51 -0800720 * Set the GLOBAL flags only if the PRESENT flag is
721 * set otherwise pte_present will return true even on
722 * a non present pte. The canon_pgprot will clear
723 * _PAGE_GLOBAL for the ancient hardware that doesn't
724 * support it.
725 */
726 if (pgprot_val(new_prot) & _PAGE_PRESENT)
727 pgprot_val(new_prot) |= _PAGE_GLOBAL;
728 else
729 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
730
731 /*
Arjan van de Ven626c2c92008-02-04 16:48:05 +0100732 * We need to keep the pfn from the existing PTE,
733 * after all we're only going to change it's attributes
734 * not the memory it points to
735 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100736 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
737 cpa->pfn = pfn;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +0100738 /*
739 * Do we really change anything ?
740 */
741 if (pte_val(old_pte) != pte_val(new_pte)) {
742 set_pte_atomic(kpte, new_pte);
Shaohua Lid75586a2008-08-21 10:46:06 +0800743 cpa->flags |= CPA_FLUSHTLB;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +0100744 }
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100745 cpa->numpages = 1;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100746 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747 }
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100748
749 /*
750 * Check, whether we can keep the large page intact
751 * and just change the pte:
752 */
Ingo Molnarbeaff632008-02-04 16:48:09 +0100753 do_split = try_preserve_large_page(kpte, address, cpa);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100754 /*
755 * When the range fits into the existing large page,
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100756 * return. cp->numpages and cpa->tlbflush have been updated in
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100757 * try_large_page:
758 */
Ingo Molnar87f7f8f2008-02-04 16:48:10 +0100759 if (do_split <= 0)
760 return do_split;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100761
762 /*
763 * We have to split the large page:
764 */
Ingo Molnar87f7f8f2008-02-04 16:48:10 +0100765 err = split_large_page(kpte, address);
766 if (!err) {
Suresh Siddhaad5ca552008-09-23 14:00:42 -0700767 /*
768 * Do a global flush tlb after splitting the large page
769 * and before we do the actual change page attribute in the PTE.
770 *
771 * With out this, we violate the TLB application note, that says
772 * "The TLBs may contain both ordinary and large-page
773 * translations for a 4-KByte range of linear addresses. This
774 * may occur if software modifies the paging structures so that
775 * the page size used for the address range changes. If the two
776 * translations differ with respect to page frame or attributes
777 * (e.g., permissions), processor behavior is undefined and may
778 * be implementation-specific."
779 *
780 * We do this global tlb flush inside the cpa_lock, so that we
781 * don't allow any other cpu, with stale tlb entries change the
782 * page attribute in parallel, that also falls into the
783 * just split large page entry.
784 */
785 flush_tlb_all();
Ingo Molnar87f7f8f2008-02-04 16:48:10 +0100786 goto repeat;
787 }
Ingo Molnarbeaff632008-02-04 16:48:09 +0100788
Ingo Molnar87f7f8f2008-02-04 16:48:10 +0100789 return err;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100790}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700791
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100792static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
793
794static int cpa_process_alias(struct cpa_data *cpa)
Ingo Molnar44af6c42008-01-30 13:34:03 +0100795{
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100796 struct cpa_data alias_cpa;
Tejun Heo992f4c12009-06-22 11:56:24 +0900797 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
Tejun Heoe933a732009-08-14 15:00:53 +0900798 unsigned long vaddr;
Tejun Heo992f4c12009-06-22 11:56:24 +0900799 int ret;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100800
Yinghai Lu8eb57792012-11-16 19:38:49 -0800801 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100802 return 0;
803
Thomas Gleixnerf34b4392008-02-15 22:17:57 +0100804 /*
805 * No need to redo, when the primary call touched the direct
806 * mapping already:
807 */
Thomas Hellstrom8523acf2009-08-03 09:25:45 +0200808 if (cpa->flags & CPA_PAGES_ARRAY) {
809 struct page *page = cpa->pages[cpa->curpage];
810 if (unlikely(PageHighMem(page)))
811 return 0;
812 vaddr = (unsigned long)page_address(page);
813 } else if (cpa->flags & CPA_ARRAY)
Shaohua Lid75586a2008-08-21 10:46:06 +0800814 vaddr = cpa->vaddr[cpa->curpage];
815 else
816 vaddr = *cpa->vaddr;
817
818 if (!(within(vaddr, PAGE_OFFSET,
Suresh Siddhaa1e46212009-01-20 14:20:21 -0800819 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100820
Thomas Gleixnerf34b4392008-02-15 22:17:57 +0100821 alias_cpa = *cpa;
Tejun Heo992f4c12009-06-22 11:56:24 +0900822 alias_cpa.vaddr = &laddr;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700823 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
Shaohua Lid75586a2008-08-21 10:46:06 +0800824
Thomas Gleixnerf34b4392008-02-15 22:17:57 +0100825 ret = __change_page_attr_set_clr(&alias_cpa, 0);
Tejun Heo992f4c12009-06-22 11:56:24 +0900826 if (ret)
827 return ret;
Thomas Gleixnerf34b4392008-02-15 22:17:57 +0100828 }
Ingo Molnar44af6c42008-01-30 13:34:03 +0100829
Arjan van de Ven488fd992008-01-30 13:34:07 +0100830#ifdef CONFIG_X86_64
Thomas Gleixner08797502008-01-30 13:34:09 +0100831 /*
Tejun Heo992f4c12009-06-22 11:56:24 +0900832 * If the primary call didn't touch the high mapping already
833 * and the physical address is inside the kernel map, we need
Thomas Gleixner08797502008-01-30 13:34:09 +0100834 * to touch the high mapped kernel as well:
835 */
Tejun Heo992f4c12009-06-22 11:56:24 +0900836 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
837 within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
838 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
839 __START_KERNEL_map - phys_base;
840 alias_cpa = *cpa;
841 alias_cpa.vaddr = &temp_cpa_vaddr;
842 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
Thomas Gleixner08797502008-01-30 13:34:09 +0100843
Tejun Heo992f4c12009-06-22 11:56:24 +0900844 /*
845 * The high mapping range is imprecise, so ignore the
846 * return value.
847 */
848 __change_page_attr_set_clr(&alias_cpa, 0);
849 }
Thomas Gleixner08797502008-01-30 13:34:09 +0100850#endif
Tejun Heo992f4c12009-06-22 11:56:24 +0900851
852 return 0;
Ingo Molnar44af6c42008-01-30 13:34:03 +0100853}
854
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100855static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
Thomas Gleixnerff314522008-01-30 13:34:08 +0100856{
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100857 int ret, numpages = cpa->numpages;
Thomas Gleixnerff314522008-01-30 13:34:08 +0100858
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100859 while (numpages) {
860 /*
861 * Store the remaining nr of pages for the large page
862 * preservation check.
863 */
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100864 cpa->numpages = numpages;
Shaohua Lid75586a2008-08-21 10:46:06 +0800865 /* for array changes, we can't use large page */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700866 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
Shaohua Lid75586a2008-08-21 10:46:06 +0800867 cpa->numpages = 1;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100868
Suresh Siddhaad5ca552008-09-23 14:00:42 -0700869 if (!debug_pagealloc)
870 spin_lock(&cpa_lock);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100871 ret = __change_page_attr(cpa, checkalias);
Suresh Siddhaad5ca552008-09-23 14:00:42 -0700872 if (!debug_pagealloc)
873 spin_unlock(&cpa_lock);
Thomas Gleixnerff314522008-01-30 13:34:08 +0100874 if (ret)
875 return ret;
Thomas Gleixnerff314522008-01-30 13:34:08 +0100876
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100877 if (checkalias) {
878 ret = cpa_process_alias(cpa);
879 if (ret)
880 return ret;
881 }
882
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100883 /*
884 * Adjust the number of pages with the result of the
885 * CPA operation. Either a large page has been
886 * preserved or a single page update happened.
887 */
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100888 BUG_ON(cpa->numpages > numpages);
889 numpages -= cpa->numpages;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700890 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
Shaohua Lid75586a2008-08-21 10:46:06 +0800891 cpa->curpage++;
892 else
893 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
894
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100895 }
Thomas Gleixnerff314522008-01-30 13:34:08 +0100896 return 0;
897}
898
Andi Kleen6bb83832008-02-04 16:48:06 +0100899static inline int cache_attr(pgprot_t attr)
900{
901 return pgprot_val(attr) &
902 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
903}
904
Shaohua Lid75586a2008-08-21 10:46:06 +0800905static int change_page_attr_set_clr(unsigned long *addr, int numpages,
Andi Kleenc9caa022008-03-12 03:53:29 +0100906 pgprot_t mask_set, pgprot_t mask_clr,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700907 int force_split, int in_flag,
908 struct page **pages)
Thomas Gleixnerff314522008-01-30 13:34:08 +0100909{
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100910 struct cpa_data cpa;
Ingo Molnarcacf8902008-08-21 13:46:33 +0200911 int ret, cache, checkalias;
Jack Steinerfa526d02009-09-03 12:56:02 -0500912 unsigned long baddr = 0;
Thomas Gleixner331e4062008-02-04 16:48:06 +0100913
914 /*
915 * Check, if we are requested to change a not supported
916 * feature:
917 */
918 mask_set = canon_pgprot(mask_set);
919 mask_clr = canon_pgprot(mask_clr);
Andi Kleenc9caa022008-03-12 03:53:29 +0100920 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
Thomas Gleixner331e4062008-02-04 16:48:06 +0100921 return 0;
922
Thomas Gleixner69b14152008-02-13 11:04:50 +0100923 /* Ensure we are PAGE_SIZE aligned */
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700924 if (in_flag & CPA_ARRAY) {
Shaohua Lid75586a2008-08-21 10:46:06 +0800925 int i;
926 for (i = 0; i < numpages; i++) {
927 if (addr[i] & ~PAGE_MASK) {
928 addr[i] &= PAGE_MASK;
929 WARN_ON_ONCE(1);
930 }
931 }
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700932 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
933 /*
934 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
935 * No need to cehck in that case
936 */
937 if (*addr & ~PAGE_MASK) {
938 *addr &= PAGE_MASK;
939 /*
940 * People should not be passing in unaligned addresses:
941 */
942 WARN_ON_ONCE(1);
943 }
Jack Steinerfa526d02009-09-03 12:56:02 -0500944 /*
945 * Save address for cache flush. *addr is modified in the call
946 * to __change_page_attr_set_clr() below.
947 */
948 baddr = *addr;
Thomas Gleixner69b14152008-02-13 11:04:50 +0100949 }
950
Nick Piggin5843d9a2008-08-01 03:15:21 +0200951 /* Must avoid aliasing mappings in the highmem code */
952 kmap_flush_unused();
953
Nick Piggindb64fe02008-10-18 20:27:03 -0700954 vm_unmap_aliases();
955
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100956 cpa.vaddr = addr;
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700957 cpa.pages = pages;
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100958 cpa.numpages = numpages;
959 cpa.mask_set = mask_set;
960 cpa.mask_clr = mask_clr;
Shaohua Lid75586a2008-08-21 10:46:06 +0800961 cpa.flags = 0;
962 cpa.curpage = 0;
Andi Kleenc9caa022008-03-12 03:53:29 +0100963 cpa.force_split = force_split;
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100964
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700965 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
966 cpa.flags |= in_flag;
Shaohua Lid75586a2008-08-21 10:46:06 +0800967
Thomas Gleixneraf96e442008-02-15 21:49:46 +0100968 /* No alias checking for _NX bit modifications */
969 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
970
971 ret = __change_page_attr_set_clr(&cpa, checkalias);
Thomas Gleixnerff314522008-01-30 13:34:08 +0100972
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100973 /*
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +0100974 * Check whether we really changed something:
975 */
Shaohua Lid75586a2008-08-21 10:46:06 +0800976 if (!(cpa.flags & CPA_FLUSHTLB))
Shaohua Li1ac2f7d2008-08-04 14:51:24 +0800977 goto out;
Ingo Molnarcacf8902008-08-21 13:46:33 +0200978
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +0100979 /*
Andi Kleen6bb83832008-02-04 16:48:06 +0100980 * No need to flush, when we did not set any of the caching
981 * attributes:
982 */
983 cache = cache_attr(mask_set);
984
985 /*
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100986 * On success we use clflush, when the CPU supports it to
H. Peter Anvinf026cfa2012-08-14 09:53:38 -0700987 * avoid the wbindv. If the CPU does not support it and in the
988 * error case we fall back to cpa_flush_all (which uses
989 * wbindv):
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100990 */
H. Peter Anvinf026cfa2012-08-14 09:53:38 -0700991 if (!ret && cpu_has_clflush) {
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -0700992 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
993 cpa_flush_array(addr, numpages, cache,
994 cpa.flags, pages);
995 } else
Jack Steinerfa526d02009-09-03 12:56:02 -0500996 cpa_flush_range(baddr, numpages, cache);
Shaohua Lid75586a2008-08-21 10:46:06 +0800997 } else
Andi Kleen6bb83832008-02-04 16:48:06 +0100998 cpa_flush_all(cache);
Ingo Molnarcacf8902008-08-21 13:46:33 +0200999
Thomas Gleixner76ebd052008-02-09 23:24:09 +01001000out:
Thomas Gleixnerff314522008-01-30 13:34:08 +01001001 return ret;
1002}
1003
Shaohua Lid75586a2008-08-21 10:46:06 +08001004static inline int change_page_attr_set(unsigned long *addr, int numpages,
1005 pgprot_t mask, int array)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001006{
Shaohua Lid75586a2008-08-21 10:46:06 +08001007 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001008 (array ? CPA_ARRAY : 0), NULL);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001009}
1010
Shaohua Lid75586a2008-08-21 10:46:06 +08001011static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1012 pgprot_t mask, int array)
Thomas Gleixner72932c72008-01-30 13:34:08 +01001013{
Shaohua Lid75586a2008-08-21 10:46:06 +08001014 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001015 (array ? CPA_ARRAY : 0), NULL);
Thomas Gleixner72932c72008-01-30 13:34:08 +01001016}
1017
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001018static inline int cpa_set_pages_array(struct page **pages, int numpages,
1019 pgprot_t mask)
1020{
1021 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1022 CPA_PAGES_ARRAY, pages);
1023}
1024
1025static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1026 pgprot_t mask)
1027{
1028 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1029 CPA_PAGES_ARRAY, pages);
1030}
1031
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001032int _set_memory_uc(unsigned long addr, int numpages)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001033{
Suresh Siddhade33c442008-04-25 17:07:22 -07001034 /*
1035 * for now UC MINUS. see comments in ioremap_nocache()
1036 */
Shaohua Lid75586a2008-08-21 10:46:06 +08001037 return change_page_attr_set(&addr, numpages,
1038 __pgprot(_PAGE_CACHE_UC_MINUS), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001039}
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001040
1041int set_memory_uc(unsigned long addr, int numpages)
1042{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001043 int ret;
1044
Suresh Siddhade33c442008-04-25 17:07:22 -07001045 /*
1046 * for now UC MINUS. see comments in ioremap_nocache()
1047 */
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001048 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1049 _PAGE_CACHE_UC_MINUS, NULL);
1050 if (ret)
1051 goto out_err;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001052
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001053 ret = _set_memory_uc(addr, numpages);
1054 if (ret)
1055 goto out_free;
1056
1057 return 0;
1058
1059out_free:
1060 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1061out_err:
1062 return ret;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001063}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001064EXPORT_SYMBOL(set_memory_uc);
1065
H Hartley Sweeten2d070ef2011-11-15 14:49:00 -08001066static int _set_memory_array(unsigned long *addr, int addrinarray,
Pauli Nieminen4f646252010-04-01 12:45:01 +00001067 unsigned long new_type)
Shaohua Lid75586a2008-08-21 10:46:06 +08001068{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001069 int i, j;
1070 int ret;
1071
Shaohua Lid75586a2008-08-21 10:46:06 +08001072 /*
1073 * for now UC MINUS. see comments in ioremap_nocache()
1074 */
1075 for (i = 0; i < addrinarray; i++) {
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001076 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
Pauli Nieminen4f646252010-04-01 12:45:01 +00001077 new_type, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001078 if (ret)
1079 goto out_free;
Shaohua Lid75586a2008-08-21 10:46:06 +08001080 }
1081
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001082 ret = change_page_attr_set(addr, addrinarray,
Shaohua Lid75586a2008-08-21 10:46:06 +08001083 __pgprot(_PAGE_CACHE_UC_MINUS), 1);
Pauli Nieminen4f646252010-04-01 12:45:01 +00001084
1085 if (!ret && new_type == _PAGE_CACHE_WC)
1086 ret = change_page_attr_set_clr(addr, addrinarray,
1087 __pgprot(_PAGE_CACHE_WC),
1088 __pgprot(_PAGE_CACHE_MASK),
1089 0, CPA_ARRAY, NULL);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001090 if (ret)
1091 goto out_free;
Rene Hermanc5e147c2008-08-22 01:02:20 +02001092
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001093 return 0;
1094
1095out_free:
1096 for (j = 0; j < i; j++)
1097 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1098
1099 return ret;
Shaohua Lid75586a2008-08-21 10:46:06 +08001100}
Pauli Nieminen4f646252010-04-01 12:45:01 +00001101
1102int set_memory_array_uc(unsigned long *addr, int addrinarray)
1103{
1104 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_UC_MINUS);
1105}
Shaohua Lid75586a2008-08-21 10:46:06 +08001106EXPORT_SYMBOL(set_memory_array_uc);
1107
Pauli Nieminen4f646252010-04-01 12:45:01 +00001108int set_memory_array_wc(unsigned long *addr, int addrinarray)
1109{
1110 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_WC);
1111}
1112EXPORT_SYMBOL(set_memory_array_wc);
1113
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001114int _set_memory_wc(unsigned long addr, int numpages)
1115{
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001116 int ret;
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001117 unsigned long addr_copy = addr;
1118
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001119 ret = change_page_attr_set(&addr, numpages,
1120 __pgprot(_PAGE_CACHE_UC_MINUS), 0);
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001121 if (!ret) {
Pallipadi, Venkateshbdc63402009-07-30 14:43:19 -07001122 ret = change_page_attr_set_clr(&addr_copy, numpages,
1123 __pgprot(_PAGE_CACHE_WC),
1124 __pgprot(_PAGE_CACHE_MASK),
1125 0, 0, NULL);
venkatesh.pallipadi@intel.com3869c4a2009-04-09 14:26:50 -07001126 }
1127 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001128}
1129
1130int set_memory_wc(unsigned long addr, int numpages)
1131{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001132 int ret;
1133
Andreas Herrmann499f8f82008-06-10 16:06:21 +02001134 if (!pat_enabled)
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001135 return set_memory_uc(addr, numpages);
1136
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001137 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1138 _PAGE_CACHE_WC, NULL);
1139 if (ret)
1140 goto out_err;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001141
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001142 ret = _set_memory_wc(addr, numpages);
1143 if (ret)
1144 goto out_free;
1145
1146 return 0;
1147
1148out_free:
1149 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1150out_err:
1151 return ret;
venkatesh.pallipadi@intel.comef354af2008-03-18 17:00:23 -07001152}
1153EXPORT_SYMBOL(set_memory_wc);
1154
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001155int _set_memory_wb(unsigned long addr, int numpages)
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001156{
Shaohua Lid75586a2008-08-21 10:46:06 +08001157 return change_page_attr_clear(&addr, numpages,
1158 __pgprot(_PAGE_CACHE_MASK), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001159}
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001160
1161int set_memory_wb(unsigned long addr, int numpages)
1162{
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001163 int ret;
1164
1165 ret = _set_memory_wb(addr, numpages);
1166 if (ret)
1167 return ret;
1168
venkatesh.pallipadi@intel.comc15238d2008-08-20 16:45:51 -07001169 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001170 return 0;
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -07001171}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001172EXPORT_SYMBOL(set_memory_wb);
1173
Shaohua Lid75586a2008-08-21 10:46:06 +08001174int set_memory_array_wb(unsigned long *addr, int addrinarray)
1175{
1176 int i;
venkatesh.pallipadi@intel.coma5593e02009-04-09 14:26:48 -07001177 int ret;
1178
1179 ret = change_page_attr_clear(addr, addrinarray,
1180 __pgprot(_PAGE_CACHE_MASK), 1);
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001181 if (ret)
1182 return ret;
Shaohua Lid75586a2008-08-21 10:46:06 +08001183
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001184 for (i = 0; i < addrinarray; i++)
1185 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
Rene Hermanc5e147c2008-08-22 01:02:20 +02001186
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001187 return 0;
Shaohua Lid75586a2008-08-21 10:46:06 +08001188}
1189EXPORT_SYMBOL(set_memory_array_wb);
1190
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001191int set_memory_x(unsigned long addr, int numpages)
1192{
H. Peter Anvin583140a2009-11-13 15:28:15 -08001193 if (!(__supported_pte_mask & _PAGE_NX))
1194 return 0;
1195
Shaohua Lid75586a2008-08-21 10:46:06 +08001196 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001197}
1198EXPORT_SYMBOL(set_memory_x);
1199
1200int set_memory_nx(unsigned long addr, int numpages)
1201{
H. Peter Anvin583140a2009-11-13 15:28:15 -08001202 if (!(__supported_pte_mask & _PAGE_NX))
1203 return 0;
1204
Shaohua Lid75586a2008-08-21 10:46:06 +08001205 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001206}
1207EXPORT_SYMBOL(set_memory_nx);
1208
1209int set_memory_ro(unsigned long addr, int numpages)
1210{
Shaohua Lid75586a2008-08-21 10:46:06 +08001211 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001212}
Bruce Allana03352d2008-09-29 20:19:22 -07001213EXPORT_SYMBOL_GPL(set_memory_ro);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001214
1215int set_memory_rw(unsigned long addr, int numpages)
1216{
Shaohua Lid75586a2008-08-21 10:46:06 +08001217 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001218}
Bruce Allana03352d2008-09-29 20:19:22 -07001219EXPORT_SYMBOL_GPL(set_memory_rw);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001220
1221int set_memory_np(unsigned long addr, int numpages)
1222{
Shaohua Lid75586a2008-08-21 10:46:06 +08001223 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001224}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001225
Andi Kleenc9caa022008-03-12 03:53:29 +01001226int set_memory_4k(unsigned long addr, int numpages)
1227{
Shaohua Lid75586a2008-08-21 10:46:06 +08001228 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
venkatesh.pallipadi@intel.com9ae28472009-03-19 14:51:14 -07001229 __pgprot(0), 1, 0, NULL);
Andi Kleenc9caa022008-03-12 03:53:29 +01001230}
1231
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001232int set_pages_uc(struct page *page, int numpages)
1233{
1234 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001235
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001236 return set_memory_uc(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001237}
1238EXPORT_SYMBOL(set_pages_uc);
1239
Pauli Nieminen4f646252010-04-01 12:45:01 +00001240static int _set_pages_array(struct page **pages, int addrinarray,
1241 unsigned long new_type)
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001242{
1243 unsigned long start;
1244 unsigned long end;
1245 int i;
1246 int free_idx;
Pauli Nieminen4f646252010-04-01 12:45:01 +00001247 int ret;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001248
1249 for (i = 0; i < addrinarray; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001250 if (PageHighMem(pages[i]))
1251 continue;
1252 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001253 end = start + PAGE_SIZE;
Pauli Nieminen4f646252010-04-01 12:45:01 +00001254 if (reserve_memtype(start, end, new_type, NULL))
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001255 goto err_out;
1256 }
1257
Pauli Nieminen4f646252010-04-01 12:45:01 +00001258 ret = cpa_set_pages_array(pages, addrinarray,
1259 __pgprot(_PAGE_CACHE_UC_MINUS));
1260 if (!ret && new_type == _PAGE_CACHE_WC)
1261 ret = change_page_attr_set_clr(NULL, addrinarray,
1262 __pgprot(_PAGE_CACHE_WC),
1263 __pgprot(_PAGE_CACHE_MASK),
1264 0, CPA_PAGES_ARRAY, pages);
1265 if (ret)
1266 goto err_out;
1267 return 0; /* Success */
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001268err_out:
1269 free_idx = i;
1270 for (i = 0; i < free_idx; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001271 if (PageHighMem(pages[i]))
1272 continue;
1273 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001274 end = start + PAGE_SIZE;
1275 free_memtype(start, end);
1276 }
1277 return -EINVAL;
1278}
Pauli Nieminen4f646252010-04-01 12:45:01 +00001279
1280int set_pages_array_uc(struct page **pages, int addrinarray)
1281{
1282 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_UC_MINUS);
1283}
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001284EXPORT_SYMBOL(set_pages_array_uc);
1285
Pauli Nieminen4f646252010-04-01 12:45:01 +00001286int set_pages_array_wc(struct page **pages, int addrinarray)
1287{
1288 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_WC);
1289}
1290EXPORT_SYMBOL(set_pages_array_wc);
1291
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001292int set_pages_wb(struct page *page, int numpages)
1293{
1294 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001295
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001296 return set_memory_wb(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001297}
1298EXPORT_SYMBOL(set_pages_wb);
1299
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001300int set_pages_array_wb(struct page **pages, int addrinarray)
1301{
1302 int retval;
1303 unsigned long start;
1304 unsigned long end;
1305 int i;
1306
1307 retval = cpa_clear_pages_array(pages, addrinarray,
1308 __pgprot(_PAGE_CACHE_MASK));
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001309 if (retval)
1310 return retval;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001311
1312 for (i = 0; i < addrinarray; i++) {
Thomas Hellstrom8523acf2009-08-03 09:25:45 +02001313 if (PageHighMem(pages[i]))
1314 continue;
1315 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001316 end = start + PAGE_SIZE;
1317 free_memtype(start, end);
1318 }
1319
venkatesh.pallipadi@intel.com9fa3ab32009-04-09 14:26:49 -07001320 return 0;
venkatesh.pallipadi@intel.com0f350752009-03-19 14:51:15 -07001321}
1322EXPORT_SYMBOL(set_pages_array_wb);
1323
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001324int set_pages_x(struct page *page, int numpages)
1325{
1326 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001327
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001328 return set_memory_x(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001329}
1330EXPORT_SYMBOL(set_pages_x);
1331
1332int set_pages_nx(struct page *page, int numpages)
1333{
1334 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001335
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001336 return set_memory_nx(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001337}
1338EXPORT_SYMBOL(set_pages_nx);
1339
1340int set_pages_ro(struct page *page, int numpages)
1341{
1342 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001343
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001344 return set_memory_ro(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001345}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001346
1347int set_pages_rw(struct page *page, int numpages)
1348{
1349 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001350
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +01001351 return set_memory_rw(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001352}
Arjan van de Ven75cbade2008-01-30 13:34:06 +01001353
Linus Torvalds1da177e2005-04-16 15:20:36 -07001354#ifdef CONFIG_DEBUG_PAGEALLOC
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001355
1356static int __set_pages_p(struct page *page, int numpages)
1357{
Shaohua Lid75586a2008-08-21 10:46:06 +08001358 unsigned long tempaddr = (unsigned long) page_address(page);
1359 struct cpa_data cpa = { .vaddr = &tempaddr,
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001360 .numpages = numpages,
1361 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
Shaohua Lid75586a2008-08-21 10:46:06 +08001362 .mask_clr = __pgprot(0),
1363 .flags = 0};
Thomas Gleixner72932c72008-01-30 13:34:08 +01001364
Suresh Siddha55121b42008-09-23 14:00:40 -07001365 /*
1366 * No alias checking needed for setting present flag. otherwise,
1367 * we may need to break large pages for 64-bit kernel text
1368 * mappings (this adds to complexity if we want to do this from
1369 * atomic context especially). Let's keep it simple!
1370 */
1371 return __change_page_attr_set_clr(&cpa, 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001372}
1373
1374static int __set_pages_np(struct page *page, int numpages)
1375{
Shaohua Lid75586a2008-08-21 10:46:06 +08001376 unsigned long tempaddr = (unsigned long) page_address(page);
1377 struct cpa_data cpa = { .vaddr = &tempaddr,
Thomas Gleixner72e458d2008-02-04 16:48:07 +01001378 .numpages = numpages,
1379 .mask_set = __pgprot(0),
Shaohua Lid75586a2008-08-21 10:46:06 +08001380 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1381 .flags = 0};
Thomas Gleixner72932c72008-01-30 13:34:08 +01001382
Suresh Siddha55121b42008-09-23 14:00:40 -07001383 /*
1384 * No alias checking needed for setting not present flag. otherwise,
1385 * we may need to break large pages for 64-bit kernel text
1386 * mappings (this adds to complexity if we want to do this from
1387 * atomic context especially). Let's keep it simple!
1388 */
1389 return __change_page_attr_set_clr(&cpa, 0);
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001390}
1391
Linus Torvalds1da177e2005-04-16 15:20:36 -07001392void kernel_map_pages(struct page *page, int numpages, int enable)
1393{
1394 if (PageHighMem(page))
1395 return;
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001396 if (!enable) {
Ingo Molnarf9b84042006-06-27 02:54:49 -07001397 debug_check_no_locks_freed(page_address(page),
1398 numpages * PAGE_SIZE);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001399 }
Ingo Molnarde5097c2006-01-09 15:59:21 -08001400
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001401 /*
Ingo Molnarf8d84062008-02-13 14:09:53 +01001402 * The return value is ignored as the calls cannot fail.
Suresh Siddha55121b42008-09-23 14:00:40 -07001403 * Large pages for identity mappings are not used at boot time
1404 * and hence no memory allocations during large page split.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001405 */
Ingo Molnarf62d0f02008-01-30 13:34:07 +01001406 if (enable)
1407 __set_pages_p(page, numpages);
1408 else
1409 __set_pages_np(page, numpages);
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001410
1411 /*
Ingo Molnare4b71dc2008-01-30 13:34:04 +01001412 * We should perform an IPI and flush all tlbs,
1413 * but that can deadlock->flush only current cpu:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001414 */
1415 __flush_tlb_all();
1416}
Rafael J. Wysocki8a235ef2008-02-20 01:47:44 +01001417
1418#ifdef CONFIG_HIBERNATION
1419
1420bool kernel_page_present(struct page *page)
1421{
1422 unsigned int level;
1423 pte_t *pte;
1424
1425 if (PageHighMem(page))
1426 return false;
1427
1428 pte = lookup_address((unsigned long)page_address(page), &level);
1429 return (pte_val(*pte) & _PAGE_PRESENT);
1430}
1431
1432#endif /* CONFIG_HIBERNATION */
1433
1434#endif /* CONFIG_DEBUG_PAGEALLOC */
Arjan van de Vend1028a12008-01-30 13:34:07 +01001435
1436/*
1437 * The testcases use internal knowledge of the implementation that shouldn't
1438 * be exposed to the rest of the kernel. Include these directly here.
1439 */
1440#ifdef CONFIG_CPA_DEBUG
1441#include "pageattr-test.c"
1442#endif