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Josh Boyercb9e4d12007-05-08 07:28:38 +10001/*
2 * Board setup routines for the IBM 750GX/CL platform w/ TSI10x bridge
3 *
4 * Copyright 2007 IBM Corporation
5 *
6 * Stephen Winiecki <stevewin@us.ibm.com>
7 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
8 *
9 * Based on code from mpc7448_hpc2.c
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
14 */
15
16#include <linux/stddef.h>
17#include <linux/kernel.h>
18#include <linux/pci.h>
19#include <linux/kdev_t.h>
20#include <linux/console.h>
21#include <linux/delay.h>
22#include <linux/irq.h>
Josh Boyercb9e4d12007-05-08 07:28:38 +100023#include <linux/seq_file.h>
24#include <linux/root_dev.h>
25#include <linux/serial.h>
26#include <linux/tty.h>
27#include <linux/serial_core.h>
Jon Loeliger5f867dc2007-11-14 04:13:03 +110028#include <linux/of_platform.h>
Paul Gortmaker7dfe2932011-05-27 13:23:32 -040029#include <linux/module.h>
Josh Boyercb9e4d12007-05-08 07:28:38 +100030
31#include <asm/system.h>
32#include <asm/time.h>
33#include <asm/machdep.h>
34#include <asm/prom.h>
35#include <asm/udbg.h>
36#include <asm/tsi108.h>
37#include <asm/pci-bridge.h>
38#include <asm/reg.h>
39#include <mm/mmu_decl.h>
40#include <asm/tsi108_irq.h>
41#include <asm/tsi108_pci.h>
42#include <asm/mpic.h>
Josh Boyercb9e4d12007-05-08 07:28:38 +100043
44#undef DEBUG
45
46#define HOLLY_PCI_CFG_PHYS 0x7c000000
47
Kumar Gala7d52c7b2007-06-22 00:23:57 -050048int holly_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn)
Josh Boyercb9e4d12007-05-08 07:28:38 +100049{
50 if (bus == 0 && PCI_SLOT(devfn) == 0)
51 return PCIBIOS_DEVICE_NOT_FOUND;
52 else
53 return PCIBIOS_SUCCESSFUL;
54}
55
56static void holly_remap_bridge(void)
57{
58 u32 lut_val, lut_addr;
59 int i;
60
61 printk(KERN_INFO "Remapping PCI bridge\n");
62
63 /* Re-init the PCI bridge and LUT registers to have mappings that don't
64 * rely on PIBS
65 */
66 lut_addr = 0x900;
67 for (i = 0; i < 31; i++) {
68 tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000201);
69 lut_addr += 4;
70 tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0);
71 lut_addr += 4;
72 }
73
74 /* Reserve the last LUT entry for PCI I/O space */
75 tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000241);
76 lut_addr += 4;
77 tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0);
78
79 /* Map PCI I/O space */
80 tsi108_write_reg(TSI108_PCI_PFAB_IO_UPPER, 0x0);
81 tsi108_write_reg(TSI108_PCI_PFAB_IO, 0x1);
82
83 /* Map PCI CFG space */
84 tsi108_write_reg(TSI108_PCI_PFAB_BAR0_UPPER, 0x0);
85 tsi108_write_reg(TSI108_PCI_PFAB_BAR0, 0x7c000000 | 0x01);
86
87 /* We don't need MEM32 and PRM remapping so disable them */
88 tsi108_write_reg(TSI108_PCI_PFAB_MEM32, 0x0);
89 tsi108_write_reg(TSI108_PCI_PFAB_PFM3, 0x0);
90 tsi108_write_reg(TSI108_PCI_PFAB_PFM4, 0x0);
91
92 /* Set P2O_BAR0 */
93 tsi108_write_reg(TSI108_PCI_P2O_BAR0_UPPER, 0x0);
94 tsi108_write_reg(TSI108_PCI_P2O_BAR0, 0xc0000000);
95
96 /* Init the PCI LUTs to do no remapping */
97 lut_addr = 0x500;
98 lut_val = 0x00000002;
99
100 for (i = 0; i < 32; i++) {
101 tsi108_write_reg(TSI108_PCI_OFFSET + lut_addr, lut_val);
102 lut_addr += 4;
103 tsi108_write_reg(TSI108_PCI_OFFSET + lut_addr, 0x40000000);
104 lut_addr += 4;
105 lut_val += 0x02000000;
106 }
107 tsi108_write_reg(TSI108_PCI_P2O_PAGE_SIZES, 0x00007900);
108
109 /* Set 64-bit PCI bus address for system memory */
110 tsi108_write_reg(TSI108_PCI_P2O_BAR2_UPPER, 0x0);
111 tsi108_write_reg(TSI108_PCI_P2O_BAR2, 0x0);
112}
113
114static void __init holly_setup_arch(void)
115{
Josh Boyercb9e4d12007-05-08 07:28:38 +1000116 struct device_node *np;
117
118 if (ppc_md.progress)
119 ppc_md.progress("holly_setup_arch():set_bridge", 0);
120
Josh Boyercb9e4d12007-05-08 07:28:38 +1000121 tsi108_csr_vir_base = get_vir_csrbase();
122
123 /* setup PCI host bridge */
124 holly_remap_bridge();
125
126 np = of_find_node_by_type(NULL, "pci");
127 if (np)
128 tsi108_setup_pci(np, HOLLY_PCI_CFG_PHYS, 1);
129
130 ppc_md.pci_exclude_device = holly_exclude_device;
131 if (ppc_md.progress)
132 ppc_md.progress("tsi108: resources set", 0x100);
133
134 printk(KERN_INFO "PPC750GX/CL Platform\n");
135}
136
137/*
Gabriel C33567a02007-08-01 19:41:09 +1000138 * Interrupt setup and service. Interrupts on the holly come
Josh Boyercb9e4d12007-05-08 07:28:38 +1000139 * from the four external INT pins, PCI interrupts are routed via
140 * PCI interrupt control registers, it generates internal IRQ23
141 *
142 * Interrupt routing on the Holly Board:
143 * TSI108:PB_INT[0] -> CPU0:INT#
144 * TSI108:PB_INT[1] -> CPU0:MCP#
145 * TSI108:PB_INT[2] -> N/C
146 * TSI108:PB_INT[3] -> N/C
147 */
148static void __init holly_init_IRQ(void)
149{
150 struct mpic *mpic;
Josh Boyercb9e4d12007-05-08 07:28:38 +1000151#ifdef CONFIG_PCI
152 unsigned int cascade_pci_irq;
153 struct device_node *tsi_pci;
154 struct device_node *cascade_node = NULL;
155#endif
156
Kyle Moffette55d7f72011-12-22 10:19:14 +0000157 mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
Josh Boyercb9e4d12007-05-08 07:28:38 +1000158 MPIC_SPV_EOI | MPIC_NO_PTHROU_DIS | MPIC_REGSET_TSI108,
Kyle Moffett50196092011-12-22 10:19:12 +0000159 24, 0,
Josh Boyercb9e4d12007-05-08 07:28:38 +1000160 "Tsi108_PIC");
161
162 BUG_ON(mpic == NULL);
163
Kyle Moffette7a98672011-12-02 06:28:01 +0000164 mpic_assign_isu(mpic, 0, mpic->paddr + 0x100);
Josh Boyercb9e4d12007-05-08 07:28:38 +1000165
166 mpic_init(mpic);
167
168#ifdef CONFIG_PCI
169 tsi_pci = of_find_node_by_type(NULL, "pci");
170 if (tsi_pci == NULL) {
171 printk(KERN_ERR "%s: No tsi108 pci node found !\n", __func__);
172 return;
173 }
174
175 cascade_node = of_find_node_by_type(NULL, "pic-router");
176 if (cascade_node == NULL) {
177 printk(KERN_ERR "%s: No tsi108 pci cascade node found !\n", __func__);
178 return;
179 }
180
181 cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
182 pr_debug("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, (u32) cascade_pci_irq);
183 tsi108_pci_int_init(cascade_node);
Thomas Gleixnerec775d02011-03-25 16:45:20 +0100184 irq_set_handler_data(cascade_pci_irq, mpic);
185 irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
Josh Boyercb9e4d12007-05-08 07:28:38 +1000186#endif
187 /* Configure MPIC outputs to CPU0 */
188 tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
Josh Boyercb9e4d12007-05-08 07:28:38 +1000189}
190
191void holly_show_cpuinfo(struct seq_file *m)
192{
193 seq_printf(m, "vendor\t\t: IBM\n");
194 seq_printf(m, "machine\t\t: PPC750 GX/CL\n");
195}
196
197void holly_restart(char *cmd)
198{
199 __be32 __iomem *ocn_bar1 = NULL;
200 unsigned long bar;
201 struct device_node *bridge = NULL;
202 const void *prop;
203 int size;
204 phys_addr_t addr = 0xc0000000;
205
206 local_irq_disable();
207
208 bridge = of_find_node_by_type(NULL, "tsi-bridge");
209 if (bridge) {
210 prop = of_get_property(bridge, "reg", &size);
211 addr = of_translate_address(bridge, prop);
212 }
213 addr += (TSI108_PB_OFFSET + 0x414);
214
215 ocn_bar1 = ioremap(addr, 0x4);
216
217 /* Turn on the BOOT bit so the addresses are correctly
218 * routed to the HLP interface */
219 bar = ioread32be(ocn_bar1);
220 bar |= 2;
221 iowrite32be(bar, ocn_bar1);
222 iosync();
223
224 /* Set SRR0 to the reset vector and turn on MSR_IP */
225 mtspr(SPRN_SRR0, 0xfff00100);
226 mtspr(SPRN_SRR1, MSR_IP);
227
228 /* Do an rfi to jump back to firmware. Somewhat evil,
229 * but it works
230 */
231 __asm__ __volatile__("rfi" : : : "memory");
232
233 /* Spin until reset happens. Shouldn't really get here */
234 for (;;) ;
235}
236
237void holly_power_off(void)
238{
239 local_irq_disable();
240 /* No way to shut power off with software */
241 for (;;) ;
242}
243
244void holly_halt(void)
245{
246 holly_power_off();
247}
248
249/*
250 * Called very early, device-tree isn't unflattened
251 */
252static int __init holly_probe(void)
253{
254 unsigned long root = of_get_flat_dt_root();
255
256 if (!of_flat_dt_is_compatible(root, "ibm,holly"))
257 return 0;
258 return 1;
259}
260
261static int ppc750_machine_check_exception(struct pt_regs *regs)
262{
263 const struct exception_table_entry *entry;
264
265 /* Are we prepared to handle this fault */
266 if ((entry = search_exception_tables(regs->nip)) != NULL) {
267 tsi108_clear_pci_cfg_error();
268 regs->msr |= MSR_RI;
269 regs->nip = entry->fixup;
270 return 1;
271 }
272 return 0;
273}
274
275define_machine(holly){
276 .name = "PPC750 GX/CL TSI",
277 .probe = holly_probe,
278 .setup_arch = holly_setup_arch,
279 .init_IRQ = holly_init_IRQ,
280 .show_cpuinfo = holly_show_cpuinfo,
281 .get_irq = mpic_get_irq,
282 .restart = holly_restart,
283 .calibrate_decr = generic_calibrate_decr,
284 .machine_check_exception = ppc750_machine_check_exception,
285 .progress = udbg_progress,
286};