Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007-2009 ST-Ericsson AB |
| 3 | * License terms: GNU General Public License (GPL) version 2 |
| 4 | * Real Time Clock interface for ST-Ericsson AB COH 901 331 RTC. |
| 5 | * Author: Linus Walleij <linus.walleij@stericsson.com> |
| 6 | * Based on rtc-pl031.c by Deepak Saxena <dsaxena@plexity.net> |
| 7 | * Copyright 2006 (c) MontaVista Software, Inc. |
| 8 | */ |
| 9 | #include <linux/init.h> |
| 10 | #include <linux/module.h> |
| 11 | #include <linux/rtc.h> |
| 12 | #include <linux/clk.h> |
| 13 | #include <linux/interrupt.h> |
| 14 | #include <linux/pm.h> |
| 15 | #include <linux/platform_device.h> |
| 16 | #include <linux/io.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 17 | #include <linux/slab.h> |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 18 | |
| 19 | /* |
| 20 | * Registers in the COH 901 331 |
| 21 | */ |
| 22 | /* Alarm value 32bit (R/W) */ |
| 23 | #define COH901331_ALARM 0x00U |
| 24 | /* Used to set current time 32bit (R/W) */ |
| 25 | #define COH901331_SET_TIME 0x04U |
| 26 | /* Indication if current time is valid 32bit (R/-) */ |
| 27 | #define COH901331_VALID 0x08U |
| 28 | /* Read the current time 32bit (R/-) */ |
| 29 | #define COH901331_CUR_TIME 0x0cU |
| 30 | /* Event register for the "alarm" interrupt */ |
| 31 | #define COH901331_IRQ_EVENT 0x10U |
| 32 | /* Mask register for the "alarm" interrupt */ |
| 33 | #define COH901331_IRQ_MASK 0x14U |
| 34 | /* Force register for the "alarm" interrupt */ |
| 35 | #define COH901331_IRQ_FORCE 0x18U |
| 36 | |
| 37 | /* |
| 38 | * Reference to RTC block clock |
| 39 | * Notice that the frequent clk_enable()/clk_disable() on this |
| 40 | * clock is mainly to be able to turn on/off other clocks in the |
| 41 | * hierarchy as needed, the RTC clock is always on anyway. |
| 42 | */ |
| 43 | struct coh901331_port { |
| 44 | struct rtc_device *rtc; |
| 45 | struct clk *clk; |
| 46 | u32 phybase; |
| 47 | u32 physize; |
| 48 | void __iomem *virtbase; |
| 49 | int irq; |
| 50 | #ifdef CONFIG_PM |
| 51 | u32 irqmaskstore; |
| 52 | #endif |
| 53 | }; |
| 54 | |
| 55 | static irqreturn_t coh901331_interrupt(int irq, void *data) |
| 56 | { |
| 57 | struct coh901331_port *rtap = data; |
| 58 | |
| 59 | clk_enable(rtap->clk); |
| 60 | /* Ack IRQ */ |
| 61 | writel(1, rtap->virtbase + COH901331_IRQ_EVENT); |
Linus Walleij | 378ce74 | 2009-11-14 01:03:24 +0100 | [diff] [blame] | 62 | /* |
| 63 | * Disable the interrupt. This is necessary because |
| 64 | * the RTC lives on a lower-clocked line and will |
| 65 | * not release the IRQ line until after a few (slower) |
| 66 | * clock cycles. The interrupt will be re-enabled when |
| 67 | * a new alarm is set anyway. |
| 68 | */ |
| 69 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 70 | clk_disable(rtap->clk); |
Linus Walleij | 378ce74 | 2009-11-14 01:03:24 +0100 | [diff] [blame] | 71 | |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 72 | /* Set alarm flag */ |
| 73 | rtc_update_irq(rtap->rtc, 1, RTC_AF); |
| 74 | |
| 75 | return IRQ_HANDLED; |
| 76 | } |
| 77 | |
| 78 | static int coh901331_read_time(struct device *dev, struct rtc_time *tm) |
| 79 | { |
| 80 | struct coh901331_port *rtap = dev_get_drvdata(dev); |
| 81 | |
| 82 | clk_enable(rtap->clk); |
| 83 | /* Check if the time is valid */ |
| 84 | if (readl(rtap->virtbase + COH901331_VALID)) { |
| 85 | rtc_time_to_tm(readl(rtap->virtbase + COH901331_CUR_TIME), tm); |
| 86 | clk_disable(rtap->clk); |
| 87 | return rtc_valid_tm(tm); |
| 88 | } |
| 89 | clk_disable(rtap->clk); |
| 90 | return -EINVAL; |
| 91 | } |
| 92 | |
| 93 | static int coh901331_set_mmss(struct device *dev, unsigned long secs) |
| 94 | { |
| 95 | struct coh901331_port *rtap = dev_get_drvdata(dev); |
| 96 | |
| 97 | clk_enable(rtap->clk); |
| 98 | writel(secs, rtap->virtbase + COH901331_SET_TIME); |
| 99 | clk_disable(rtap->clk); |
| 100 | |
| 101 | return 0; |
| 102 | } |
| 103 | |
| 104 | static int coh901331_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 105 | { |
| 106 | struct coh901331_port *rtap = dev_get_drvdata(dev); |
| 107 | |
| 108 | clk_enable(rtap->clk); |
| 109 | rtc_time_to_tm(readl(rtap->virtbase + COH901331_ALARM), &alarm->time); |
| 110 | alarm->pending = readl(rtap->virtbase + COH901331_IRQ_EVENT) & 1U; |
| 111 | alarm->enabled = readl(rtap->virtbase + COH901331_IRQ_MASK) & 1U; |
| 112 | clk_disable(rtap->clk); |
| 113 | |
| 114 | return 0; |
| 115 | } |
| 116 | |
| 117 | static int coh901331_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 118 | { |
| 119 | struct coh901331_port *rtap = dev_get_drvdata(dev); |
| 120 | unsigned long time; |
| 121 | |
| 122 | rtc_tm_to_time(&alarm->time, &time); |
| 123 | clk_enable(rtap->clk); |
| 124 | writel(time, rtap->virtbase + COH901331_ALARM); |
| 125 | writel(alarm->enabled, rtap->virtbase + COH901331_IRQ_MASK); |
| 126 | clk_disable(rtap->clk); |
| 127 | |
| 128 | return 0; |
| 129 | } |
| 130 | |
| 131 | static int coh901331_alarm_irq_enable(struct device *dev, unsigned int enabled) |
| 132 | { |
| 133 | struct coh901331_port *rtap = dev_get_drvdata(dev); |
| 134 | |
| 135 | clk_enable(rtap->clk); |
| 136 | if (enabled) |
| 137 | writel(1, rtap->virtbase + COH901331_IRQ_MASK); |
| 138 | else |
| 139 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); |
| 140 | clk_disable(rtap->clk); |
Linus Walleij | 378ce74 | 2009-11-14 01:03:24 +0100 | [diff] [blame] | 141 | |
| 142 | return 0; |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 143 | } |
| 144 | |
| 145 | static struct rtc_class_ops coh901331_ops = { |
| 146 | .read_time = coh901331_read_time, |
| 147 | .set_mmss = coh901331_set_mmss, |
| 148 | .read_alarm = coh901331_read_alarm, |
| 149 | .set_alarm = coh901331_set_alarm, |
| 150 | .alarm_irq_enable = coh901331_alarm_irq_enable, |
| 151 | }; |
| 152 | |
| 153 | static int __exit coh901331_remove(struct platform_device *pdev) |
| 154 | { |
| 155 | struct coh901331_port *rtap = dev_get_drvdata(&pdev->dev); |
| 156 | |
| 157 | if (rtap) { |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 158 | rtc_device_unregister(rtap->rtc); |
Linus Walleij | 8384dfe | 2012-07-30 14:41:31 -0700 | [diff] [blame] | 159 | clk_unprepare(rtap->clk); |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 160 | clk_put(rtap->clk); |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 161 | platform_set_drvdata(pdev, NULL); |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 162 | } |
| 163 | |
| 164 | return 0; |
| 165 | } |
| 166 | |
| 167 | |
| 168 | static int __init coh901331_probe(struct platform_device *pdev) |
| 169 | { |
| 170 | int ret; |
| 171 | struct coh901331_port *rtap; |
| 172 | struct resource *res; |
| 173 | |
Linus Walleij | 36ac1d24 | 2012-07-30 14:41:32 -0700 | [diff] [blame] | 174 | rtap = devm_kzalloc(&pdev->dev, |
| 175 | sizeof(struct coh901331_port), GFP_KERNEL); |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 176 | if (!rtap) |
| 177 | return -ENOMEM; |
| 178 | |
| 179 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Linus Walleij | 36ac1d24 | 2012-07-30 14:41:32 -0700 | [diff] [blame] | 180 | if (!res) |
| 181 | return -ENOENT; |
| 182 | |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 183 | rtap->phybase = res->start; |
| 184 | rtap->physize = resource_size(res); |
| 185 | |
Linus Walleij | 36ac1d24 | 2012-07-30 14:41:32 -0700 | [diff] [blame] | 186 | if (devm_request_mem_region(&pdev->dev, rtap->phybase, rtap->physize, |
| 187 | "rtc-coh901331") == NULL) |
| 188 | return -EBUSY; |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 189 | |
Linus Walleij | 36ac1d24 | 2012-07-30 14:41:32 -0700 | [diff] [blame] | 190 | rtap->virtbase = devm_ioremap(&pdev->dev, rtap->phybase, rtap->physize); |
| 191 | if (!rtap->virtbase) |
| 192 | return -ENOMEM; |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 193 | |
| 194 | rtap->irq = platform_get_irq(pdev, 0); |
Linus Walleij | 36ac1d24 | 2012-07-30 14:41:32 -0700 | [diff] [blame] | 195 | if (devm_request_irq(&pdev->dev, rtap->irq, coh901331_interrupt, 0, |
| 196 | "RTC COH 901 331 Alarm", rtap)) |
| 197 | return -EIO; |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 198 | |
| 199 | rtap->clk = clk_get(&pdev->dev, NULL); |
| 200 | if (IS_ERR(rtap->clk)) { |
| 201 | ret = PTR_ERR(rtap->clk); |
| 202 | dev_err(&pdev->dev, "could not get clock\n"); |
Linus Walleij | 36ac1d24 | 2012-07-30 14:41:32 -0700 | [diff] [blame] | 203 | return ret; |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 204 | } |
| 205 | |
| 206 | /* We enable/disable the clock only to assure it works */ |
Linus Walleij | 8384dfe | 2012-07-30 14:41:31 -0700 | [diff] [blame] | 207 | ret = clk_prepare_enable(rtap->clk); |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 208 | if (ret) { |
| 209 | dev_err(&pdev->dev, "could not enable clock\n"); |
Linus Walleij | 8384dfe | 2012-07-30 14:41:31 -0700 | [diff] [blame] | 210 | goto out_no_clk_prepenable; |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 211 | } |
| 212 | clk_disable(rtap->clk); |
| 213 | |
Linus Walleij | 9cf3b5f | 2011-04-17 20:32:19 +0200 | [diff] [blame] | 214 | platform_set_drvdata(pdev, rtap); |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 215 | rtap->rtc = rtc_device_register("coh901331", &pdev->dev, &coh901331_ops, |
| 216 | THIS_MODULE); |
| 217 | if (IS_ERR(rtap->rtc)) { |
| 218 | ret = PTR_ERR(rtap->rtc); |
| 219 | goto out_no_rtc; |
| 220 | } |
| 221 | |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 222 | return 0; |
| 223 | |
| 224 | out_no_rtc: |
Linus Walleij | 9cf3b5f | 2011-04-17 20:32:19 +0200 | [diff] [blame] | 225 | platform_set_drvdata(pdev, NULL); |
Linus Walleij | 8384dfe | 2012-07-30 14:41:31 -0700 | [diff] [blame] | 226 | clk_unprepare(rtap->clk); |
| 227 | out_no_clk_prepenable: |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 228 | clk_put(rtap->clk); |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 229 | return ret; |
| 230 | } |
| 231 | |
| 232 | #ifdef CONFIG_PM |
| 233 | static int coh901331_suspend(struct platform_device *pdev, pm_message_t state) |
| 234 | { |
| 235 | struct coh901331_port *rtap = dev_get_drvdata(&pdev->dev); |
| 236 | |
| 237 | /* |
| 238 | * If this RTC alarm will be used for waking the system up, |
| 239 | * don't disable it of course. Else we just disable the alarm |
| 240 | * and await suspension. |
| 241 | */ |
| 242 | if (device_may_wakeup(&pdev->dev)) { |
| 243 | enable_irq_wake(rtap->irq); |
| 244 | } else { |
| 245 | clk_enable(rtap->clk); |
| 246 | rtap->irqmaskstore = readl(rtap->virtbase + COH901331_IRQ_MASK); |
| 247 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); |
| 248 | clk_disable(rtap->clk); |
| 249 | } |
Linus Walleij | 8384dfe | 2012-07-30 14:41:31 -0700 | [diff] [blame] | 250 | clk_unprepare(rtap->clk); |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 251 | return 0; |
| 252 | } |
| 253 | |
| 254 | static int coh901331_resume(struct platform_device *pdev) |
| 255 | { |
| 256 | struct coh901331_port *rtap = dev_get_drvdata(&pdev->dev); |
| 257 | |
Linus Walleij | 8384dfe | 2012-07-30 14:41:31 -0700 | [diff] [blame] | 258 | clk_prepare(rtap->clk); |
James Hogan | 5a98c04 | 2010-03-05 13:44:31 -0800 | [diff] [blame] | 259 | if (device_may_wakeup(&pdev->dev)) { |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 260 | disable_irq_wake(rtap->irq); |
James Hogan | 5a98c04 | 2010-03-05 13:44:31 -0800 | [diff] [blame] | 261 | } else { |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 262 | clk_enable(rtap->clk); |
| 263 | writel(rtap->irqmaskstore, rtap->virtbase + COH901331_IRQ_MASK); |
| 264 | clk_disable(rtap->clk); |
James Hogan | 5a98c04 | 2010-03-05 13:44:31 -0800 | [diff] [blame] | 265 | } |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 266 | return 0; |
| 267 | } |
| 268 | #else |
| 269 | #define coh901331_suspend NULL |
| 270 | #define coh901331_resume NULL |
| 271 | #endif |
| 272 | |
| 273 | static void coh901331_shutdown(struct platform_device *pdev) |
| 274 | { |
| 275 | struct coh901331_port *rtap = dev_get_drvdata(&pdev->dev); |
| 276 | |
| 277 | clk_enable(rtap->clk); |
| 278 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); |
Julia Lawall | 828296d | 2012-10-04 17:14:07 -0700 | [diff] [blame] | 279 | clk_disable_unprepare(rtap->clk); |
Linus Walleij | aa958f5 | 2009-09-22 16:46:24 -0700 | [diff] [blame] | 280 | } |
| 281 | |
| 282 | static struct platform_driver coh901331_driver = { |
| 283 | .driver = { |
| 284 | .name = "rtc-coh901331", |
| 285 | .owner = THIS_MODULE, |
| 286 | }, |
| 287 | .remove = __exit_p(coh901331_remove), |
| 288 | .suspend = coh901331_suspend, |
| 289 | .resume = coh901331_resume, |
| 290 | .shutdown = coh901331_shutdown, |
| 291 | }; |
| 292 | |
| 293 | static int __init coh901331_init(void) |
| 294 | { |
| 295 | return platform_driver_probe(&coh901331_driver, coh901331_probe); |
| 296 | } |
| 297 | |
| 298 | static void __exit coh901331_exit(void) |
| 299 | { |
| 300 | platform_driver_unregister(&coh901331_driver); |
| 301 | } |
| 302 | |
| 303 | module_init(coh901331_init); |
| 304 | module_exit(coh901331_exit); |
| 305 | |
| 306 | MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>"); |
| 307 | MODULE_DESCRIPTION("ST-Ericsson AB COH 901 331 RTC Driver"); |
| 308 | MODULE_LICENSE("GPL"); |