Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef _ASM_HW_IRQ_H |
| 2 | #define _ASM_HW_IRQ_H |
| 3 | |
| 4 | /* |
| 5 | * linux/include/asm/hw_irq.h |
| 6 | * |
| 7 | * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar |
| 8 | * |
| 9 | * moved some of the old arch/i386/kernel/irq.h to here. VY |
| 10 | * |
| 11 | * IRQ/IPI changes taken from work by Thomas Radke |
| 12 | * <tomsoft@informatik.tu-chemnitz.de> |
| 13 | * |
| 14 | * hacked by Andi Kleen for x86-64. |
| 15 | * |
| 16 | * $Id: hw_irq.h,v 1.24 2001/09/14 20:55:03 vojtech Exp $ |
| 17 | */ |
| 18 | |
| 19 | #ifndef __ASSEMBLY__ |
| 20 | #include <linux/config.h> |
| 21 | #include <asm/atomic.h> |
| 22 | #include <asm/irq.h> |
| 23 | #include <linux/profile.h> |
| 24 | #include <linux/smp.h> |
| 25 | |
| 26 | struct hw_interrupt_type; |
| 27 | #endif |
| 28 | |
| 29 | /* |
| 30 | * IDT vectors usable for external interrupt sources start |
| 31 | * at 0x20: |
| 32 | */ |
| 33 | #define FIRST_EXTERNAL_VECTOR 0x20 |
| 34 | |
| 35 | #define IA32_SYSCALL_VECTOR 0x80 |
| 36 | |
| 37 | |
| 38 | /* |
| 39 | * Vectors 0x20-0x2f are used for ISA interrupts. |
| 40 | */ |
| 41 | |
| 42 | /* |
| 43 | * Special IRQ vectors used by the SMP architecture, 0xf0-0xff |
| 44 | * |
| 45 | * some of the following vectors are 'rare', they are merged |
| 46 | * into a single vector (CALL_FUNCTION_VECTOR) to save vector space. |
| 47 | * TLB, reschedule and local APIC vectors are performance-critical. |
| 48 | * |
| 49 | * Vectors 0xf0-0xf9 are free (reserved for future Linux use). |
| 50 | */ |
| 51 | #define SPURIOUS_APIC_VECTOR 0xff |
| 52 | #define ERROR_APIC_VECTOR 0xfe |
Andi Kleen | e5bc8b6 | 2005-09-12 18:49:24 +0200 | [diff] [blame^] | 53 | #define RESCHEDULE_VECTOR 0xfd |
| 54 | #define CALL_FUNCTION_VECTOR 0xfc |
| 55 | #define KDB_VECTOR 0xfb /* reserved for KDB */ |
| 56 | #define THERMAL_APIC_VECTOR 0xfa |
| 57 | /* 0xf9 free */ |
| 58 | #define INVALIDATE_TLB_VECTOR_END 0xf8 |
| 59 | #define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f8 used for TLB flush */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | |
Andi Kleen | e5bc8b6 | 2005-09-12 18:49:24 +0200 | [diff] [blame^] | 61 | #define NUM_INVALIDATE_TLB_VECTORS 8 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | |
| 63 | /* |
| 64 | * Local APIC timer IRQ vector is on a different priority level, |
| 65 | * to work around the 'lost local interrupt if more than 2 IRQ |
| 66 | * sources per level' errata. |
| 67 | */ |
| 68 | #define LOCAL_TIMER_VECTOR 0xef |
| 69 | |
| 70 | /* |
| 71 | * First APIC vector available to drivers: (vectors 0x30-0xee) |
| 72 | * we start at 0x31 to spread out vectors evenly between priority |
| 73 | * levels. (0x80 is the syscall vector) |
| 74 | */ |
| 75 | #define FIRST_DEVICE_VECTOR 0x31 |
| 76 | #define FIRST_SYSTEM_VECTOR 0xef /* duplicated in irq.h */ |
| 77 | |
| 78 | |
| 79 | #ifndef __ASSEMBLY__ |
| 80 | extern u8 irq_vector[NR_IRQ_VECTORS]; |
| 81 | #define IO_APIC_VECTOR(irq) (irq_vector[irq]) |
| 82 | #define AUTO_ASSIGN -1 |
| 83 | |
| 84 | /* |
| 85 | * Various low-level irq details needed by irq.c, process.c, |
| 86 | * time.c, io_apic.c and smp.c |
| 87 | * |
| 88 | * Interrupt entry/exit code at both C and assembly level |
| 89 | */ |
| 90 | |
| 91 | extern void disable_8259A_irq(unsigned int irq); |
| 92 | extern void enable_8259A_irq(unsigned int irq); |
| 93 | extern int i8259A_irq_pending(unsigned int irq); |
| 94 | extern void make_8259A_irq(unsigned int irq); |
| 95 | extern void init_8259A(int aeoi); |
| 96 | extern void FASTCALL(send_IPI_self(int vector)); |
| 97 | extern void init_VISWS_APIC_irqs(void); |
| 98 | extern void setup_IO_APIC(void); |
| 99 | extern void disable_IO_APIC(void); |
| 100 | extern void print_IO_APIC(void); |
| 101 | extern int IO_APIC_get_PCI_irq_vector(int bus, int slot, int fn); |
| 102 | extern void send_IPI(int dest, int vector); |
| 103 | extern void setup_ioapic_dest(void); |
| 104 | |
| 105 | extern unsigned long io_apic_irqs; |
| 106 | |
| 107 | extern atomic_t irq_err_count; |
| 108 | extern atomic_t irq_mis_count; |
| 109 | |
| 110 | #define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs)) |
| 111 | |
| 112 | #define __STR(x) #x |
| 113 | #define STR(x) __STR(x) |
| 114 | |
| 115 | #include <asm/ptrace.h> |
| 116 | |
| 117 | #define IRQ_NAME2(nr) nr##_interrupt(void) |
| 118 | #define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr) |
| 119 | |
| 120 | /* |
| 121 | * SMP has a few special interrupts for IPI messages |
| 122 | */ |
| 123 | |
| 124 | #define BUILD_IRQ(nr) \ |
| 125 | asmlinkage void IRQ_NAME(nr); \ |
| 126 | __asm__( \ |
| 127 | "\n.p2align\n" \ |
| 128 | "IRQ" #nr "_interrupt:\n\t" \ |
| 129 | "push $" #nr "-256 ; " \ |
| 130 | "jmp common_interrupt"); |
| 131 | |
| 132 | #if defined(CONFIG_X86_IO_APIC) |
| 133 | static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) { |
| 134 | if (IO_APIC_IRQ(i)) |
| 135 | send_IPI_self(IO_APIC_VECTOR(i)); |
| 136 | } |
| 137 | #else |
| 138 | static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {} |
| 139 | #endif |
| 140 | |
| 141 | #define platform_legacy_irq(irq) ((irq) < 16) |
| 142 | |
| 143 | #endif |
| 144 | |
| 145 | #endif /* _ASM_HW_IRQ_H */ |