Helmut Klein | 45d7b24 | 2017-06-14 10:29:14 +0200 | [diff] [blame] | 1 | Amlogic Meson SoC UART Serial Interface |
| 2 | ======================================= |
| 3 | |
| 4 | The Amlogic Meson SoC UART Serial Interface is present on a large range |
| 5 | of SoCs, and can be present either in the "Always-On" power domain or the |
| 6 | "Everything-Else" power domain. |
| 7 | |
| 8 | The particularity of the "Always-On" Serial Interface is that the hardware |
| 9 | is active since power-on and does not need any clock gating and is usable |
| 10 | as very early serial console. |
| 11 | |
| 12 | Required properties: |
| 13 | - compatible : compatible: value should be different for each SoC family as : |
| 14 | - Meson6 : "amlogic,meson6-uart" |
| 15 | - Meson8 : "amlogic,meson8-uart" |
| 16 | - Meson8b : "amlogic,meson8b-uart" |
| 17 | - GX (GXBB, GXL, GXM) : "amlogic,meson-gx-uart" |
| 18 | eventually followed by : "amlogic,meson-ao-uart" if this UART interface |
| 19 | is in the "Always-On" power domain. |
| 20 | - reg : offset and length of the register set for the device. |
| 21 | - interrupts : identifier to the device interrupt |
| 22 | - clocks : a list of phandle + clock-specifier pairs, one for each |
| 23 | entry in clock names. |
Geert Uytterhoeven | 34df246 | 2018-04-23 09:32:40 +0200 | [diff] [blame] | 24 | - clock-names : |
Helmut Klein | 45d7b24 | 2017-06-14 10:29:14 +0200 | [diff] [blame] | 25 | * "xtal" for external xtal clock identifier |
| 26 | * "pclk" for the bus core clock, either the clk81 clock or the gate clock |
| 27 | * "baud" for the source of the baudrate generator, can be either the xtal |
| 28 | or the pclk. |
| 29 | |
| 30 | e.g. |
| 31 | uart_A: serial@84c0 { |
| 32 | compatible = "amlogic,meson-gx-uart"; |
| 33 | reg = <0x0 0x84c0 0x0 0x14>; |
| 34 | interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>; |
| 35 | /* Use xtal as baud rate clock source */ |
| 36 | clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; |
| 37 | clock-names = "xtal", "pclk", "baud"; |
| 38 | }; |