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Ezequiel Garciae794db22015-06-01 22:57:16 -03001/*
2 * CIAA NXP LPC4337 (http://www.proyecto-ciaa.com.ar)
3 *
4 * Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
5 *
6 * This code is released using a dual license strategy: BSD/GPL
7 * You can choose the licence that better fits your requirements.
8 *
9 * Released under the terms of 3-clause BSD License
10 * Released under the terms of GNU General Public License Version 2.0
11 */
12/dts-v1/;
13
14#include "lpc18xx.dtsi"
15#include "lpc4357.dtsi"
16
17#include "dt-bindings/gpio/gpio.h"
18
19/ {
20 model = "CIAA NXP LPC4337";
21 compatible = "ciaa,lpc4337", "nxp,lpc4337", "nxp,lpc4350";
22
23 aliases {
24 serial0 = &uart2;
25 serial1 = &uart3;
26 };
27
28 chosen {
29 bootargs = "console=ttyS0,115200 earlyprintk";
30 stdout-path = &uart2;
31 };
32
33 memory {
34 device_type = "memory";
35 reg = <0x28000000 0x0800000>; /* 8 MB */
36 };
37};
38
39&pinctrl {
40 enet_rmii_pins: enet-rmii-pins {
41 enet_rmii_rxd_cfg {
42 pins = "p1_15", "p0_0";
43 function = "enet";
44 slew-rate = <1>;
45 bias-disable;
46 input-enable;
47 input-schmitt-disable;
48 };
49
50 enet_rmii_txd_cfg {
51 pins = "p1_18", "p1_20";
52 function = "enet";
53 slew-rate = <1>;
54 bias-disable;
55 input-enable;
56 input-schmitt-disable;
57 };
58
59 enet_rmii_rx_dv_cfg {
60 pins = "p1_16";
61 function = "enet";
62 bias-disable;
63 input-enable;
64 input-schmitt-disable;
65 };
66
67 enet_rmii_tx_en_cfg {
68 pins = "p0_1";
69 function = "enet";
70 bias-disable;
71 input-enable;
72 input-schmitt-disable;
73 };
74
75 enet_ref_clk_cfg {
76 pins = "p1_19";
77 function = "enet";
78 slew-rate = <1>;
79 bias-disable;
80 input-enable;
81 input-schmitt-disable;
82 };
83
84 enet_mdio_cfg {
85 pins = "p1_17";
86 function = "enet";
87 bias-disable;
88 input-enable;
89 input-schmitt-disable;
90 };
91
92 enet_mdc_cfg {
93 pins = "p7_7";
94 function = "enet";
95 slew-rate = <1>;
96 bias-disable;
97 input-enable;
98 input-schmitt-disable;
99 };
100 };
101
102 ssp_pins: ssp-pins {
103 ssp1_cs {
104 pins = "p6_7";
105 function = "gpio";
106 bias-pull-up;
107 bias-disable;
108 };
109
110 ssp1_miso_mosi {
111 pins = "p1_3", "p1_4";
112 function = "ssp1";
113 slew-rate = <1>;
114 bias-pull-down;
115 input-enable;
116 input-schmitt-disable;
117 };
118
119 ssp1_sck {
120 pins = "pf_4";
121 function = "ssp1";
122 slew-rate = <1>;
123 bias-disable;
124 };
125 };
126
127 uart2_pins: uart2-pins {
128 uart2_rx_cfg {
129 pins = "p7_2";
130 function = "uart2";
131 bias-disable;
132 input-enable;
133 };
134
135 uart2_tx_cfg {
136 pins = "p7_1";
137 function = "uart2";
138 bias-disable;
139 };
140 };
141
142 uart3_pins: uart3-pins {
143 uart3_rx_cfg {
144 pins = "p2_4";
145 function = "uart3";
146 bias-disable;
147 input-enable;
148 };
149
150 uart3_tx_cfg {
151 pins = "p2_3";
152 function = "uart3";
153 bias-disable;
154 };
155 };
156};
157
158&enet_tx_clk {
159 clock-frequency = <50000000>;
160};
161
162&mac {
163 status = "okay";
164 phy-mode = "rmii";
165 pinctrl-names = "default";
166 pinctrl-0 = <&enet_rmii_pins>;
167};
168
169&ssp1 {
170 status = "okay";
171 pinctrl-names = "default";
172 pinctrl-0 = <&ssp_pins>;
173 cs-gpios = <&gpio LPC_GPIO(5,15) GPIO_ACTIVE_HIGH>;
174 num-cs = <1>;
175};
176
177&uart2 {
178 status = "okay";
179 pinctrl-names = "default";
180 pinctrl-0 = <&uart2_pins>;
181};
182
183&uart3 {
184 status = "okay";
185 pinctrl-names = "default";
186 pinctrl-0 = <&uart3_pins>;
187};