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Steven Tothd19770e2007-03-11 20:44:05 -03001/*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
Steven Toth6d897612008-09-03 17:12:12 -03004 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
Steven Tothd19770e2007-03-11 20:44:05 -03005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/delay.h>
Steven Toth7b888012008-01-10 03:40:49 -030026#include <media/cx25840.h>
Igor M. Liplianin78db8542011-01-25 17:04:00 -030027#include <linux/firmware.h>
Igor M. Liplianincff4fa82011-09-23 11:17:41 -030028#include <misc/altera.h>
Steven Tothd19770e2007-03-11 20:44:05 -030029
30#include "cx23885.h"
Steven Toth90a71b12008-08-04 21:38:46 -030031#include "tuner-xc2028.h"
Abylay Ospanb8f0d302011-07-14 05:20:29 -030032#include "netup-eeprom.h"
Igor M. Liplianin5a23b072009-03-03 12:06:09 -030033#include "netup-init.h"
Igor M. Liplianin78db8542011-01-25 17:04:00 -030034#include "altera-ci.h"
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -030035#include "xc4000.h"
Igor M. Liplianin78db8542011-01-25 17:04:00 -030036#include "xc5000.h"
Andy Walls29f8a0a2009-09-26 23:17:30 -030037#include "cx23888-ir.h"
Steven Tothd19770e2007-03-11 20:44:05 -030038
Anton Nurkin89343052012-08-14 01:35:44 -030039static unsigned int netup_card_rev = 4;
Abylay Ospan2d124212011-07-18 04:14:28 -030040module_param(netup_card_rev, int, 0644);
41MODULE_PARM_DESC(netup_card_rev,
42 "NetUP Dual DVB-T/C CI card revision");
Andy Wallsfa647f22010-07-19 21:22:05 -030043static unsigned int enable_885_ir;
44module_param(enable_885_ir, int, 0644);
45MODULE_PARM_DESC(enable_885_ir,
46 "Enable integrated IR controller for supported\n"
47 "\t\t CX2388[57] boards that are wired for it:\n"
48 "\t\t\tHVR-1250 (reported safe)\n"
Djuri Baars076f0e32012-07-28 09:01:38 -030049 "\t\t\tTerraTec Cinergy T PCIe Dual (not well tested, appears to be safe)\n"
Andy Wallsfa647f22010-07-19 21:22:05 -030050 "\t\t\tTeVii S470 (reported unsafe)\n"
51 "\t\t This can cause an interrupt storm with some cards.\n"
52 "\t\t Default: 0 [Disabled]");
53
Steven Tothd19770e2007-03-11 20:44:05 -030054/* ------------------------------------------------------------------ */
55/* board config info */
56
57struct cx23885_board cx23885_boards[] = {
58 [CX23885_BOARD_UNKNOWN] = {
59 .name = "UNKNOWN/GENERIC",
Steven Tothc7712612008-01-10 02:24:27 -030060 /* Ensure safe default for unknown boards */
61 .clk_freq = 0,
Steven Tothd19770e2007-03-11 20:44:05 -030062 .input = {{
63 .type = CX23885_VMUX_COMPOSITE1,
64 .vmux = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -030065 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030066 .type = CX23885_VMUX_COMPOSITE2,
67 .vmux = 1,
Steven Toth9c8ced52008-10-16 20:18:44 -030068 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030069 .type = CX23885_VMUX_COMPOSITE3,
70 .vmux = 2,
Steven Toth9c8ced52008-10-16 20:18:44 -030071 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030072 .type = CX23885_VMUX_COMPOSITE4,
73 .vmux = 3,
Steven Toth9c8ced52008-10-16 20:18:44 -030074 } },
Steven Tothd19770e2007-03-11 20:44:05 -030075 },
76 [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
77 .name = "Hauppauge WinTV-HVR1800lp",
Steven Tothd19770e2007-03-11 20:44:05 -030078 .portc = CX23885_MPEG_DVB,
79 .input = {{
80 .type = CX23885_VMUX_TELEVISION,
81 .vmux = 0,
82 .gpio0 = 0xff00,
Steven Toth9c8ced52008-10-16 20:18:44 -030083 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030084 .type = CX23885_VMUX_DEBUG,
85 .vmux = 0,
86 .gpio0 = 0xff01,
Steven Toth9c8ced52008-10-16 20:18:44 -030087 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030088 .type = CX23885_VMUX_COMPOSITE1,
89 .vmux = 1,
90 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -030091 }, {
Steven Tothd19770e2007-03-11 20:44:05 -030092 .type = CX23885_VMUX_SVIDEO,
93 .vmux = 2,
94 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -030095 } },
Steven Tothd19770e2007-03-11 20:44:05 -030096 },
97 [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
98 .name = "Hauppauge WinTV-HVR1800",
Steven Toth7b888012008-01-10 03:40:49 -030099 .porta = CX23885_ANALOG_VIDEO,
Steven Totha589b662008-01-13 23:44:47 -0300100 .portb = CX23885_MPEG_ENCODER,
Steven Tothd19770e2007-03-11 20:44:05 -0300101 .portc = CX23885_MPEG_DVB,
Steven Toth7b888012008-01-10 03:40:49 -0300102 .tuner_type = TUNER_PHILIPS_TDA8290,
103 .tuner_addr = 0x42, /* 0x84 >> 1 */
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300104 .tuner_bus = 1,
Steven Tothd19770e2007-03-11 20:44:05 -0300105 .input = {{
106 .type = CX23885_VMUX_TELEVISION,
Steven Toth7b888012008-01-10 03:40:49 -0300107 .vmux = CX25840_VIN7_CH3 |
108 CX25840_VIN5_CH2 |
109 CX25840_VIN2_CH1,
Steven Toth33cdeb32011-10-10 11:09:55 -0300110 .amux = CX25840_AUDIO8,
Steven Toth7b888012008-01-10 03:40:49 -0300111 .gpio0 = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -0300112 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300113 .type = CX23885_VMUX_COMPOSITE1,
Steven Toth7b888012008-01-10 03:40:49 -0300114 .vmux = CX25840_VIN7_CH3 |
115 CX25840_VIN4_CH2 |
116 CX25840_VIN6_CH1,
Steven Toth33cdeb32011-10-10 11:09:55 -0300117 .amux = CX25840_AUDIO7,
Steven Toth7b888012008-01-10 03:40:49 -0300118 .gpio0 = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -0300119 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300120 .type = CX23885_VMUX_SVIDEO,
Steven Toth7b888012008-01-10 03:40:49 -0300121 .vmux = CX25840_VIN7_CH3 |
122 CX25840_VIN4_CH2 |
123 CX25840_VIN8_CH1 |
124 CX25840_SVIDEO_ON,
Steven Toth33cdeb32011-10-10 11:09:55 -0300125 .amux = CX25840_AUDIO7,
Steven Toth7b888012008-01-10 03:40:49 -0300126 .gpio0 = 0,
Steven Toth9c8ced52008-10-16 20:18:44 -0300127 } },
Steven Tothd19770e2007-03-11 20:44:05 -0300128 },
Steven Totha77743b2007-08-22 21:01:20 -0300129 [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
130 .name = "Hauppauge WinTV-HVR1250",
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300131 .porta = CX23885_ANALOG_VIDEO,
Steven Totha77743b2007-08-22 21:01:20 -0300132 .portc = CX23885_MPEG_DVB,
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300133#ifdef MT2131_NO_ANALOG_SUPPORT_YET
134 .tuner_type = TUNER_PHILIPS_TDA8290,
135 .tuner_addr = 0x42, /* 0x84 >> 1 */
136 .tuner_bus = 1,
137#endif
138 .force_bff = 1,
Steven Totha77743b2007-08-22 21:01:20 -0300139 .input = {{
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300140#ifdef MT2131_NO_ANALOG_SUPPORT_YET
Steven Totha77743b2007-08-22 21:01:20 -0300141 .type = CX23885_VMUX_TELEVISION,
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300142 .vmux = CX25840_VIN7_CH3 |
143 CX25840_VIN5_CH2 |
144 CX25840_VIN2_CH1,
145 .amux = CX25840_AUDIO8,
Steven Totha77743b2007-08-22 21:01:20 -0300146 .gpio0 = 0xff00,
Steven Toth9c8ced52008-10-16 20:18:44 -0300147 }, {
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300148#endif
Steven Totha77743b2007-08-22 21:01:20 -0300149 .type = CX23885_VMUX_COMPOSITE1,
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300150 .vmux = CX25840_VIN7_CH3 |
151 CX25840_VIN4_CH2 |
152 CX25840_VIN6_CH1,
153 .amux = CX25840_AUDIO7,
Steven Totha77743b2007-08-22 21:01:20 -0300154 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -0300155 }, {
Steven Totha77743b2007-08-22 21:01:20 -0300156 .type = CX23885_VMUX_SVIDEO,
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -0300157 .vmux = CX25840_VIN7_CH3 |
158 CX25840_VIN4_CH2 |
159 CX25840_VIN8_CH1 |
160 CX25840_SVIDEO_ON,
161 .amux = CX25840_AUDIO7,
Steven Totha77743b2007-08-22 21:01:20 -0300162 .gpio0 = 0xff02,
Steven Toth9c8ced52008-10-16 20:18:44 -0300163 } },
Steven Totha77743b2007-08-22 21:01:20 -0300164 },
Michael Krufky9bc37ca2007-09-08 15:17:13 -0300165 [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
166 .name = "DViCO FusionHDTV5 Express",
Steven Totha6a3f142007-09-08 21:31:56 -0300167 .portb = CX23885_MPEG_DVB,
Michael Krufky9bc37ca2007-09-08 15:17:13 -0300168 },
Steven Tothd1987d52007-12-18 01:57:06 -0300169 [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
170 .name = "Hauppauge WinTV-HVR1500Q",
171 .portc = CX23885_MPEG_DVB,
172 },
Michael Krufky07b4a832007-12-18 01:09:11 -0300173 [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
174 .name = "Hauppauge WinTV-HVR1500",
Mijhail Moreyra18d64472011-10-10 11:09:53 -0300175 .porta = CX23885_ANALOG_VIDEO,
Michael Krufky07b4a832007-12-18 01:09:11 -0300176 .portc = CX23885_MPEG_DVB,
Mijhail Moreyra18d64472011-10-10 11:09:53 -0300177 .tuner_type = TUNER_XC2028,
178 .tuner_addr = 0x61, /* 0xc2 >> 1 */
179 .input = {{
180 .type = CX23885_VMUX_TELEVISION,
181 .vmux = CX25840_VIN7_CH3 |
182 CX25840_VIN5_CH2 |
183 CX25840_VIN2_CH1,
184 .gpio0 = 0,
185 }, {
186 .type = CX23885_VMUX_COMPOSITE1,
187 .vmux = CX25840_VIN7_CH3 |
188 CX25840_VIN4_CH2 |
189 CX25840_VIN6_CH1,
190 .gpio0 = 0,
191 }, {
192 .type = CX23885_VMUX_SVIDEO,
193 .vmux = CX25840_VIN7_CH3 |
194 CX25840_VIN4_CH2 |
195 CX25840_VIN8_CH1 |
196 CX25840_SVIDEO_ON,
197 .gpio0 = 0,
198 } },
Michael Krufky07b4a832007-12-18 01:09:11 -0300199 },
Steven Tothb3ea0162008-04-19 01:14:19 -0300200 [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
201 .name = "Hauppauge WinTV-HVR1200",
202 .portc = CX23885_MPEG_DVB,
203 },
Steven Totha780a312008-04-19 01:25:52 -0300204 [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
205 .name = "Hauppauge WinTV-HVR1700",
206 .portc = CX23885_MPEG_DVB,
207 },
Steven Toth66762372008-04-22 15:38:26 -0300208 [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
209 .name = "Hauppauge WinTV-HVR1400",
210 .portc = CX23885_MPEG_DVB,
211 },
Michael Krufky335377b2008-05-07 01:43:10 -0300212 [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
213 .name = "DViCO FusionHDTV7 Dual Express",
Steven Tothaaadeac2008-06-30 20:58:38 -0300214 .portb = CX23885_MPEG_DVB,
Michael Krufky335377b2008-05-07 01:43:10 -0300215 .portc = CX23885_MPEG_DVB,
216 },
Steven Tothaef2d182008-08-04 21:39:53 -0300217 [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
218 .name = "DViCO FusionHDTV DVB-T Dual Express",
219 .portb = CX23885_MPEG_DVB,
220 .portc = CX23885_MPEG_DVB,
221 },
Steven Toth4c56b042008-08-12 13:30:03 -0300222 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
223 .name = "Leadtek Winfast PxDVR3200 H",
224 .portc = CX23885_MPEG_DVB,
225 },
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -0300226 [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000] = {
227 .name = "Leadtek Winfast PxDVR3200 H XC4000",
228 .porta = CX23885_ANALOG_VIDEO,
229 .portc = CX23885_MPEG_DVB,
230 .tuner_type = TUNER_XC4000,
231 .tuner_addr = 0x61,
Miroslav Slugen9ee85372011-12-11 20:19:34 -0300232 .radio_type = UNSET,
233 .radio_addr = ADDR_UNSET,
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -0300234 .input = {{
235 .type = CX23885_VMUX_TELEVISION,
236 .vmux = CX25840_VIN2_CH1 |
237 CX25840_VIN5_CH2 |
238 CX25840_NONE0_CH3,
239 }, {
240 .type = CX23885_VMUX_COMPOSITE1,
241 .vmux = CX25840_COMPOSITE1,
242 }, {
243 .type = CX23885_VMUX_SVIDEO,
244 .vmux = CX25840_SVIDEO_LUMA3 |
245 CX25840_SVIDEO_CHROMA4,
246 }, {
247 .type = CX23885_VMUX_COMPONENT,
248 .vmux = CX25840_VIN7_CH1 |
249 CX25840_VIN6_CH2 |
250 CX25840_VIN8_CH3 |
251 CX25840_COMPONENT_ON,
252 } },
253 },
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -0300254 [CX23885_BOARD_COMPRO_VIDEOMATE_E650F] = {
255 .name = "Compro VideoMate E650F",
256 .portc = CX23885_MPEG_DVB,
257 },
Igor M. Liplianin96318d02009-01-17 12:11:20 -0300258 [CX23885_BOARD_TBS_6920] = {
259 .name = "TurboSight TBS 6920",
260 .portb = CX23885_MPEG_DVB,
261 },
Igor M. Liplianin579943f2009-01-17 12:18:26 -0300262 [CX23885_BOARD_TEVII_S470] = {
263 .name = "TeVii S470",
264 .portb = CX23885_MPEG_DVB,
265 },
Igor M. Liplianinc9b8b042009-01-17 12:23:31 -0300266 [CX23885_BOARD_DVBWORLD_2005] = {
267 .name = "DVBWorld DVB-S2 2005",
268 .portb = CX23885_MPEG_DVB,
269 },
Igor M. Liplianin5a23b072009-03-03 12:06:09 -0300270 [CX23885_BOARD_NETUP_DUAL_DVBS2_CI] = {
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300271 .ci_type = 1,
Igor M. Liplianin5a23b072009-03-03 12:06:09 -0300272 .name = "NetUP Dual DVB-S2 CI",
273 .portb = CX23885_MPEG_DVB,
274 .portc = CX23885_MPEG_DVB,
275 },
Steven Toth2074dff2009-05-02 11:39:46 -0300276 [CX23885_BOARD_HAUPPAUGE_HVR1270] = {
277 .name = "Hauppauge WinTV-HVR1270",
Michael Krufkya5dbf452009-05-03 23:27:02 -0300278 .portc = CX23885_MPEG_DVB,
Steven Toth2074dff2009-05-02 11:39:46 -0300279 },
Michael Krufkyd099bec2009-05-08 22:39:24 -0300280 [CX23885_BOARD_HAUPPAUGE_HVR1275] = {
281 .name = "Hauppauge WinTV-HVR1275",
282 .portc = CX23885_MPEG_DVB,
283 },
Michael Krufky19bc5792009-05-08 16:05:29 -0300284 [CX23885_BOARD_HAUPPAUGE_HVR1255] = {
285 .name = "Hauppauge WinTV-HVR1255",
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -0300286 .porta = CX23885_ANALOG_VIDEO,
Michael Krufky19bc5792009-05-08 16:05:29 -0300287 .portc = CX23885_MPEG_DVB,
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -0300288 .tuner_type = TUNER_ABSENT,
289 .tuner_addr = 0x42, /* 0x84 >> 1 */
290 .force_bff = 1,
291 .input = {{
292 .type = CX23885_VMUX_TELEVISION,
293 .vmux = CX25840_VIN7_CH3 |
294 CX25840_VIN5_CH2 |
295 CX25840_VIN2_CH1 |
296 CX25840_DIF_ON,
297 .amux = CX25840_AUDIO8,
298 }, {
299 .type = CX23885_VMUX_COMPOSITE1,
300 .vmux = CX25840_VIN7_CH3 |
301 CX25840_VIN4_CH2 |
302 CX25840_VIN6_CH1,
303 .amux = CX25840_AUDIO7,
304 }, {
305 .type = CX23885_VMUX_SVIDEO,
306 .vmux = CX25840_VIN7_CH3 |
307 CX25840_VIN4_CH2 |
308 CX25840_VIN8_CH1 |
309 CX25840_SVIDEO_ON,
310 .amux = CX25840_AUDIO7,
311 } },
312 },
313 [CX23885_BOARD_HAUPPAUGE_HVR1255_22111] = {
314 .name = "Hauppauge WinTV-HVR1255",
315 .porta = CX23885_ANALOG_VIDEO,
316 .portc = CX23885_MPEG_DVB,
317 .tuner_type = TUNER_ABSENT,
318 .tuner_addr = 0x42, /* 0x84 >> 1 */
319 .force_bff = 1,
320 .input = {{
321 .type = CX23885_VMUX_TELEVISION,
322 .vmux = CX25840_VIN7_CH3 |
323 CX25840_VIN5_CH2 |
324 CX25840_VIN2_CH1 |
325 CX25840_DIF_ON,
326 .amux = CX25840_AUDIO8,
327 }, {
328 .type = CX23885_VMUX_SVIDEO,
329 .vmux = CX25840_VIN7_CH3 |
330 CX25840_VIN4_CH2 |
331 CX25840_VIN8_CH1 |
332 CX25840_SVIDEO_ON,
333 .amux = CX25840_AUDIO7,
334 } },
Michael Krufky19bc5792009-05-08 16:05:29 -0300335 },
Michael Krufky6b926ec2009-05-12 17:32:17 -0300336 [CX23885_BOARD_HAUPPAUGE_HVR1210] = {
337 .name = "Hauppauge WinTV-HVR1210",
338 .portc = CX23885_MPEG_DVB,
339 },
David Wong493b7122009-05-18 05:25:49 -0300340 [CX23885_BOARD_MYGICA_X8506] = {
341 .name = "Mygica X8506 DMB-TH",
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300342 .tuner_type = TUNER_XC5000,
343 .tuner_addr = 0x61,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300344 .tuner_bus = 1,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300345 .porta = CX23885_ANALOG_VIDEO,
David Wong493b7122009-05-18 05:25:49 -0300346 .portb = CX23885_MPEG_DVB,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300347 .input = {
348 {
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300349 .type = CX23885_VMUX_TELEVISION,
350 .vmux = CX25840_COMPOSITE2,
351 },
352 {
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300353 .type = CX23885_VMUX_COMPOSITE1,
354 .vmux = CX25840_COMPOSITE8,
355 },
356 {
357 .type = CX23885_VMUX_SVIDEO,
358 .vmux = CX25840_SVIDEO_LUMA3 |
359 CX25840_SVIDEO_CHROMA4,
360 },
361 {
362 .type = CX23885_VMUX_COMPONENT,
363 .vmux = CX25840_COMPONENT_ON |
364 CX25840_VIN1_CH1 |
365 CX25840_VIN6_CH2 |
366 CX25840_VIN7_CH3,
367 },
368 },
David Wong493b7122009-05-18 05:25:49 -0300369 },
David Wong2365b2d2009-06-17 01:38:12 -0300370 [CX23885_BOARD_MAGICPRO_PROHDTVE2] = {
371 .name = "Magic-Pro ProHDTV Extreme 2",
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300372 .tuner_type = TUNER_XC5000,
373 .tuner_addr = 0x61,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300374 .tuner_bus = 1,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300375 .porta = CX23885_ANALOG_VIDEO,
David Wong2365b2d2009-06-17 01:38:12 -0300376 .portb = CX23885_MPEG_DVB,
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300377 .input = {
378 {
David T.L. Wong6f0d8c02009-10-21 13:15:30 -0300379 .type = CX23885_VMUX_TELEVISION,
380 .vmux = CX25840_COMPOSITE2,
381 },
382 {
David T.L. Wongbc1548a2009-10-21 11:09:28 -0300383 .type = CX23885_VMUX_COMPOSITE1,
384 .vmux = CX25840_COMPOSITE8,
385 },
386 {
387 .type = CX23885_VMUX_SVIDEO,
388 .vmux = CX25840_SVIDEO_LUMA3 |
389 CX25840_SVIDEO_CHROMA4,
390 },
391 {
392 .type = CX23885_VMUX_COMPONENT,
393 .vmux = CX25840_COMPONENT_ON |
394 CX25840_VIN1_CH1 |
395 CX25840_VIN6_CH2 |
396 CX25840_VIN7_CH3,
397 },
398 },
David Wong2365b2d2009-06-17 01:38:12 -0300399 },
Steven Toth136973802009-07-20 15:37:25 -0300400 [CX23885_BOARD_HAUPPAUGE_HVR1850] = {
401 .name = "Hauppauge WinTV-HVR1850",
Steven Toth35045132012-01-04 21:08:35 -0300402 .porta = CX23885_ANALOG_VIDEO,
Steven Toth136973802009-07-20 15:37:25 -0300403 .portb = CX23885_MPEG_ENCODER,
404 .portc = CX23885_MPEG_DVB,
Steven Toth35045132012-01-04 21:08:35 -0300405 .tuner_type = TUNER_ABSENT,
406 .tuner_addr = 0x42, /* 0x84 >> 1 */
407 .force_bff = 1,
408 .input = {{
409 .type = CX23885_VMUX_TELEVISION,
410 .vmux = CX25840_VIN7_CH3 |
411 CX25840_VIN5_CH2 |
412 CX25840_VIN2_CH1 |
413 CX25840_DIF_ON,
414 .amux = CX25840_AUDIO8,
415 }, {
416 .type = CX23885_VMUX_COMPOSITE1,
417 .vmux = CX25840_VIN7_CH3 |
418 CX25840_VIN4_CH2 |
419 CX25840_VIN6_CH1,
420 .amux = CX25840_AUDIO7,
421 }, {
422 .type = CX23885_VMUX_SVIDEO,
423 .vmux = CX25840_VIN7_CH3 |
424 CX25840_VIN4_CH2 |
425 CX25840_VIN8_CH1 |
426 CX25840_SVIDEO_ON,
427 .amux = CX25840_AUDIO7,
428 } },
Steven Toth136973802009-07-20 15:37:25 -0300429 },
Vladimir Geroy34e383d2009-09-18 18:55:47 -0300430 [CX23885_BOARD_COMPRO_VIDEOMATE_E800] = {
431 .name = "Compro VideoMate E800",
432 .portc = CX23885_MPEG_DVB,
433 },
Michael Krufkyaee0b242009-11-11 01:52:45 -0300434 [CX23885_BOARD_HAUPPAUGE_HVR1290] = {
435 .name = "Hauppauge WinTV-HVR1290",
436 .portc = CX23885_MPEG_DVB,
437 },
David T. L. Wongea5697f2009-10-26 08:54:04 -0300438 [CX23885_BOARD_MYGICA_X8558PRO] = {
439 .name = "Mygica X8558 PRO DMB-TH",
440 .portb = CX23885_MPEG_DVB,
441 .portc = CX23885_MPEG_DVB,
442 },
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300443 [CX23885_BOARD_LEADTEK_WINFAST_PXTV1200] = {
444 .name = "LEADTEK WinFast PxTV1200",
445 .porta = CX23885_ANALOG_VIDEO,
446 .tuner_type = TUNER_XC2028,
447 .tuner_addr = 0x61,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300448 .tuner_bus = 1,
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300449 .input = {{
450 .type = CX23885_VMUX_TELEVISION,
451 .vmux = CX25840_VIN2_CH1 |
452 CX25840_VIN5_CH2 |
453 CX25840_NONE0_CH3,
454 }, {
455 .type = CX23885_VMUX_COMPOSITE1,
456 .vmux = CX25840_COMPOSITE1,
457 }, {
458 .type = CX23885_VMUX_SVIDEO,
459 .vmux = CX25840_SVIDEO_LUMA3 |
460 CX25840_SVIDEO_CHROMA4,
461 }, {
462 .type = CX23885_VMUX_COMPONENT,
463 .vmux = CX25840_VIN7_CH1 |
464 CX25840_VIN6_CH2 |
465 CX25840_VIN8_CH3 |
466 CX25840_COMPONENT_ON,
467 } },
468 },
Alexey Chernov9028f582010-12-06 17:09:53 -0300469 [CX23885_BOARD_GOTVIEW_X5_3D_HYBRID] = {
470 .name = "GoTView X5 3D Hybrid",
471 .tuner_type = TUNER_XC5000,
472 .tuner_addr = 0x64,
Igor M. Liplianin557f48d2011-01-25 17:05:00 -0300473 .tuner_bus = 1,
Alexey Chernov9028f582010-12-06 17:09:53 -0300474 .porta = CX23885_ANALOG_VIDEO,
475 .portb = CX23885_MPEG_DVB,
476 .input = {{
477 .type = CX23885_VMUX_TELEVISION,
478 .vmux = CX25840_VIN2_CH1 |
479 CX25840_VIN5_CH2,
480 .gpio0 = 0x02,
481 }, {
482 .type = CX23885_VMUX_COMPOSITE1,
483 .vmux = CX23885_VMUX_COMPOSITE1,
484 }, {
485 .type = CX23885_VMUX_SVIDEO,
486 .vmux = CX25840_SVIDEO_LUMA3 |
487 CX25840_SVIDEO_CHROMA4,
488 } },
489 },
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300490 [CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF] = {
491 .ci_type = 2,
492 .name = "NetUP Dual DVB-T/C-CI RF",
493 .porta = CX23885_ANALOG_VIDEO,
494 .portb = CX23885_MPEG_DVB,
495 .portc = CX23885_MPEG_DVB,
Igor M. Liplianin10d0dcd2011-01-25 17:06:00 -0300496 .num_fds_portb = 2,
497 .num_fds_portc = 2,
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300498 .tuner_type = TUNER_XC5000,
499 .tuner_addr = 0x64,
500 .input = { {
501 .type = CX23885_VMUX_TELEVISION,
502 .vmux = CX25840_COMPOSITE1,
503 } },
504 },
Steven Toth2cb9ccd2011-10-10 11:09:55 -0300505 [CX23885_BOARD_MPX885] = {
506 .name = "MPX-885",
507 .porta = CX23885_ANALOG_VIDEO,
508 .input = {{
509 .type = CX23885_VMUX_COMPOSITE1,
510 .vmux = CX25840_COMPOSITE1,
511 .amux = CX25840_AUDIO6,
512 .gpio0 = 0,
513 }, {
514 .type = CX23885_VMUX_COMPOSITE2,
515 .vmux = CX25840_COMPOSITE2,
516 .amux = CX25840_AUDIO6,
517 .gpio0 = 0,
518 }, {
519 .type = CX23885_VMUX_COMPOSITE3,
520 .vmux = CX25840_COMPOSITE3,
521 .amux = CX25840_AUDIO7,
522 .gpio0 = 0,
523 }, {
524 .type = CX23885_VMUX_COMPOSITE4,
525 .vmux = CX25840_COMPOSITE4,
526 .amux = CX25840_AUDIO7,
527 .gpio0 = 0,
528 } },
529 },
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300530 [CX23885_BOARD_MYGICA_X8507] = {
531 .name = "Mygica X8507",
532 .tuner_type = TUNER_XC5000,
533 .tuner_addr = 0x61,
534 .tuner_bus = 1,
535 .porta = CX23885_ANALOG_VIDEO,
536 .input = {
537 {
538 .type = CX23885_VMUX_TELEVISION,
539 .vmux = CX25840_COMPOSITE2,
540 .amux = CX25840_AUDIO8,
541 },
542 {
543 .type = CX23885_VMUX_COMPOSITE1,
544 .vmux = CX25840_COMPOSITE8,
Alfredo Jesús Delaiti082c0572012-09-21 10:33:51 -0300545 .amux = CX25840_AUDIO7,
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300546 },
547 {
548 .type = CX23885_VMUX_SVIDEO,
549 .vmux = CX25840_SVIDEO_LUMA3 |
550 CX25840_SVIDEO_CHROMA4,
Alfredo Jesús Delaiti082c0572012-09-21 10:33:51 -0300551 .amux = CX25840_AUDIO7,
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300552 },
553 {
554 .type = CX23885_VMUX_COMPONENT,
555 .vmux = CX25840_COMPONENT_ON |
556 CX25840_VIN1_CH1 |
557 CX25840_VIN6_CH2 |
558 CX25840_VIN7_CH3,
Alfredo Jesús Delaiti082c0572012-09-21 10:33:51 -0300559 .amux = CX25840_AUDIO7,
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300560 },
561 },
Stefan Ringel722c90e2012-01-07 09:20:48 -0300562 },
563 [CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL] = {
564 .name = "TerraTec Cinergy T PCIe Dual",
565 .portb = CX23885_MPEG_DVB,
566 .portc = CX23885_MPEG_DVB,
Igor M. Liplianin7b134e82012-05-11 11:45:42 -0300567 },
568 [CX23885_BOARD_TEVII_S471] = {
569 .name = "TeVii S471",
570 .portb = CX23885_MPEG_DVB,
Mariusz Bia?o?czykf6671902012-09-12 07:59:18 -0300571 },
572 [CX23885_BOARD_PROF_8000] = {
573 .name = "Prof Revolution DVB-S2 8000",
574 .portb = CX23885_MPEG_DVB,
Michael Krufky7c62f5a2012-12-15 23:34:09 -0300575 },
576 [CX23885_BOARD_HAUPPAUGE_HVR4400] = {
577 .name = "Hauppauge WinTV-HVR4400",
578 .portb = CX23885_MPEG_DVB,
579 },
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -0300580 [CX23885_BOARD_AVERMEDIA_HC81R] = {
581 .name = "AVerTV Hybrid Express Slim HC81R",
582 .tuner_type = TUNER_XC2028,
583 .tuner_addr = 0x61, /* 0xc2 >> 1 */
584 .tuner_bus = 1,
585 .porta = CX23885_ANALOG_VIDEO,
586 .input = {{
587 .type = CX23885_VMUX_TELEVISION,
588 .vmux = CX25840_VIN2_CH1 |
589 CX25840_VIN5_CH2 |
590 CX25840_NONE0_CH3 |
591 CX25840_NONE1_CH3,
592 .amux = CX25840_AUDIO8,
593 }, {
594 .type = CX23885_VMUX_SVIDEO,
595 .vmux = CX25840_VIN8_CH1 |
596 CX25840_NONE_CH2 |
597 CX25840_VIN7_CH3 |
598 CX25840_SVIDEO_ON,
599 .amux = CX25840_AUDIO6,
600 }, {
601 .type = CX23885_VMUX_COMPONENT,
602 .vmux = CX25840_VIN1_CH1 |
603 CX25840_NONE_CH2 |
604 CX25840_NONE0_CH3 |
605 CX25840_NONE1_CH3,
606 .amux = CX25840_AUDIO6,
607 } },
608 }
Steven Tothd19770e2007-03-11 20:44:05 -0300609};
610const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
611
612/* ------------------------------------------------------------------ */
613/* PCI subsystem IDs */
614
615struct cx23885_subid cx23885_subids[] = {
616 {
617 .subvendor = 0x0070,
618 .subdevice = 0x3400,
619 .card = CX23885_BOARD_UNKNOWN,
Steven Toth9c8ced52008-10-16 20:18:44 -0300620 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300621 .subvendor = 0x0070,
622 .subdevice = 0x7600,
623 .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
Steven Toth9c8ced52008-10-16 20:18:44 -0300624 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300625 .subvendor = 0x0070,
626 .subdevice = 0x7800,
627 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
Steven Toth9c8ced52008-10-16 20:18:44 -0300628 }, {
Steven Tothd19770e2007-03-11 20:44:05 -0300629 .subvendor = 0x0070,
630 .subdevice = 0x7801,
631 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
Steven Toth9c8ced52008-10-16 20:18:44 -0300632 }, {
Steven Totha77743b2007-08-22 21:01:20 -0300633 .subvendor = 0x0070,
Michael Krufky6ccb8cf2007-12-27 21:46:34 -0300634 .subdevice = 0x7809,
635 .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
Steven Toth9c8ced52008-10-16 20:18:44 -0300636 }, {
Michael Krufky6ccb8cf2007-12-27 21:46:34 -0300637 .subvendor = 0x0070,
Steven Totha77743b2007-08-22 21:01:20 -0300638 .subdevice = 0x7911,
639 .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
Steven Toth9c8ced52008-10-16 20:18:44 -0300640 }, {
Michael Krufky9bc37ca2007-09-08 15:17:13 -0300641 .subvendor = 0x18ac,
642 .subdevice = 0xd500,
643 .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
Steven Toth9c8ced52008-10-16 20:18:44 -0300644 }, {
Steven Tothd1987d52007-12-18 01:57:06 -0300645 .subvendor = 0x0070,
Michael Krufkyb00fff02007-12-27 22:19:31 -0300646 .subdevice = 0x7790,
647 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
Steven Toth9c8ced52008-10-16 20:18:44 -0300648 }, {
Michael Krufkyb00fff02007-12-27 22:19:31 -0300649 .subvendor = 0x0070,
Steven Tothd1987d52007-12-18 01:57:06 -0300650 .subdevice = 0x7797,
651 .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
Steven Toth9c8ced52008-10-16 20:18:44 -0300652 }, {
Michael Krufky07b4a832007-12-18 01:09:11 -0300653 .subvendor = 0x0070,
Michael Krufkyb00fff02007-12-27 22:19:31 -0300654 .subdevice = 0x7710,
655 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
Steven Toth9c8ced52008-10-16 20:18:44 -0300656 }, {
Michael Krufkyb00fff02007-12-27 22:19:31 -0300657 .subvendor = 0x0070,
Michael Krufky07b4a832007-12-18 01:09:11 -0300658 .subdevice = 0x7717,
659 .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
Steven Tothb3ea0162008-04-19 01:14:19 -0300660 }, {
661 .subvendor = 0x0070,
662 .subdevice = 0x71d1,
663 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
Steven Totha780a312008-04-19 01:25:52 -0300664 }, {
665 .subvendor = 0x0070,
Michael Krufky3c3852c2008-05-02 16:12:44 -0300666 .subdevice = 0x71d3,
667 .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
668 }, {
669 .subvendor = 0x0070,
Steven Totha780a312008-04-19 01:25:52 -0300670 .subdevice = 0x8101,
671 .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
Steven Toth66762372008-04-22 15:38:26 -0300672 }, {
673 .subvendor = 0x0070,
674 .subdevice = 0x8010,
675 .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
Steven Toth9c8ced52008-10-16 20:18:44 -0300676 }, {
Michael Krufky335377b2008-05-07 01:43:10 -0300677 .subvendor = 0x18ac,
678 .subdevice = 0xd618,
679 .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
Steven Toth9c8ced52008-10-16 20:18:44 -0300680 }, {
Steven Tothaef2d182008-08-04 21:39:53 -0300681 .subvendor = 0x18ac,
682 .subdevice = 0xdb78,
683 .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
Steven Toth4c56b042008-08-12 13:30:03 -0300684 }, {
685 .subvendor = 0x107d,
686 .subdevice = 0x6681,
687 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -0300688 }, {
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -0300689 .subvendor = 0x107d,
690 .subdevice = 0x6f39,
691 .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000,
692 }, {
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -0300693 .subvendor = 0x185b,
694 .subdevice = 0xe800,
695 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E650F,
Igor M. Liplianin96318d02009-01-17 12:11:20 -0300696 }, {
697 .subvendor = 0x6920,
698 .subdevice = 0x8888,
699 .card = CX23885_BOARD_TBS_6920,
Igor M. Liplianin579943f2009-01-17 12:18:26 -0300700 }, {
701 .subvendor = 0xd470,
702 .subdevice = 0x9022,
703 .card = CX23885_BOARD_TEVII_S470,
Igor M. Liplianinc9b8b042009-01-17 12:23:31 -0300704 }, {
705 .subvendor = 0x0001,
706 .subdevice = 0x2005,
707 .card = CX23885_BOARD_DVBWORLD_2005,
Igor M. Liplianin5a23b072009-03-03 12:06:09 -0300708 }, {
709 .subvendor = 0x1b55,
710 .subdevice = 0x2a2c,
711 .card = CX23885_BOARD_NETUP_DUAL_DVBS2_CI,
Steven Toth2074dff2009-05-02 11:39:46 -0300712 }, {
713 .subvendor = 0x0070,
714 .subdevice = 0x2211,
715 .card = CX23885_BOARD_HAUPPAUGE_HVR1270,
Michael Krufkyd099bec2009-05-08 22:39:24 -0300716 }, {
717 .subvendor = 0x0070,
718 .subdevice = 0x2215,
719 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
Michael Krufky19bc5792009-05-08 16:05:29 -0300720 }, {
721 .subvendor = 0x0070,
Michael Krufky7d7b5282010-06-30 18:17:35 -0300722 .subdevice = 0x221d,
723 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
724 }, {
725 .subvendor = 0x0070,
Michael Krufky19bc5792009-05-08 16:05:29 -0300726 .subdevice = 0x2251,
727 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
Michael Krufky6b926ec2009-05-12 17:32:17 -0300728 }, {
729 .subvendor = 0x0070,
Michael Krufky7d7b5282010-06-30 18:17:35 -0300730 .subdevice = 0x2259,
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -0300731 .card = CX23885_BOARD_HAUPPAUGE_HVR1255_22111,
Michael Krufky7d7b5282010-06-30 18:17:35 -0300732 }, {
733 .subvendor = 0x0070,
Michael Krufky6b926ec2009-05-12 17:32:17 -0300734 .subdevice = 0x2291,
735 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
736 }, {
737 .subvendor = 0x0070,
738 .subdevice = 0x2295,
739 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
David Wong493b7122009-05-18 05:25:49 -0300740 }, {
Michael Krufky7d7b5282010-06-30 18:17:35 -0300741 .subvendor = 0x0070,
742 .subdevice = 0x2299,
743 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
744 }, {
745 .subvendor = 0x0070,
746 .subdevice = 0x229d,
747 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
748 }, {
749 .subvendor = 0x0070,
750 .subdevice = 0x22f0,
751 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
752 }, {
753 .subvendor = 0x0070,
754 .subdevice = 0x22f1,
755 .card = CX23885_BOARD_HAUPPAUGE_HVR1255,
756 }, {
757 .subvendor = 0x0070,
758 .subdevice = 0x22f2,
759 .card = CX23885_BOARD_HAUPPAUGE_HVR1275,
760 }, {
761 .subvendor = 0x0070,
762 .subdevice = 0x22f3,
763 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
764 }, {
765 .subvendor = 0x0070,
766 .subdevice = 0x22f4,
767 .card = CX23885_BOARD_HAUPPAUGE_HVR1210,
768 }, {
769 .subvendor = 0x0070,
770 .subdevice = 0x22f5,
771 .card = CX23885_BOARD_HAUPPAUGE_HVR1210, /* HVR1215 */
772 }, {
David Wong493b7122009-05-18 05:25:49 -0300773 .subvendor = 0x14f1,
774 .subdevice = 0x8651,
775 .card = CX23885_BOARD_MYGICA_X8506,
David Wong2365b2d2009-06-17 01:38:12 -0300776 }, {
777 .subvendor = 0x14f1,
778 .subdevice = 0x8657,
779 .card = CX23885_BOARD_MAGICPRO_PROHDTVE2,
Steven Toth136973802009-07-20 15:37:25 -0300780 }, {
781 .subvendor = 0x0070,
782 .subdevice = 0x8541,
783 .card = CX23885_BOARD_HAUPPAUGE_HVR1850,
Vladimir Geroy34e383d2009-09-18 18:55:47 -0300784 }, {
785 .subvendor = 0x1858,
786 .subdevice = 0xe800,
787 .card = CX23885_BOARD_COMPRO_VIDEOMATE_E800,
Michael Krufkyaee0b242009-11-11 01:52:45 -0300788 }, {
789 .subvendor = 0x0070,
790 .subdevice = 0x8551,
791 .card = CX23885_BOARD_HAUPPAUGE_HVR1290,
David T. L. Wongea5697f2009-10-26 08:54:04 -0300792 }, {
793 .subvendor = 0x14f1,
794 .subdevice = 0x8578,
795 .card = CX23885_BOARD_MYGICA_X8558PRO,
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -0300796 }, {
797 .subvendor = 0x107d,
798 .subdevice = 0x6f22,
799 .card = CX23885_BOARD_LEADTEK_WINFAST_PXTV1200,
Alexey Chernov9028f582010-12-06 17:09:53 -0300800 }, {
801 .subvendor = 0x5654,
802 .subdevice = 0x2390,
803 .card = CX23885_BOARD_GOTVIEW_X5_3D_HYBRID,
Igor M. Liplianin78db8542011-01-25 17:04:00 -0300804 }, {
805 .subvendor = 0x1b55,
806 .subdevice = 0xe2e4,
807 .card = CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF,
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -0300808 }, {
809 .subvendor = 0x14f1,
810 .subdevice = 0x8502,
811 .card = CX23885_BOARD_MYGICA_X8507,
Stefan Ringel722c90e2012-01-07 09:20:48 -0300812 }, {
813 .subvendor = 0x153b,
814 .subdevice = 0x117e,
815 .card = CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL,
Igor M. Liplianin7b134e82012-05-11 11:45:42 -0300816 }, {
817 .subvendor = 0xd471,
818 .subdevice = 0x9022,
819 .card = CX23885_BOARD_TEVII_S471,
Mariusz Bia?o?czykf6671902012-09-12 07:59:18 -0300820 }, {
821 .subvendor = 0x8000,
822 .subdevice = 0x3034,
823 .card = CX23885_BOARD_PROF_8000,
Michael Krufky7c62f5a2012-12-15 23:34:09 -0300824 }, {
825 .subvendor = 0x0070,
826 .subdevice = 0xc108,
827 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
828 }, {
829 .subvendor = 0x0070,
830 .subdevice = 0xc138,
831 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
832 }, {
833 .subvendor = 0x0070,
834 .subdevice = 0xc12a,
835 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
836 }, {
837 .subvendor = 0x0070,
838 .subdevice = 0xc1f8,
839 .card = CX23885_BOARD_HAUPPAUGE_HVR4400,
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -0300840 }, {
841 .subvendor = 0x1461,
842 .subdevice = 0xd939,
843 .card = CX23885_BOARD_AVERMEDIA_HC81R,
Steven Tothd19770e2007-03-11 20:44:05 -0300844 },
845};
846const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
847
848void cx23885_card_list(struct cx23885_dev *dev)
849{
850 int i;
851
852 if (0 == dev->pci->subsystem_vendor &&
853 0 == dev->pci->subsystem_device) {
Steven Toth9c8ced52008-10-16 20:18:44 -0300854 printk(KERN_INFO
855 "%s: Board has no valid PCIe Subsystem ID and can't\n"
856 "%s: be autodetected. Pass card=<n> insmod option\n"
857 "%s: to workaround that. Redirect complaints to the\n"
858 "%s: vendor of the TV card. Best regards,\n"
Steven Tothd19770e2007-03-11 20:44:05 -0300859 "%s: -- tux\n",
860 dev->name, dev->name, dev->name, dev->name, dev->name);
861 } else {
Steven Toth9c8ced52008-10-16 20:18:44 -0300862 printk(KERN_INFO
863 "%s: Your board isn't known (yet) to the driver.\n"
864 "%s: Try to pick one of the existing card configs via\n"
Steven Tothd19770e2007-03-11 20:44:05 -0300865 "%s: card=<n> insmod option. Updating to the latest\n"
866 "%s: version might help as well.\n",
867 dev->name, dev->name, dev->name, dev->name);
868 }
Steven Toth9c8ced52008-10-16 20:18:44 -0300869 printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
Steven Tothd19770e2007-03-11 20:44:05 -0300870 dev->name);
871 for (i = 0; i < cx23885_bcount; i++)
Steven Toth9c8ced52008-10-16 20:18:44 -0300872 printk(KERN_INFO "%s: card=%d -> %s\n",
Steven Tothd19770e2007-03-11 20:44:05 -0300873 dev->name, i, cx23885_boards[i].name);
874}
875
876static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
877{
878 struct tveeprom tv;
879
Steven Toth9c8ced52008-10-16 20:18:44 -0300880 tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
881 eeprom_data);
Steven Tothd19770e2007-03-11 20:44:05 -0300882
Steven Tothd19770e2007-03-11 20:44:05 -0300883 /* Make sure we support the board model */
Steven Toth9c8ced52008-10-16 20:18:44 -0300884 switch (tv.model) {
Michael Krufky5308cf02009-05-12 18:37:35 -0300885 case 22001:
886 /* WinTV-HVR1270 (PCIe, Retail, half height)
887 * ATSC/QAM and basic analog, IR Blast */
888 case 22009:
889 /* WinTV-HVR1210 (PCIe, Retail, half height)
890 * DVB-T and basic analog, IR Blast */
891 case 22011:
892 /* WinTV-HVR1270 (PCIe, Retail, half height)
893 * ATSC/QAM and basic analog, IR Recv */
894 case 22019:
895 /* WinTV-HVR1210 (PCIe, Retail, half height)
896 * DVB-T and basic analog, IR Recv */
897 case 22021:
898 /* WinTV-HVR1275 (PCIe, Retail, half height)
899 * ATSC/QAM and basic analog, IR Recv */
900 case 22029:
901 /* WinTV-HVR1210 (PCIe, Retail, half height)
902 * DVB-T and basic analog, IR Recv */
903 case 22101:
904 /* WinTV-HVR1270 (PCIe, Retail, full height)
905 * ATSC/QAM and basic analog, IR Blast */
906 case 22109:
907 /* WinTV-HVR1210 (PCIe, Retail, full height)
908 * DVB-T and basic analog, IR Blast */
909 case 22111:
910 /* WinTV-HVR1270 (PCIe, Retail, full height)
911 * ATSC/QAM and basic analog, IR Recv */
912 case 22119:
913 /* WinTV-HVR1210 (PCIe, Retail, full height)
914 * DVB-T and basic analog, IR Recv */
915 case 22121:
916 /* WinTV-HVR1275 (PCIe, Retail, full height)
917 * ATSC/QAM and basic analog, IR Recv */
918 case 22129:
919 /* WinTV-HVR1210 (PCIe, Retail, full height)
920 * DVB-T and basic analog, IR Recv */
Michael Krufky36396c82008-05-02 16:14:33 -0300921 case 71009:
922 /* WinTV-HVR1200 (PCIe, Retail, full height)
923 * DVB-T and basic analog */
924 case 71359:
925 /* WinTV-HVR1200 (PCIe, OEM, half height)
926 * DVB-T and basic analog */
927 case 71439:
928 /* WinTV-HVR1200 (PCIe, OEM, half height)
929 * DVB-T and basic analog */
930 case 71449:
931 /* WinTV-HVR1200 (PCIe, OEM, full height)
932 * DVB-T and basic analog */
933 case 71939:
934 /* WinTV-HVR1200 (PCIe, OEM, half height)
935 * DVB-T and basic analog */
936 case 71949:
937 /* WinTV-HVR1200 (PCIe, OEM, full height)
938 * DVB-T and basic analog */
939 case 71959:
940 /* WinTV-HVR1200 (PCIe, OEM, full height)
941 * DVB-T and basic analog */
942 case 71979:
943 /* WinTV-HVR1200 (PCIe, OEM, half height)
944 * DVB-T and basic analog */
945 case 71999:
946 /* WinTV-HVR1200 (PCIe, OEM, full height)
947 * DVB-T and basic analog */
Steven Toth9c8ced52008-10-16 20:18:44 -0300948 case 76601:
949 /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
950 channel ATSC and MPEG2 HW Encoder */
951 case 77001:
952 /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
953 and Basic analog */
954 case 77011:
955 /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
956 and Basic analog */
957 case 77041:
958 /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
959 and Basic analog */
960 case 77051:
961 /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
962 and Basic analog */
963 case 78011:
964 /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
965 Dual channel ATSC and MPEG2 HW Encoder */
966 case 78501:
967 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
968 Dual channel ATSC and MPEG2 HW Encoder */
969 case 78521:
970 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
971 Dual channel ATSC and MPEG2 HW Encoder */
972 case 78531:
973 /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
974 Dual channel ATSC and MPEG2 HW Encoder */
975 case 78631:
976 /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
977 Dual channel ATSC and MPEG2 HW Encoder */
978 case 79001:
979 /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
980 ATSC and Basic analog */
981 case 79101:
982 /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
983 ATSC and Basic analog */
Andy Wallsebbeb462010-07-18 17:35:00 -0300984 case 79501:
985 /* WinTV-HVR1250 (PCIe, No IR, half height,
986 ATSC [at least] and Basic analog) */
Steven Toth9c8ced52008-10-16 20:18:44 -0300987 case 79561:
988 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
989 ATSC and Basic analog */
990 case 79571:
991 /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
992 ATSC and Basic analog */
993 case 79671:
994 /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
995 ATSC and Basic analog */
Steven Toth66762372008-04-22 15:38:26 -0300996 case 80019:
997 /* WinTV-HVR1400 (Express Card, Retail, IR,
998 * DVB-T and Basic analog */
Michael Krufky36396c82008-05-02 16:14:33 -0300999 case 81509:
1000 /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
1001 * DVB-T and MPEG2 HW Encoder */
Steven Totha780a312008-04-19 01:25:52 -03001002 case 81519:
Michael Krufky36396c82008-05-02 16:14:33 -03001003 /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
Steven Totha780a312008-04-19 01:25:52 -03001004 * DVB-T and MPEG2 HW Encoder */
Steven Tothd19770e2007-03-11 20:44:05 -03001005 break;
Steven Toth136973802009-07-20 15:37:25 -03001006 case 85021:
Michael Krufky73a5f412009-11-11 10:46:40 -03001007 /* WinTV-HVR1850 (PCIe, Retail, 3.5mm in, IR, FM,
Steven Toth136973802009-07-20 15:37:25 -03001008 Dual channel ATSC and MPEG2 HW Encoder */
1009 break;
Michael Krufky73a5f412009-11-11 10:46:40 -03001010 case 85721:
1011 /* WinTV-HVR1290 (PCIe, OEM, RCA in, IR,
1012 Dual channel ATSC and Basic analog */
1013 break;
Steven Tothd19770e2007-03-11 20:44:05 -03001014 default:
Steven Toth136973802009-07-20 15:37:25 -03001015 printk(KERN_WARNING "%s: warning: "
1016 "unknown hauppauge model #%d\n",
Steven Toth9c8ced52008-10-16 20:18:44 -03001017 dev->name, tv.model);
Steven Tothd19770e2007-03-11 20:44:05 -03001018 break;
1019 }
1020
1021 printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
1022 dev->name, tv.model);
1023}
1024
Michael Krufkyd7cba042008-09-12 13:31:45 -03001025int cx23885_tuner_callback(void *priv, int component, int command, int arg)
Steven Toth8c700172008-01-05 16:55:45 -03001026{
Steven Toth89ce2212008-08-04 22:18:19 -03001027 struct cx23885_tsport *port = priv;
1028 struct cx23885_dev *dev = port->dev;
Steven Toth6df51692008-06-30 22:17:05 -03001029 u32 bitmask = 0;
1030
Anton Blanchardc6cff162012-07-01 21:38:03 -03001031 if ((command == XC2028_RESET_CLK) || (command == XC2028_I2C_FLUSH))
Steven Toth89ce2212008-08-04 22:18:19 -03001032 return 0;
1033
Steven Toth6df51692008-06-30 22:17:05 -03001034 if (command != 0) {
1035 printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
1036 __func__, command);
1037 return -EINVAL;
1038 }
Steven Toth8c700172008-01-05 16:55:45 -03001039
Steven Toth9c8ced52008-10-16 20:18:44 -03001040 switch (dev->board) {
Steven Toth90a71b12008-08-04 21:38:46 -03001041 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1042 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Toth8c700172008-01-05 16:55:45 -03001043 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Toth4c56b042008-08-12 13:30:03 -03001044 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -03001045 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -03001046 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Vladimir Geroy34e383d2009-09-18 18:55:47 -03001047 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -03001048 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
Steven Toth90a71b12008-08-04 21:38:46 -03001049 /* Tuner Reset Command */
Steven Toth4c56b042008-08-12 13:30:03 -03001050 bitmask = 0x04;
Steven Toth6df51692008-06-30 22:17:05 -03001051 break;
1052 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
Steven Tothaef2d182008-08-04 21:39:53 -03001053 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
Steven Toth4c56b042008-08-12 13:30:03 -03001054 /* Two identical tuners on two different i2c buses,
1055 * we need to reset the correct gpio. */
Christopher Pascoed4dc6732009-04-27 11:27:04 -03001056 if (port->nr == 1)
Steven Toth4c56b042008-08-12 13:30:03 -03001057 bitmask = 0x01;
Christopher Pascoed4dc6732009-04-27 11:27:04 -03001058 else if (port->nr == 2)
Steven Toth4c56b042008-08-12 13:30:03 -03001059 bitmask = 0x04;
Steven Toth8c700172008-01-05 16:55:45 -03001060 break;
Alexey Chernov9028f582010-12-06 17:09:53 -03001061 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1062 /* Tuner Reset Command */
1063 bitmask = 0x02;
1064 break;
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001065 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1066 altera_ci_tuner_reset(dev, port->nr);
1067 break;
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -03001068 case CX23885_BOARD_AVERMEDIA_HC81R:
1069 /* XC3028L Reset Command */
1070 bitmask = 1 << 2;
1071 break;
Steven Toth8c700172008-01-05 16:55:45 -03001072 }
1073
Steven Toth6df51692008-06-30 22:17:05 -03001074 if (bitmask) {
1075 /* Drive the tuner into reset and back out */
1076 cx_clear(GP0_IO, bitmask);
1077 mdelay(200);
1078 cx_set(GP0_IO, bitmask);
1079 }
1080
1081 return 0;
Steven Toth8c700172008-01-05 16:55:45 -03001082}
Steven Toth73c993a2008-01-05 17:08:05 -03001083
Steven Totha6a3f142007-09-08 21:31:56 -03001084void cx23885_gpio_setup(struct cx23885_dev *dev)
1085{
Steven Toth9c8ced52008-10-16 20:18:44 -03001086 switch (dev->board) {
Steven Totha6a3f142007-09-08 21:31:56 -03001087 case CX23885_BOARD_HAUPPAUGE_HVR1250:
1088 /* GPIO-0 cx24227 demodulator reset */
1089 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1090 break;
Michael Krufky07b4a832007-12-18 01:09:11 -03001091 case CX23885_BOARD_HAUPPAUGE_HVR1500:
1092 /* GPIO-0 cx24227 demodulator */
1093 /* GPIO-2 xc3028 tuner */
1094
1095 /* Put the parts into reset */
1096 cx_set(GP0_IO, 0x00050000);
1097 cx_clear(GP0_IO, 0x00000005);
1098 msleep(5);
1099
1100 /* Bring the parts out of reset */
1101 cx_set(GP0_IO, 0x00050005);
1102 break;
Steven Tothd1987d52007-12-18 01:57:06 -03001103 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
1104 /* GPIO-0 cx24227 demodulator reset */
1105 /* GPIO-2 xc5000 tuner reset */
1106 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
1107 break;
Steven Totha6a3f142007-09-08 21:31:56 -03001108 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1109 /* GPIO-0 656_CLK */
1110 /* GPIO-1 656_D0 */
1111 /* GPIO-2 8295A Reset */
1112 /* GPIO-3-10 cx23417 data0-7 */
1113 /* GPIO-11-14 cx23417 addr0-3 */
1114 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1115 /* GPIO-19 IR_RX */
Michael Krufky3ba71d22007-12-07 01:40:36 -03001116
Steven Totha589b662008-01-13 23:44:47 -03001117 /* CX23417 GPIO's */
1118 /* EIO15 Zilog Reset */
1119 /* EIO14 S5H1409/CX24227 Reset */
Steven Tothf659c512009-06-25 23:43:31 -03001120 mc417_gpio_enable(dev, GPIO_15 | GPIO_14, 1);
1121
1122 /* Put the demod into reset and protect the eeprom */
1123 mc417_gpio_clear(dev, GPIO_15 | GPIO_14);
1124 mdelay(100);
1125
1126 /* Bring the demod and blaster out of reset */
1127 mc417_gpio_set(dev, GPIO_15 | GPIO_14);
1128 mdelay(100);
Steven Totha589b662008-01-13 23:44:47 -03001129
Steven Toth5206d6e2008-01-10 02:09:27 -03001130 /* Force the TDA8295A into reset and back */
Steven Toth21ff3e42009-06-25 23:50:39 -03001131 cx23885_gpio_enable(dev, GPIO_2, 1);
1132 cx23885_gpio_set(dev, GPIO_2);
Steven Toth5206d6e2008-01-10 02:09:27 -03001133 mdelay(20);
Steven Toth21ff3e42009-06-25 23:50:39 -03001134 cx23885_gpio_clear(dev, GPIO_2);
Steven Toth5206d6e2008-01-10 02:09:27 -03001135 mdelay(20);
Steven Toth21ff3e42009-06-25 23:50:39 -03001136 cx23885_gpio_set(dev, GPIO_2);
Steven Toth5206d6e2008-01-10 02:09:27 -03001137 mdelay(20);
Steven Totha6a3f142007-09-08 21:31:56 -03001138 break;
Steven Tothb3ea0162008-04-19 01:14:19 -03001139 case CX23885_BOARD_HAUPPAUGE_HVR1200:
1140 /* GPIO-0 tda10048 demodulator reset */
1141 /* GPIO-2 tda18271 tuner reset */
1142
1143 /* Put the parts into reset and back */
1144 cx_set(GP0_IO, 0x00050000);
1145 mdelay(20);
1146 cx_clear(GP0_IO, 0x00000005);
1147 mdelay(20);
1148 cx_set(GP0_IO, 0x00050005);
1149 break;
Steven Totha780a312008-04-19 01:25:52 -03001150 case CX23885_BOARD_HAUPPAUGE_HVR1700:
1151 /* GPIO-0 TDA10048 demodulator reset */
1152 /* GPIO-2 TDA8295A Reset */
1153 /* GPIO-3-10 cx23417 data0-7 */
1154 /* GPIO-11-14 cx23417 addr0-3 */
1155 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1156
1157 /* The following GPIO's are on the interna AVCore (cx25840) */
1158 /* GPIO-19 IR_RX */
1159 /* GPIO-20 IR_TX 416/DVBT Select */
1160 /* GPIO-21 IIS DAT */
1161 /* GPIO-22 IIS WCLK */
1162 /* GPIO-23 IIS BCLK */
1163
1164 /* Put the parts into reset and back */
1165 cx_set(GP0_IO, 0x00050000);
1166 mdelay(20);
1167 cx_clear(GP0_IO, 0x00000005);
1168 mdelay(20);
1169 cx_set(GP0_IO, 0x00050005);
1170 break;
Steven Toth66762372008-04-22 15:38:26 -03001171 case CX23885_BOARD_HAUPPAUGE_HVR1400:
1172 /* GPIO-0 Dibcom7000p demodulator reset */
1173 /* GPIO-2 xc3028L tuner reset */
1174 /* GPIO-13 LED */
1175
1176 /* Put the parts into reset and back */
1177 cx_set(GP0_IO, 0x00050000);
1178 mdelay(20);
1179 cx_clear(GP0_IO, 0x00000005);
1180 mdelay(20);
1181 cx_set(GP0_IO, 0x00050005);
1182 break;
Steven Toth1ecc5ae2008-06-30 21:23:50 -03001183 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
1184 /* GPIO-0 xc5000 tuner reset i2c bus 0 */
1185 /* GPIO-1 s5h1409 demod reset i2c bus 0 */
1186 /* GPIO-2 xc5000 tuner reset i2c bus 1 */
1187 /* GPIO-3 s5h1409 demod reset i2c bus 0 */
1188
1189 /* Put the parts into reset and back */
1190 cx_set(GP0_IO, 0x000f0000);
1191 mdelay(20);
1192 cx_clear(GP0_IO, 0x0000000f);
1193 mdelay(20);
1194 cx_set(GP0_IO, 0x000f000f);
1195 break;
Steven Tothaef2d182008-08-04 21:39:53 -03001196 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1197 /* GPIO-0 portb xc3028 reset */
1198 /* GPIO-1 portb zl10353 reset */
1199 /* GPIO-2 portc xc3028 reset */
1200 /* GPIO-3 portc zl10353 reset */
1201
1202 /* Put the parts into reset and back */
1203 cx_set(GP0_IO, 0x000f0000);
1204 mdelay(20);
1205 cx_clear(GP0_IO, 0x0000000f);
1206 mdelay(20);
1207 cx_set(GP0_IO, 0x000f000f);
1208 break;
Steven Toth4c56b042008-08-12 13:30:03 -03001209 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -03001210 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -03001211 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Vladimir Geroy34e383d2009-09-18 18:55:47 -03001212 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -03001213 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
Steven Toth4c56b042008-08-12 13:30:03 -03001214 /* GPIO-2 xc3028 tuner reset */
1215
1216 /* The following GPIO's are on the internal AVCore (cx25840) */
1217 /* GPIO-? zl10353 demod reset */
1218
1219 /* Put the parts into reset and back */
1220 cx_set(GP0_IO, 0x00040000);
1221 mdelay(20);
1222 cx_clear(GP0_IO, 0x00000004);
1223 mdelay(20);
1224 cx_set(GP0_IO, 0x00040004);
1225 break;
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001226 case CX23885_BOARD_TBS_6920:
Mariusz Bia?o?czykf6671902012-09-12 07:59:18 -03001227 case CX23885_BOARD_PROF_8000:
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001228 cx_write(MC417_CTL, 0x00000036);
1229 cx_write(MC417_OEN, 0x00001000);
Igor M. Liplianin09ea33e2009-11-24 20:16:04 -03001230 cx_set(MC417_RWD, 0x00000002);
1231 mdelay(200);
1232 cx_clear(MC417_RWD, 0x00000800);
1233 mdelay(200);
1234 cx_set(MC417_RWD, 0x00000800);
1235 mdelay(200);
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001236 break;
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001237 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1238 /* GPIO-0 INTA from CiMax1
1239 GPIO-1 INTB from CiMax2
1240 GPIO-2 reset chips
1241 GPIO-3 to GPIO-10 data/addr for CA
1242 GPIO-11 ~CS0 to CiMax1
1243 GPIO-12 ~CS1 to CiMax2
1244 GPIO-13 ADL0 load LSB addr
1245 GPIO-14 ADL1 load MSB addr
1246 GPIO-15 ~RDY from CiMax
1247 GPIO-17 ~RD to CiMax
1248 GPIO-18 ~WR to CiMax
1249 */
1250 cx_set(GP0_IO, 0x00040000); /* GPIO as out */
1251 /* GPIO1 and GPIO2 as INTA and INTB from CiMaxes, reset low */
1252 cx_clear(GP0_IO, 0x00030004);
1253 mdelay(100);/* reset delay */
1254 cx_set(GP0_IO, 0x00040004); /* GPIO as out, reset high */
1255 cx_write(MC417_CTL, 0x00000037);/* enable GPIO3-18 pins */
1256 /* GPIO-15 IN as ~ACK, rest as OUT */
1257 cx_write(MC417_OEN, 0x00001000);
1258 /* ~RD, ~WR high; ADL0, ADL1 low; ~CS0, ~CS1 high */
1259 cx_write(MC417_RWD, 0x0000c300);
1260 /* enable irq */
1261 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1262 break;
Steven Toth2074dff2009-05-02 11:39:46 -03001263 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001264 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001265 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -03001266 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001267 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001268 /* GPIO-5 RF Control: 0 = RF1 Terrestrial, 1 = RF2 Cable */
Michael Krufky6b926ec2009-05-12 17:32:17 -03001269 /* GPIO-6 I2C Gate which can isolate the demod from the bus */
1270 /* GPIO-9 Demod reset */
Steven Toth2074dff2009-05-02 11:39:46 -03001271
1272 /* Put the parts into reset and back */
Michael Krufkyd099bec2009-05-08 22:39:24 -03001273 cx23885_gpio_enable(dev, GPIO_9 | GPIO_6 | GPIO_5, 1);
1274 cx23885_gpio_set(dev, GPIO_9 | GPIO_6 | GPIO_5);
Steven Toth2074dff2009-05-02 11:39:46 -03001275 cx23885_gpio_clear(dev, GPIO_9);
1276 mdelay(20);
1277 cx23885_gpio_set(dev, GPIO_9);
1278 break;
David Wong493b7122009-05-18 05:25:49 -03001279 case CX23885_BOARD_MYGICA_X8506:
David Wong2365b2d2009-06-17 01:38:12 -03001280 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -03001281 case CX23885_BOARD_MYGICA_X8507:
David T.L. Wong8e069bb2009-10-21 12:29:11 -03001282 /* GPIO-0 (0)Analog / (1)Digital TV */
David Wong493b7122009-05-18 05:25:49 -03001283 /* GPIO-1 reset XC5000 */
David Wong2365b2d2009-06-17 01:38:12 -03001284 /* GPIO-2 reset LGS8GL5 / LGS8G75 */
David T.L. Wong8e069bb2009-10-21 12:29:11 -03001285 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1 | GPIO_2, 1);
1286 cx23885_gpio_clear(dev, GPIO_1 | GPIO_2);
David Wong493b7122009-05-18 05:25:49 -03001287 mdelay(100);
David T.L. Wong8e069bb2009-10-21 12:29:11 -03001288 cx23885_gpio_set(dev, GPIO_0 | GPIO_1 | GPIO_2);
David Wong493b7122009-05-18 05:25:49 -03001289 mdelay(100);
1290 break;
David T. L. Wongea5697f2009-10-26 08:54:04 -03001291 case CX23885_BOARD_MYGICA_X8558PRO:
1292 /* GPIO-0 reset first ATBM8830 */
1293 /* GPIO-1 reset second ATBM8830 */
1294 cx23885_gpio_enable(dev, GPIO_0 | GPIO_1, 1);
1295 cx23885_gpio_clear(dev, GPIO_0 | GPIO_1);
1296 mdelay(100);
1297 cx23885_gpio_set(dev, GPIO_0 | GPIO_1);
1298 mdelay(100);
1299 break;
Steven Toth136973802009-07-20 15:37:25 -03001300 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001301 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Steven Toth136973802009-07-20 15:37:25 -03001302 /* GPIO-0 656_CLK */
1303 /* GPIO-1 656_D0 */
1304 /* GPIO-2 Wake# */
1305 /* GPIO-3-10 cx23417 data0-7 */
1306 /* GPIO-11-14 cx23417 addr0-3 */
1307 /* GPIO-15-18 cx23417 READY, CS, RD, WR */
1308 /* GPIO-19 IR_RX */
1309 /* GPIO-20 C_IR_TX */
1310 /* GPIO-21 I2S DAT */
1311 /* GPIO-22 I2S WCLK */
1312 /* GPIO-23 I2S BCLK */
1313 /* ALT GPIO: EXP GPIO LATCH */
1314
1315 /* CX23417 GPIO's */
1316 /* GPIO-14 S5H1411/CX24228 Reset */
1317 /* GPIO-13 EEPROM write protect */
1318 mc417_gpio_enable(dev, GPIO_14 | GPIO_13, 1);
1319
1320 /* Put the demod into reset and protect the eeprom */
1321 mc417_gpio_clear(dev, GPIO_14 | GPIO_13);
1322 mdelay(100);
1323
1324 /* Bring the demod out of reset */
1325 mc417_gpio_set(dev, GPIO_14);
1326 mdelay(100);
1327
1328 /* CX24228 GPIO */
1329 /* Connected to IF / Mux */
1330 break;
Alexey Chernov9028f582010-12-06 17:09:53 -03001331 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
1332 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
1333 break;
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001334 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1335 /* GPIO-0 ~INT in
1336 GPIO-1 TMS out
1337 GPIO-2 ~reset chips out
1338 GPIO-3 to GPIO-10 data/addr for CA in/out
1339 GPIO-11 ~CS out
1340 GPIO-12 ADDR out
1341 GPIO-13 ~WR out
1342 GPIO-14 ~RD out
1343 GPIO-15 ~RDY in
1344 GPIO-16 TCK out
1345 GPIO-17 TDO in
1346 GPIO-18 TDI out
1347 */
1348 cx_set(GP0_IO, 0x00060000); /* GPIO-1,2 as out */
1349 /* GPIO-0 as INT, reset & TMS low */
1350 cx_clear(GP0_IO, 0x00010006);
1351 mdelay(100);/* reset delay */
1352 cx_set(GP0_IO, 0x00000004); /* reset high */
1353 cx_write(MC417_CTL, 0x00000037);/* enable GPIO-3..18 pins */
1354 /* GPIO-17 is TDO in, GPIO-15 is ~RDY in, rest is out */
1355 cx_write(MC417_OEN, 0x00005000);
1356 /* ~RD, ~WR high; ADDR low; ~CS high */
1357 cx_write(MC417_RWD, 0x00000d00);
1358 /* enable irq */
1359 cx_write(GPIO_ISM, 0x00000000);/* INTERRUPTS active low*/
1360 break;
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001361 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1362 /* GPIO-8 tda10071 demod reset */
1363
1364 /* Put the parts into reset and back */
1365 cx23885_gpio_enable(dev, GPIO_8, 1);
1366 cx23885_gpio_clear(dev, GPIO_8);
1367 mdelay(100);
1368 cx23885_gpio_set(dev, GPIO_8);
1369 mdelay(100);
1370 break;
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -03001371 case CX23885_BOARD_AVERMEDIA_HC81R:
1372 cx_clear(MC417_CTL, 1);
1373 /* GPIO-0,1,2 setup direction as output */
1374 cx_set(GP0_IO, 0x00070000);
1375 mdelay(10);
1376 /* AF9013 demod reset */
1377 cx_set(GP0_IO, 0x00010001);
1378 mdelay(10);
1379 cx_clear(GP0_IO, 0x00010001);
1380 mdelay(10);
1381 cx_set(GP0_IO, 0x00010001);
1382 mdelay(10);
1383 /* demod tune? */
1384 cx_clear(GP0_IO, 0x00030003);
1385 mdelay(10);
1386 cx_set(GP0_IO, 0x00020002);
1387 mdelay(10);
1388 cx_set(GP0_IO, 0x00010001);
1389 mdelay(10);
1390 cx_clear(GP0_IO, 0x00020002);
1391 /* XC3028L tuner reset */
1392 cx_set(GP0_IO, 0x00040004);
1393 cx_clear(GP0_IO, 0x00040004);
1394 cx_set(GP0_IO, 0x00040004);
1395 mdelay(60);
1396 break;
Steven Totha6a3f142007-09-08 21:31:56 -03001397 }
1398}
1399
1400int cx23885_ir_init(struct cx23885_dev *dev)
1401{
Andy Walls98d109f2010-07-19 00:41:41 -03001402 static struct v4l2_subdev_io_pin_config ir_rxtx_pin_cfg[] = {
Andy Walls81f287d2010-07-18 20:26:37 -03001403 {
1404 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1405 .pin = CX23885_PIN_IR_RX_GPIO19,
1406 .function = CX23885_PAD_IR_RX,
1407 .value = 0,
1408 .strength = CX25840_PIN_DRIVE_MEDIUM,
1409 }, {
1410 .flags = V4L2_SUBDEV_IO_PIN_OUTPUT,
1411 .pin = CX23885_PIN_IR_TX_GPIO20,
1412 .function = CX23885_PAD_IR_TX,
1413 .value = 0,
1414 .strength = CX25840_PIN_DRIVE_MEDIUM,
1415 }
1416 };
Andy Walls98d109f2010-07-19 00:41:41 -03001417 const size_t ir_rxtx_pin_cfg_count = ARRAY_SIZE(ir_rxtx_pin_cfg);
1418
1419 static struct v4l2_subdev_io_pin_config ir_rx_pin_cfg[] = {
1420 {
1421 .flags = V4L2_SUBDEV_IO_PIN_INPUT,
1422 .pin = CX23885_PIN_IR_RX_GPIO19,
1423 .function = CX23885_PAD_IR_RX,
1424 .value = 0,
1425 .strength = CX25840_PIN_DRIVE_MEDIUM,
1426 }
1427 };
1428 const size_t ir_rx_pin_cfg_count = ARRAY_SIZE(ir_rx_pin_cfg);
Andy Walls81f287d2010-07-18 20:26:37 -03001429
1430 struct v4l2_subdev_ir_parameters params;
Andy Walls29f8a0a2009-09-26 23:17:30 -03001431 int ret = 0;
Steven Totha6a3f142007-09-08 21:31:56 -03001432 switch (dev->board) {
Michael Krufky07b4a832007-12-18 01:09:11 -03001433 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Tothd1987d52007-12-18 01:57:06 -03001434 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Totha6a3f142007-09-08 21:31:56 -03001435 case CX23885_BOARD_HAUPPAUGE_HVR1800:
Steven Tothb3ea0162008-04-19 01:14:19 -03001436 case CX23885_BOARD_HAUPPAUGE_HVR1200:
Steven Toth66762372008-04-22 15:38:26 -03001437 case CX23885_BOARD_HAUPPAUGE_HVR1400:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001438 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001439 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -03001440 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001441 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Steven Totha6a3f142007-09-08 21:31:56 -03001442 /* FIXME: Implement me */
1443 break;
Andy Walls9b3d8ec2011-06-08 21:24:25 -03001444 case CX23885_BOARD_HAUPPAUGE_HVR1270:
1445 ret = cx23888_ir_probe(dev);
1446 if (ret)
1447 break;
1448 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
1449 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1450 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
1451 break;
Andy Walls29f8a0a2009-09-26 23:17:30 -03001452 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -03001453 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Walls29f8a0a2009-09-26 23:17:30 -03001454 ret = cx23888_ir_probe(dev);
1455 if (ret)
1456 break;
1457 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_888_IR);
Andy Walls81f287d2010-07-18 20:26:37 -03001458 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
Andy Walls98d109f2010-07-19 00:41:41 -03001459 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
Andy Walls81f287d2010-07-18 20:26:37 -03001460 /*
1461 * For these boards we need to invert the Tx output via the
1462 * IR controller to have the LED off while idle
1463 */
1464 v4l2_subdev_call(dev->sd_ir, ir, tx_g_parameters, &params);
1465 params.enable = false;
1466 params.shutdown = false;
1467 params.invert_level = true;
1468 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
1469 params.shutdown = true;
1470 v4l2_subdev_call(dev->sd_ir, ir, tx_s_parameters, &params);
Andy Walls29f8a0a2009-09-26 23:17:30 -03001471 break;
Djuri Baars076f0e32012-07-28 09:01:38 -03001472 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Andy Walls98d109f2010-07-19 00:41:41 -03001473 case CX23885_BOARD_TEVII_S470:
Alfredo Jesús Delaitie5f670b2012-11-08 15:50:25 -03001474 case CX23885_BOARD_MYGICA_X8507:
Andy Wallsfa647f22010-07-19 21:22:05 -03001475 if (!enable_885_ir)
1476 break;
Andy Walls98d109f2010-07-19 00:41:41 -03001477 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1478 if (dev->sd_ir == NULL) {
1479 ret = -ENODEV;
1480 break;
1481 }
1482 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1483 ir_rx_pin_cfg_count, ir_rx_pin_cfg);
Andy Walls98d109f2010-07-19 00:41:41 -03001484 break;
1485 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Andy Wallsfa647f22010-07-19 21:22:05 -03001486 if (!enable_885_ir)
1487 break;
Andy Walls98d109f2010-07-19 00:41:41 -03001488 dev->sd_ir = cx23885_find_hw(dev, CX23885_HW_AV_CORE);
1489 if (dev->sd_ir == NULL) {
1490 ret = -ENODEV;
1491 break;
1492 }
1493 v4l2_subdev_call(dev->sd_cx25840, core, s_io_pin_config,
1494 ir_rxtx_pin_cfg_count, ir_rxtx_pin_cfg);
Andy Walls98d109f2010-07-19 00:41:41 -03001495 break;
Steven Toth12886872008-08-04 21:41:06 -03001496 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
1497 request_module("ir-kbd-i2c");
1498 break;
Steven Totha6a3f142007-09-08 21:31:56 -03001499 }
1500
Andy Walls29f8a0a2009-09-26 23:17:30 -03001501 return ret;
Steven Totha6a3f142007-09-08 21:31:56 -03001502}
1503
Andy Wallsf59ad612009-09-27 19:51:50 -03001504void cx23885_ir_fini(struct cx23885_dev *dev)
1505{
1506 switch (dev->board) {
Andy Walls9b3d8ec2011-06-08 21:24:25 -03001507 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Andy Wallsf59ad612009-09-27 19:51:50 -03001508 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -03001509 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001510 cx23885_irq_remove(dev, PCI_MSK_IR);
Andy Wallsf59ad612009-09-27 19:51:50 -03001511 cx23888_ir_remove(dev);
1512 dev->sd_ir = NULL;
1513 break;
Djuri Baars076f0e32012-07-28 09:01:38 -03001514 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Andy Walls98d109f2010-07-19 00:41:41 -03001515 case CX23885_BOARD_TEVII_S470:
1516 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Alfredo Jesús Delaitie5f670b2012-11-08 15:50:25 -03001517 case CX23885_BOARD_MYGICA_X8507:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001518 cx23885_irq_remove(dev, PCI_MSK_AV_CORE);
Andy Walls98d109f2010-07-19 00:41:41 -03001519 /* sd_ir is a duplicate pointer to the AV Core, just clear it */
1520 dev->sd_ir = NULL;
1521 break;
Andy Wallsf59ad612009-09-27 19:51:50 -03001522 }
1523}
1524
Mauro Carvalho Chehabada73ee2012-10-27 11:29:23 -03001525static int netup_jtag_io(void *device, int tms, int tdi, int read_tdo)
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001526{
1527 int data;
1528 int tdo = 0;
1529 struct cx23885_dev *dev = (struct cx23885_dev *)device;
1530 /*TMS*/
1531 data = ((cx_read(GP0_IO)) & (~0x00000002));
1532 data |= (tms ? 0x00020002 : 0x00020000);
1533 cx_write(GP0_IO, data);
1534
1535 /*TDI*/
1536 data = ((cx_read(MC417_RWD)) & (~0x0000a000));
1537 data |= (tdi ? 0x00008000 : 0);
1538 cx_write(MC417_RWD, data);
1539 if (read_tdo)
1540 tdo = (data & 0x00004000) ? 1 : 0; /*TDO*/
1541
1542 cx_write(MC417_RWD, data | 0x00002000);
1543 udelay(1);
1544 /*TCK*/
1545 cx_write(MC417_RWD, data);
1546
1547 return tdo;
1548}
1549
Andy Wallsf59ad612009-09-27 19:51:50 -03001550void cx23885_ir_pci_int_enable(struct cx23885_dev *dev)
1551{
1552 switch (dev->board) {
Andy Walls9b3d8ec2011-06-08 21:24:25 -03001553 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Andy Wallsf59ad612009-09-27 19:51:50 -03001554 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufky7fec6fe2009-11-11 15:46:09 -03001555 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001556 if (dev->sd_ir)
1557 cx23885_irq_add_enable(dev, PCI_MSK_IR);
Andy Wallsf59ad612009-09-27 19:51:50 -03001558 break;
Djuri Baars076f0e32012-07-28 09:01:38 -03001559 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Andy Walls98d109f2010-07-19 00:41:41 -03001560 case CX23885_BOARD_TEVII_S470:
1561 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Alfredo Jesús Delaitie5f670b2012-11-08 15:50:25 -03001562 case CX23885_BOARD_MYGICA_X8507:
Andy Wallsdbe83a32010-07-19 01:19:43 -03001563 if (dev->sd_ir)
1564 cx23885_irq_add_enable(dev, PCI_MSK_AV_CORE);
Andy Walls98d109f2010-07-19 00:41:41 -03001565 break;
Andy Wallsf59ad612009-09-27 19:51:50 -03001566 }
1567}
1568
Steven Tothd19770e2007-03-11 20:44:05 -03001569void cx23885_card_setup(struct cx23885_dev *dev)
1570{
Steven Totha6a3f142007-09-08 21:31:56 -03001571 struct cx23885_tsport *ts1 = &dev->ts1;
1572 struct cx23885_tsport *ts2 = &dev->ts2;
1573
Steven Tothd19770e2007-03-11 20:44:05 -03001574 static u8 eeprom[256];
1575
1576 if (dev->i2c_bus[0].i2c_rc == 0) {
1577 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
Michael Krufky44a64812007-03-20 23:00:18 -03001578 tveeprom_read(&dev->i2c_bus[0].i2c_client,
1579 eeprom, sizeof(eeprom));
Steven Tothd19770e2007-03-11 20:44:05 -03001580 }
1581
1582 switch (dev->board) {
Steven Totha77743b2007-08-22 21:01:20 -03001583 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Andy Wallsebbeb462010-07-18 17:35:00 -03001584 if (dev->i2c_bus[0].i2c_rc == 0) {
1585 if (eeprom[0x80] != 0x84)
1586 hauppauge_eeprom(dev, eeprom+0xc0);
1587 else
1588 hauppauge_eeprom(dev, eeprom+0x80);
1589 }
1590 break;
Michael Krufky07b4a832007-12-18 01:09:11 -03001591 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Tothd1987d52007-12-18 01:57:06 -03001592 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Toth66762372008-04-22 15:38:26 -03001593 case CX23885_BOARD_HAUPPAUGE_HVR1400:
Steven Tothc88133e2008-03-29 17:36:09 -03001594 if (dev->i2c_bus[0].i2c_rc == 0)
1595 hauppauge_eeprom(dev, eeprom+0x80);
1596 break;
Steven Tothd19770e2007-03-11 20:44:05 -03001597 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1598 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
Steven Tothb3ea0162008-04-19 01:14:19 -03001599 case CX23885_BOARD_HAUPPAUGE_HVR1200:
Steven Totha780a312008-04-19 01:25:52 -03001600 case CX23885_BOARD_HAUPPAUGE_HVR1700:
Steven Toth2074dff2009-05-02 11:39:46 -03001601 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001602 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001603 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -03001604 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001605 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Steven Toth136973802009-07-20 15:37:25 -03001606 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001607 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001608 case CX23885_BOARD_HAUPPAUGE_HVR4400:
Steven Tothd19770e2007-03-11 20:44:05 -03001609 if (dev->i2c_bus[0].i2c_rc == 0)
Steven Tothc88133e2008-03-29 17:36:09 -03001610 hauppauge_eeprom(dev, eeprom+0xc0);
Steven Tothd19770e2007-03-11 20:44:05 -03001611 break;
1612 }
Steven Totha6a3f142007-09-08 21:31:56 -03001613
1614 switch (dev->board) {
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -03001615 case CX23885_BOARD_AVERMEDIA_HC81R:
1616 /* Defaults for VID B */
1617 ts1->gen_ctrl_val = 0x4; /* Parallel */
1618 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1619 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1620 /* Defaults for VID C */
1621 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1622 ts2->gen_ctrl_val = 0x10e;
1623 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1624 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1625 break;
Michael Krufky335377b2008-05-07 01:43:10 -03001626 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
Steven Tothaef2d182008-08-04 21:39:53 -03001627 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
Michael Krufky335377b2008-05-07 01:43:10 -03001628 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1629 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1630 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1631 /* break omitted intentionally */
Steven Totha6a3f142007-09-08 21:31:56 -03001632 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
1633 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1634 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1635 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1636 break;
Steven Toth35045132012-01-04 21:08:35 -03001637 case CX23885_BOARD_HAUPPAUGE_HVR1850:
Steven Totha589b662008-01-13 23:44:47 -03001638 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1639 /* Defaults for VID B - Analog encoder */
1640 /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
1641 ts1->gen_ctrl_val = 0x10e;
1642 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1643 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1644
1645 /* APB_TSVALERR_POL (active low)*/
1646 ts1->vld_misc_val = 0x2000;
1647 ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
Steven Toth35045132012-01-04 21:08:35 -03001648 cx_write(0x130184, 0xc);
Steven Totha589b662008-01-13 23:44:47 -03001649
1650 /* Defaults for VID C */
1651 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1652 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1653 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1654 break;
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001655 case CX23885_BOARD_TBS_6920:
Igor M. Liplianin09ea33e2009-11-24 20:16:04 -03001656 ts1->gen_ctrl_val = 0x4; /* Parallel */
1657 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1658 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1659 break;
1660 case CX23885_BOARD_TEVII_S470:
Igor M. Liplianin7b134e82012-05-11 11:45:42 -03001661 case CX23885_BOARD_TEVII_S471:
Igor M. Liplianinc9b8b042009-01-17 12:23:31 -03001662 case CX23885_BOARD_DVBWORLD_2005:
Mariusz Bia?o?czykf6671902012-09-12 07:59:18 -03001663 case CX23885_BOARD_PROF_8000:
Igor M. Liplianin96318d02009-01-17 12:11:20 -03001664 ts1->gen_ctrl_val = 0x5; /* Parallel */
1665 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1666 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1667 break;
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001668 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001669 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
Stefan Ringel722c90e2012-01-07 09:20:48 -03001670 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001671 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1672 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1673 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1674 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1675 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1676 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1677 break;
David Wong493b7122009-05-18 05:25:49 -03001678 case CX23885_BOARD_MYGICA_X8506:
David Wong2365b2d2009-06-17 01:38:12 -03001679 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
David Wong493b7122009-05-18 05:25:49 -03001680 ts1->gen_ctrl_val = 0x5; /* Parallel */
1681 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1682 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1683 break;
David T. L. Wongea5697f2009-10-26 08:54:04 -03001684 case CX23885_BOARD_MYGICA_X8558PRO:
1685 ts1->gen_ctrl_val = 0x5; /* Parallel */
1686 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1687 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1688 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1689 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1690 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1691 break;
Michael Krufky7c62f5a2012-12-15 23:34:09 -03001692 case CX23885_BOARD_HAUPPAUGE_HVR4400:
1693 ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1694 ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1695 ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1696 break;
Steven Totha6a3f142007-09-08 21:31:56 -03001697 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Michael Krufky07b4a832007-12-18 01:09:11 -03001698 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Tothd1987d52007-12-18 01:57:06 -03001699 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
Steven Totha6a3f142007-09-08 21:31:56 -03001700 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
Steven Tothb3ea0162008-04-19 01:14:19 -03001701 case CX23885_BOARD_HAUPPAUGE_HVR1200:
Steven Totha780a312008-04-19 01:25:52 -03001702 case CX23885_BOARD_HAUPPAUGE_HVR1700:
Steven Toth66762372008-04-22 15:38:26 -03001703 case CX23885_BOARD_HAUPPAUGE_HVR1400:
Steven Toth4c56b042008-08-12 13:30:03 -03001704 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -03001705 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -03001706 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Steven Toth2074dff2009-05-02 11:39:46 -03001707 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Michael Krufkyd099bec2009-05-08 22:39:24 -03001708 case CX23885_BOARD_HAUPPAUGE_HVR1275:
Michael Krufky19bc5792009-05-08 16:05:29 -03001709 case CX23885_BOARD_HAUPPAUGE_HVR1255:
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -03001710 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
Michael Krufky6b926ec2009-05-12 17:32:17 -03001711 case CX23885_BOARD_HAUPPAUGE_HVR1210:
Vladimir Geroy34e383d2009-09-18 18:55:47 -03001712 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001713 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Alexey Chernov9028f582010-12-06 17:09:53 -03001714 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
Steven Totha6a3f142007-09-08 21:31:56 -03001715 default:
1716 ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
1717 ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
1718 ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
1719 }
1720
Steven Tothce89cfb2008-04-19 01:36:06 -03001721 /* Certain boards support analog, or require the avcore to be
1722 * loaded, ensure this happens.
1723 */
1724 switch (dev->board) {
Andy Wallsfa647f22010-07-19 21:22:05 -03001725 case CX23885_BOARD_TEVII_S470:
Andy Wallsfa647f22010-07-19 21:22:05 -03001726 /* Currently only enabled for the integrated IR controller */
1727 if (!enable_885_ir)
1728 break;
Devin Heitmuellerd214ddc2012-07-01 16:15:13 -03001729 case CX23885_BOARD_HAUPPAUGE_HVR1250:
Steven Tothce89cfb2008-04-19 01:36:06 -03001730 case CX23885_BOARD_HAUPPAUGE_HVR1800:
1731 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
1732 case CX23885_BOARD_HAUPPAUGE_HVR1700:
Steven Toth4c56b042008-08-12 13:30:03 -03001733 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
istvan_v@mailbox.hu0cf8af52011-07-11 10:58:35 -03001734 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
Igor M. Liplianin9bb1b7e2008-11-23 14:11:16 -03001735 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001736 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001737 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
Vladimir Geroy34e383d2009-09-18 18:55:47 -03001738 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
Devin Heitmueller0ac60ac2012-07-01 16:15:14 -03001739 case CX23885_BOARD_HAUPPAUGE_HVR1255:
1740 case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
Andy Walls9b3d8ec2011-06-08 21:24:25 -03001741 case CX23885_BOARD_HAUPPAUGE_HVR1270:
Andy Wallsc6b70532009-09-27 00:14:33 -03001742 case CX23885_BOARD_HAUPPAUGE_HVR1850:
David T.L. Wongbc1548a2009-10-21 11:09:28 -03001743 case CX23885_BOARD_MYGICA_X8506:
1744 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
Michael Krufkyaee0b242009-11-11 01:52:45 -03001745 case CX23885_BOARD_HAUPPAUGE_HVR1290:
Kusanagi Kouichi0b32d652010-01-22 04:55:28 -03001746 case CX23885_BOARD_LEADTEK_WINFAST_PXTV1200:
Alexey Chernov9028f582010-12-06 17:09:53 -03001747 case CX23885_BOARD_GOTVIEW_X5_3D_HYBRID:
Mijhail Moreyra18d64472011-10-10 11:09:53 -03001748 case CX23885_BOARD_HAUPPAUGE_HVR1500:
Steven Toth2cb9ccd2011-10-10 11:09:55 -03001749 case CX23885_BOARD_MPX885:
Alfredo Jesús Delaiti87988752011-11-09 15:13:00 -03001750 case CX23885_BOARD_MYGICA_X8507:
Stefan Ringel722c90e2012-01-07 09:20:48 -03001751 case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
Oleh Kravchenkoe8d42372012-12-08 18:20:59 -03001752 case CX23885_BOARD_AVERMEDIA_HC81R:
Hans Verkuile6574f22009-04-01 03:57:53 -03001753 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev,
1754 &dev->i2c_bus[2].i2c_adap,
Laurent Pinchart9a1f8b32010-09-24 10:16:44 -03001755 "cx25840", 0x88 >> 1, NULL);
Andy Wallsd6b18502010-07-18 23:26:29 -03001756 if (dev->sd_cx25840) {
1757 dev->sd_cx25840->grp_id = CX23885_HW_AV_CORE;
1758 v4l2_subdev_call(dev->sd_cx25840, core, load_fw);
1759 }
Steven Tothce89cfb2008-04-19 01:36:06 -03001760 break;
1761 }
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001762
1763 /* AUX-PLL 27MHz CLK */
1764 switch (dev->board) {
1765 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1766 netup_initialize(dev);
1767 break;
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001768 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1769 int ret;
1770 const struct firmware *fw;
1771 const char *filename = "dvb-netup-altera-01.fw";
1772 char *action = "configure";
Abylay Ospanb8f0d302011-07-14 05:20:29 -03001773 static struct netup_card_info cinfo;
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001774 struct altera_config netup_config = {
1775 .dev = dev,
1776 .action = action,
1777 .jtag_io = netup_jtag_io,
1778 };
1779
1780 netup_initialize(dev);
1781
Abylay Ospanb8f0d302011-07-14 05:20:29 -03001782 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
Abylay Ospan2d124212011-07-18 04:14:28 -03001783 if (netup_card_rev)
1784 cinfo.rev = netup_card_rev;
1785
Abylay Ospanb8f0d302011-07-14 05:20:29 -03001786 switch (cinfo.rev) {
1787 case 0x4:
1788 filename = "dvb-netup-altera-04.fw";
1789 break;
1790 default:
1791 filename = "dvb-netup-altera-01.fw";
1792 break;
1793 }
1794 printk(KERN_INFO "NetUP card rev=0x%x fw_filename=%s\n",
1795 cinfo.rev, filename);
1796
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001797 ret = request_firmware(&fw, filename, &dev->pci->dev);
1798 if (ret != 0)
1799 printk(KERN_ERR "did not find the firmware file. (%s) "
1800 "Please see linux/Documentation/dvb/ for more details "
1801 "on firmware-problems.", filename);
1802 else
1803 altera_init(&netup_config, fw);
1804
Jesper Juhl3f84a4e2011-04-07 16:23:48 -03001805 release_firmware(fw);
Igor M. Liplianin78db8542011-01-25 17:04:00 -03001806 break;
1807 }
Igor M. Liplianin5a23b072009-03-03 12:06:09 -03001808 }
Steven Tothd19770e2007-03-11 20:44:05 -03001809}
1810
1811/* ------------------------------------------------------------------ */