Russell King | 9525ae8 | 2017-07-25 15:03:13 +0100 | [diff] [blame] | 1 | #ifndef NETDEV_PCS_H |
| 2 | #define NETDEV_PCS_H |
| 3 | |
| 4 | #include <linux/phy.h> |
| 5 | #include <linux/spinlock.h> |
| 6 | #include <linux/workqueue.h> |
| 7 | |
| 8 | struct device_node; |
| 9 | struct ethtool_cmd; |
| 10 | struct net_device; |
| 11 | |
| 12 | enum { |
| 13 | MLO_PAUSE_NONE, |
| 14 | MLO_PAUSE_ASYM = BIT(0), |
| 15 | MLO_PAUSE_SYM = BIT(1), |
| 16 | MLO_PAUSE_RX = BIT(2), |
| 17 | MLO_PAUSE_TX = BIT(3), |
| 18 | MLO_PAUSE_TXRX_MASK = MLO_PAUSE_TX | MLO_PAUSE_RX, |
| 19 | MLO_PAUSE_AN = BIT(4), |
| 20 | |
| 21 | MLO_AN_PHY = 0, /* Conventional PHY */ |
| 22 | MLO_AN_FIXED, /* Fixed-link mode */ |
| 23 | MLO_AN_SGMII, /* Cisco SGMII protocol */ |
| 24 | MLO_AN_8023Z, /* 1000base-X protocol */ |
| 25 | }; |
| 26 | |
| 27 | static inline bool phylink_autoneg_inband(unsigned int mode) |
| 28 | { |
| 29 | return mode == MLO_AN_SGMII || mode == MLO_AN_8023Z; |
| 30 | } |
| 31 | |
| 32 | struct phylink_link_state { |
| 33 | __ETHTOOL_DECLARE_LINK_MODE_MASK(advertising); |
| 34 | __ETHTOOL_DECLARE_LINK_MODE_MASK(lp_advertising); |
| 35 | phy_interface_t interface; /* PHY_INTERFACE_xxx */ |
| 36 | int speed; |
| 37 | int duplex; |
| 38 | int pause; |
| 39 | unsigned int link:1; |
| 40 | unsigned int an_enabled:1; |
| 41 | unsigned int an_complete:1; |
| 42 | }; |
| 43 | |
| 44 | struct phylink_mac_ops { |
| 45 | /** |
| 46 | * validate: validate and update the link configuration |
| 47 | * @ndev: net_device structure associated with MAC |
| 48 | * @config: configuration to validate |
| 49 | * |
| 50 | * Update the %config->supported and %config->advertised masks |
| 51 | * clearing bits that can not be supported. |
| 52 | * |
| 53 | * Note: the PHY may be able to transform from one connection |
| 54 | * technology to another, so, eg, don't clear 1000BaseX just |
| 55 | * because the MAC is unable to support it. This is more about |
| 56 | * clearing unsupported speeds and duplex settings. |
| 57 | * |
| 58 | * If the %config->interface mode is %PHY_INTERFACE_MODE_1000BASEX |
| 59 | * or %PHY_INTERFACE_MODE_2500BASEX, select the appropriate mode |
| 60 | * based on %config->advertised and/or %config->speed. |
| 61 | */ |
| 62 | void (*validate)(struct net_device *ndev, unsigned long *supported, |
| 63 | struct phylink_link_state *state); |
| 64 | |
| 65 | /* Read the current link state from the hardware */ |
| 66 | int (*mac_link_state)(struct net_device *, struct phylink_link_state *); |
| 67 | |
| 68 | /* Configure the MAC */ |
| 69 | /** |
| 70 | * mac_config: configure the MAC for the selected mode and state |
| 71 | * @ndev: net_device structure for the MAC |
| 72 | * @mode: one of MLO_AN_FIXED, MLO_AN_PHY, MLO_AN_8023Z, MLO_AN_SGMII |
| 73 | * @state: state structure |
| 74 | * |
| 75 | * The action performed depends on the currently selected mode: |
| 76 | * |
| 77 | * %MLO_AN_FIXED, %MLO_AN_PHY: |
| 78 | * set the specified speed, duplex, pause mode, and phy interface |
| 79 | * mode in the provided @state. |
| 80 | * %MLO_AN_8023Z: |
| 81 | * place the link in 1000base-X mode, advertising the parameters |
| 82 | * given in advertising in @state. |
| 83 | * %MLO_AN_SGMII: |
| 84 | * place the link in Cisco SGMII mode - there is no advertisment |
| 85 | * to make as the PHY communicates the speed and duplex to the |
| 86 | * MAC over the in-band control word. Configuration of the pause |
| 87 | * mode is as per MLO_AN_PHY since this is not included. |
| 88 | */ |
| 89 | void (*mac_config)(struct net_device *ndev, unsigned int mode, |
| 90 | const struct phylink_link_state *state); |
| 91 | |
| 92 | /** |
| 93 | * mac_an_restart: restart 802.3z BaseX autonegotiation |
| 94 | * @ndev: net_device structure for the MAC |
| 95 | */ |
| 96 | void (*mac_an_restart)(struct net_device *ndev); |
| 97 | |
| 98 | void (*mac_link_down)(struct net_device *, unsigned int mode); |
| 99 | void (*mac_link_up)(struct net_device *, unsigned int mode, |
| 100 | struct phy_device *); |
| 101 | }; |
| 102 | |
| 103 | struct phylink *phylink_create(struct net_device *, struct device_node *, |
| 104 | phy_interface_t iface, const struct phylink_mac_ops *ops); |
| 105 | void phylink_destroy(struct phylink *); |
| 106 | |
| 107 | int phylink_connect_phy(struct phylink *, struct phy_device *); |
| 108 | int phylink_of_phy_connect(struct phylink *, struct device_node *); |
| 109 | void phylink_disconnect_phy(struct phylink *); |
| 110 | |
| 111 | void phylink_mac_change(struct phylink *, bool up); |
| 112 | |
| 113 | void phylink_start(struct phylink *); |
| 114 | void phylink_stop(struct phylink *); |
| 115 | |
| 116 | void phylink_ethtool_get_wol(struct phylink *, struct ethtool_wolinfo *); |
| 117 | int phylink_ethtool_set_wol(struct phylink *, struct ethtool_wolinfo *); |
| 118 | |
| 119 | int phylink_ethtool_ksettings_get(struct phylink *, |
| 120 | struct ethtool_link_ksettings *); |
| 121 | int phylink_ethtool_ksettings_set(struct phylink *, |
| 122 | const struct ethtool_link_ksettings *); |
| 123 | int phylink_ethtool_nway_reset(struct phylink *); |
| 124 | void phylink_ethtool_get_pauseparam(struct phylink *, |
| 125 | struct ethtool_pauseparam *); |
| 126 | int phylink_ethtool_set_pauseparam(struct phylink *, |
| 127 | struct ethtool_pauseparam *); |
Russell King | 770a1ad | 2017-07-25 15:03:23 +0100 | [diff] [blame] | 128 | int phylink_ethtool_get_module_info(struct phylink *, struct ethtool_modinfo *); |
| 129 | int phylink_ethtool_get_module_eeprom(struct phylink *, |
| 130 | struct ethtool_eeprom *, u8 *); |
Russell King | 9525ae8 | 2017-07-25 15:03:13 +0100 | [diff] [blame] | 131 | int phylink_init_eee(struct phylink *, bool); |
| 132 | int phylink_get_eee_err(struct phylink *); |
| 133 | int phylink_ethtool_get_eee(struct phylink *, struct ethtool_eee *); |
| 134 | int phylink_ethtool_set_eee(struct phylink *, struct ethtool_eee *); |
| 135 | int phylink_mii_ioctl(struct phylink *, struct ifreq *, int); |
| 136 | |
| 137 | #define phylink_zero(bm) \ |
| 138 | bitmap_zero(bm, __ETHTOOL_LINK_MODE_MASK_NBITS) |
| 139 | #define __phylink_do_bit(op, bm, mode) \ |
| 140 | op(ETHTOOL_LINK_MODE_ ## mode ## _BIT, bm) |
| 141 | |
| 142 | #define phylink_set(bm, mode) __phylink_do_bit(__set_bit, bm, mode) |
| 143 | #define phylink_clear(bm, mode) __phylink_do_bit(__clear_bit, bm, mode) |
| 144 | #define phylink_test(bm, mode) __phylink_do_bit(test_bit, bm, mode) |
| 145 | |
| 146 | void phylink_set_port_modes(unsigned long *bits); |
| 147 | |
| 148 | #endif |