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viresh kumarbc4e8142010-04-01 12:30:58 +01001/*
2 * arch/arm/mach-spear3xx/spear310.c
3 *
4 * SPEAr310 machine source file
5 *
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +05306 * Copyright (C) 2009-2012 ST Microelectronics
Viresh Kumar10d89352012-06-20 12:53:02 -07007 * Viresh Kumar <viresh.linux@gmail.com>
viresh kumarbc4e8142010-04-01 12:30:58 +01008 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
Viresh Kumar5fb00f92012-03-26 10:39:43 +053014#define pr_fmt(fmt) "SPEAr310: " fmt
15
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053016#include <linux/amba/pl08x.h>
17#include <linux/amba/serial.h>
Rob Herringe9c51552013-01-02 09:37:56 -060018#include <linux/irqchip.h>
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053019#include <linux/of_platform.h>
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +053020#include <asm/mach/arch.h>
viresh kumarbc4e8142010-04-01 12:30:58 +010021#include <mach/generic.h>
Arnd Bergmann5019f0b2012-04-11 17:30:11 +000022#include <mach/spear.h>
23
24#define SPEAR310_UART1_BASE UL(0xB2000000)
25#define SPEAR310_UART2_BASE UL(0xB2080000)
26#define SPEAR310_UART3_BASE UL(0xB2100000)
27#define SPEAR310_UART4_BASE UL(0xB2180000)
28#define SPEAR310_UART5_BASE UL(0xB2200000)
viresh kumar4c18e772010-05-03 09:24:30 +010029
Viresh Kumar0b7ee712012-03-26 10:29:23 +053030/* DMAC platform data's slave info */
31struct pl08x_channel_data spear310_dma_info[] = {
32 {
33 .bus_id = "uart0_rx",
34 .min_signal = 2,
35 .max_signal = 2,
36 .muxval = 0,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053037 .periph_buses = PL08X_AHB1,
38 }, {
39 .bus_id = "uart0_tx",
40 .min_signal = 3,
41 .max_signal = 3,
42 .muxval = 0,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053043 .periph_buses = PL08X_AHB1,
44 }, {
45 .bus_id = "ssp0_rx",
46 .min_signal = 8,
47 .max_signal = 8,
48 .muxval = 0,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053049 .periph_buses = PL08X_AHB1,
50 }, {
51 .bus_id = "ssp0_tx",
52 .min_signal = 9,
53 .max_signal = 9,
54 .muxval = 0,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053055 .periph_buses = PL08X_AHB1,
56 }, {
57 .bus_id = "i2c_rx",
58 .min_signal = 10,
59 .max_signal = 10,
60 .muxval = 0,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053061 .periph_buses = PL08X_AHB1,
62 }, {
63 .bus_id = "i2c_tx",
64 .min_signal = 11,
65 .max_signal = 11,
66 .muxval = 0,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053067 .periph_buses = PL08X_AHB1,
68 }, {
69 .bus_id = "irda",
70 .min_signal = 12,
71 .max_signal = 12,
72 .muxval = 0,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053073 .periph_buses = PL08X_AHB1,
74 }, {
75 .bus_id = "adc",
76 .min_signal = 13,
77 .max_signal = 13,
78 .muxval = 0,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053079 .periph_buses = PL08X_AHB1,
80 }, {
81 .bus_id = "to_jpeg",
82 .min_signal = 14,
83 .max_signal = 14,
84 .muxval = 0,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053085 .periph_buses = PL08X_AHB1,
86 }, {
87 .bus_id = "from_jpeg",
88 .min_signal = 15,
89 .max_signal = 15,
90 .muxval = 0,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053091 .periph_buses = PL08X_AHB1,
92 }, {
93 .bus_id = "uart1_rx",
94 .min_signal = 0,
95 .max_signal = 0,
96 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +053097 .periph_buses = PL08X_AHB1,
98 }, {
99 .bus_id = "uart1_tx",
100 .min_signal = 1,
101 .max_signal = 1,
102 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530103 .periph_buses = PL08X_AHB1,
104 }, {
105 .bus_id = "uart2_rx",
106 .min_signal = 2,
107 .max_signal = 2,
108 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530109 .periph_buses = PL08X_AHB1,
110 }, {
111 .bus_id = "uart2_tx",
112 .min_signal = 3,
113 .max_signal = 3,
114 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530115 .periph_buses = PL08X_AHB1,
116 }, {
117 .bus_id = "uart3_rx",
118 .min_signal = 4,
119 .max_signal = 4,
120 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530121 .periph_buses = PL08X_AHB1,
122 }, {
123 .bus_id = "uart3_tx",
124 .min_signal = 5,
125 .max_signal = 5,
126 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530127 .periph_buses = PL08X_AHB1,
128 }, {
129 .bus_id = "uart4_rx",
130 .min_signal = 6,
131 .max_signal = 6,
132 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530133 .periph_buses = PL08X_AHB1,
134 }, {
135 .bus_id = "uart4_tx",
136 .min_signal = 7,
137 .max_signal = 7,
138 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530139 .periph_buses = PL08X_AHB1,
140 }, {
141 .bus_id = "uart5_rx",
142 .min_signal = 8,
143 .max_signal = 8,
144 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530145 .periph_buses = PL08X_AHB1,
146 }, {
147 .bus_id = "uart5_tx",
148 .min_signal = 9,
149 .max_signal = 9,
150 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530151 .periph_buses = PL08X_AHB1,
152 }, {
153 .bus_id = "ras5_rx",
154 .min_signal = 10,
155 .max_signal = 10,
156 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530157 .periph_buses = PL08X_AHB1,
158 }, {
159 .bus_id = "ras5_tx",
160 .min_signal = 11,
161 .max_signal = 11,
162 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530163 .periph_buses = PL08X_AHB1,
164 }, {
165 .bus_id = "ras6_rx",
166 .min_signal = 12,
167 .max_signal = 12,
168 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530169 .periph_buses = PL08X_AHB1,
170 }, {
171 .bus_id = "ras6_tx",
172 .min_signal = 13,
173 .max_signal = 13,
174 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530175 .periph_buses = PL08X_AHB1,
176 }, {
177 .bus_id = "ras7_rx",
178 .min_signal = 14,
179 .max_signal = 14,
180 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530181 .periph_buses = PL08X_AHB1,
182 }, {
183 .bus_id = "ras7_tx",
184 .min_signal = 15,
185 .max_signal = 15,
186 .muxval = 1,
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530187 .periph_buses = PL08X_AHB1,
188 },
189};
190
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530191/* uart devices plat data */
192static struct amba_pl011_data spear310_uart_data[] = {
193 {
194 .dma_filter = pl08x_filter_id,
195 .dma_tx_param = "uart1_tx",
196 .dma_rx_param = "uart1_rx",
197 }, {
198 .dma_filter = pl08x_filter_id,
199 .dma_tx_param = "uart2_tx",
200 .dma_rx_param = "uart2_rx",
201 }, {
202 .dma_filter = pl08x_filter_id,
203 .dma_tx_param = "uart3_tx",
204 .dma_rx_param = "uart3_rx",
205 }, {
206 .dma_filter = pl08x_filter_id,
207 .dma_tx_param = "uart4_tx",
208 .dma_rx_param = "uart4_rx",
209 }, {
210 .dma_filter = pl08x_filter_id,
211 .dma_tx_param = "uart5_tx",
212 .dma_rx_param = "uart5_rx",
213 },
214};
215
216/* Add SPEAr310 auxdata to pass platform data */
217static struct of_dev_auxdata spear310_auxdata_lookup[] __initdata = {
218 OF_DEV_AUXDATA("arm,pl022", SPEAR3XX_ICM1_SSP_BASE, NULL,
219 &pl022_plat_data),
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530220 OF_DEV_AUXDATA("arm,pl080", SPEAR3XX_ICM3_DMA_BASE, NULL,
221 &pl080_plat_data),
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530222 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART1_BASE, NULL,
223 &spear310_uart_data[0]),
224 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART2_BASE, NULL,
225 &spear310_uart_data[1]),
226 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART3_BASE, NULL,
227 &spear310_uart_data[2]),
228 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART4_BASE, NULL,
229 &spear310_uart_data[3]),
230 OF_DEV_AUXDATA("arm,pl011", SPEAR310_UART5_BASE, NULL,
231 &spear310_uart_data[4]),
232 {}
233};
234
235static void __init spear310_dt_init(void)
viresh kumarbc4e8142010-04-01 12:30:58 +0100236{
Viresh Kumar0b7ee712012-03-26 10:29:23 +0530237 pl080_plat_data.slave_channels = spear310_dma_info;
238 pl080_plat_data.num_slave_channels = ARRAY_SIZE(spear310_dma_info);
239
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530240 of_platform_populate(NULL, of_default_bus_match_table,
241 spear310_auxdata_lookup, NULL);
viresh kumar70f4c0b2010-04-01 12:31:29 +0100242}
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530243
244static const char * const spear310_dt_board_compat[] = {
245 "st,spear310",
246 "st,spear310-evb",
247 NULL,
248};
249
250static void __init spear310_map_io(void)
251{
252 spear3xx_map_io();
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530253}
254
255DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree")
256 .map_io = spear310_map_io,
Rob Herringe9c51552013-01-02 09:37:56 -0600257 .init_irq = irqchip_init,
Viresh Kumarc5fa4fd2012-03-23 00:17:43 +0530258 .timer = &spear3xx_timer,
259 .init_machine = spear310_dt_init,
260 .restart = spear_restart,
261 .dt_compat = spear310_dt_board_compat,
262MACHINE_END