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Michael Chana4636962009-06-08 18:14:43 -07001/* cnic_if.h: Broadcom CNIC core network driver.
2 *
Michael Chan42bb8d52011-01-03 15:21:46 +00003 * Copyright (c) 2006-2011 Broadcom Corporation
Michael Chana4636962009-06-08 18:14:43 -07004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 */
10
11
12#ifndef CNIC_IF_H
13#define CNIC_IF_H
14
Dmitry Kravkovfab0dc82011-03-31 17:04:22 -070015#define CNIC_MODULE_VERSION "2.2.14"
16#define CNIC_MODULE_RELDATE "Mar 30, 2011"
Michael Chana4636962009-06-08 18:14:43 -070017
18#define CNIC_ULP_RDMA 0
19#define CNIC_ULP_ISCSI 1
Michael Chane1928c82010-12-23 07:43:04 +000020#define CNIC_ULP_FCOE 2
21#define CNIC_ULP_L4 3
22#define MAX_CNIC_ULP_TYPE_EXT 3
23#define MAX_CNIC_ULP_TYPE 4
Michael Chana4636962009-06-08 18:14:43 -070024
25struct kwqe {
26 u32 kwqe_op_flag;
27
Michael Chane1928c82010-12-23 07:43:04 +000028#define KWQE_QID_SHIFT 8
Michael Chana4636962009-06-08 18:14:43 -070029#define KWQE_OPCODE_MASK 0x00ff0000
30#define KWQE_OPCODE_SHIFT 16
Michael Chana4636962009-06-08 18:14:43 -070031#define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
Michael Chane1928c82010-12-23 07:43:04 +000032#define KWQE_LAYER_MASK 0x70000000
33#define KWQE_LAYER_SHIFT 28
34#define KWQE_FLAGS_LAYER_MASK_L2 (2<<28)
35#define KWQE_FLAGS_LAYER_MASK_L3 (3<<28)
36#define KWQE_FLAGS_LAYER_MASK_L4 (4<<28)
37#define KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
38#define KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
39#define KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
Michael Chana4636962009-06-08 18:14:43 -070040
41 u32 kwqe_info0;
42 u32 kwqe_info1;
43 u32 kwqe_info2;
44 u32 kwqe_info3;
45 u32 kwqe_info4;
46 u32 kwqe_info5;
47 u32 kwqe_info6;
48};
49
50struct kwqe_16 {
51 u32 kwqe_info0;
52 u32 kwqe_info1;
53 u32 kwqe_info2;
54 u32 kwqe_info3;
55};
56
57struct kcqe {
58 u32 kcqe_info0;
59 u32 kcqe_info1;
60 u32 kcqe_info2;
61 u32 kcqe_info3;
62 u32 kcqe_info4;
63 u32 kcqe_info5;
64 u32 kcqe_info6;
65 u32 kcqe_op_flag;
66 #define KCQE_RAMROD_COMPLETION (0x1<<27) /* Everest */
67 #define KCQE_FLAGS_LAYER_MASK (0x7<<28)
68 #define KCQE_FLAGS_LAYER_MASK_MISC (0<<28)
69 #define KCQE_FLAGS_LAYER_MASK_L2 (2<<28)
70 #define KCQE_FLAGS_LAYER_MASK_L3 (3<<28)
71 #define KCQE_FLAGS_LAYER_MASK_L4 (4<<28)
72 #define KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
73 #define KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
Michael Chane1928c82010-12-23 07:43:04 +000074 #define KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
Michael Chana4636962009-06-08 18:14:43 -070075 #define KCQE_FLAGS_NEXT (1<<31)
76 #define KCQE_FLAGS_OPCODE_MASK (0xff<<16)
77 #define KCQE_FLAGS_OPCODE_SHIFT (16)
78 #define KCQE_OPCODE(op) \
79 (((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
80};
81
82#define MAX_CNIC_CTL_DATA 64
83#define MAX_DRV_CTL_DATA 64
84
85#define CNIC_CTL_STOP_CMD 1
86#define CNIC_CTL_START_CMD 2
87#define CNIC_CTL_COMPLETION_CMD 3
Dmitry Kravkovfab0dc82011-03-31 17:04:22 -070088#define CNIC_CTL_STOP_ISCSI_CMD 4
Michael Chana4636962009-06-08 18:14:43 -070089
90#define DRV_CTL_IO_WR_CMD 0x101
91#define DRV_CTL_IO_RD_CMD 0x102
92#define DRV_CTL_CTX_WR_CMD 0x103
93#define DRV_CTL_CTXTBL_WR_CMD 0x104
Dmitry Kravkovc2bff632010-10-06 03:33:18 +000094#define DRV_CTL_RET_L5_SPQ_CREDIT_CMD 0x105
Michael Chan993ac7b2009-10-10 13:46:56 +000095#define DRV_CTL_START_L2_CMD 0x106
96#define DRV_CTL_STOP_L2_CMD 0x107
Dmitry Kravkovc2bff632010-10-06 03:33:18 +000097#define DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c
Dmitry Kravkovfab0dc82011-03-31 17:04:22 -070098#define DRV_CTL_ISCSI_STOPPED_CMD 0x10d
Michael Chana4636962009-06-08 18:14:43 -070099
100struct cnic_ctl_completion {
101 u32 cid;
102};
103
Michael Chana4636962009-06-08 18:14:43 -0700104struct cnic_ctl_info {
105 int cmd;
106 union {
107 struct cnic_ctl_completion comp;
108 char bytes[MAX_CNIC_CTL_DATA];
109 } data;
110};
111
Dmitry Kravkovc2bff632010-10-06 03:33:18 +0000112struct drv_ctl_spq_credit {
113 u32 credit_count;
114};
115
Michael Chana4636962009-06-08 18:14:43 -0700116struct drv_ctl_io {
117 u32 cid_addr;
118 u32 offset;
119 u32 data;
120 dma_addr_t dma_addr;
121};
122
Michael Chan993ac7b2009-10-10 13:46:56 +0000123struct drv_ctl_l2_ring {
124 u32 client_id;
125 u32 cid;
126};
127
Michael Chana4636962009-06-08 18:14:43 -0700128struct drv_ctl_info {
129 int cmd;
130 union {
Dmitry Kravkovc2bff632010-10-06 03:33:18 +0000131 struct drv_ctl_spq_credit credit;
Michael Chana4636962009-06-08 18:14:43 -0700132 struct drv_ctl_io io;
Michael Chan993ac7b2009-10-10 13:46:56 +0000133 struct drv_ctl_l2_ring ring;
Michael Chana4636962009-06-08 18:14:43 -0700134 char bytes[MAX_DRV_CTL_DATA];
135 } data;
136};
137
138struct cnic_ops {
139 struct module *cnic_owner;
140 /* Calls to these functions are protected by RCU. When
141 * unregistering, we wait for any calls to complete before
142 * continuing.
143 */
144 int (*cnic_handler)(void *, void *);
145 int (*cnic_ctl)(void *, struct cnic_ctl_info *);
146};
147
148#define MAX_CNIC_VEC 8
149
150struct cnic_irq {
151 unsigned int vector;
152 void *status_blk;
153 u32 status_blk_num;
Dmitry Kravkov523224a2010-10-06 03:23:26 +0000154 u32 status_blk_num2;
Michael Chana4636962009-06-08 18:14:43 -0700155 u32 irq_flags;
156#define CNIC_IRQ_FL_MSIX 0x00000001
157};
158
159struct cnic_eth_dev {
160 struct module *drv_owner;
161 u32 drv_state;
162#define CNIC_DRV_STATE_REGD 0x00000001
163#define CNIC_DRV_STATE_USING_MSIX 0x00000002
Vladislav Zolotarov2ba45142011-01-31 14:39:17 +0000164#define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004
165#define CNIC_DRV_STATE_NO_ISCSI 0x00000008
166#define CNIC_DRV_STATE_NO_FCOE 0x00000010
Michael Chana4636962009-06-08 18:14:43 -0700167 u32 chip_id;
168 u32 max_kwqe_pending;
169 struct pci_dev *pdev;
170 void __iomem *io_base;
Michael Chan993ac7b2009-10-10 13:46:56 +0000171 void __iomem *io_base2;
Dmitry Kravkov523224a2010-10-06 03:23:26 +0000172 void *iro_arr;
Michael Chana4636962009-06-08 18:14:43 -0700173
174 u32 ctx_tbl_offset;
175 u32 ctx_tbl_len;
176 int ctx_blk_size;
177 u32 starting_cid;
178 u32 max_iscsi_conn;
179 u32 max_fcoe_conn;
180 u32 max_rdma_conn;
Dmitry Kravkovc2bff632010-10-06 03:33:18 +0000181 u32 fcoe_init_cid;
182 u16 iscsi_l2_client_id;
183 u16 iscsi_l2_cid;
Vladislav Zolotarov2ba45142011-01-31 14:39:17 +0000184 u8 iscsi_mac[ETH_ALEN];
Michael Chana4636962009-06-08 18:14:43 -0700185
186 int num_irq;
187 struct cnic_irq irq_arr[MAX_CNIC_VEC];
188 int (*drv_register_cnic)(struct net_device *,
189 struct cnic_ops *, void *);
190 int (*drv_unregister_cnic)(struct net_device *);
191 int (*drv_submit_kwqes_32)(struct net_device *,
192 struct kwqe *[], u32);
193 int (*drv_submit_kwqes_16)(struct net_device *,
194 struct kwqe_16 *[], u32);
195 int (*drv_ctl)(struct net_device *, struct drv_ctl_info *);
196 unsigned long reserved1[2];
197};
198
199struct cnic_sockaddr {
200 union {
201 struct sockaddr_in v4;
202 struct sockaddr_in6 v6;
203 } local;
204 union {
205 struct sockaddr_in v4;
206 struct sockaddr_in6 v6;
207 } remote;
208};
209
210struct cnic_sock {
211 struct cnic_dev *dev;
212 void *context;
213 u32 src_ip[4];
214 u32 dst_ip[4];
215 u16 src_port;
216 u16 dst_port;
217 u16 vlan_id;
218 unsigned char old_ha[6];
219 unsigned char ha[6];
220 u32 mtu;
221 u32 cid;
222 u32 l5_cid;
223 u32 pg_cid;
224 int ulp_type;
225
226 u32 ka_timeout;
227 u32 ka_interval;
228 u8 ka_max_probe_count;
229 u8 tos;
230 u8 ttl;
231 u8 snd_seq_scale;
232 u32 rcv_buf;
233 u32 snd_buf;
234 u32 seed;
235
236 unsigned long tcp_flags;
237#define SK_TCP_NO_DELAY_ACK 0x1
238#define SK_TCP_KEEP_ALIVE 0x2
239#define SK_TCP_NAGLE 0x4
240#define SK_TCP_TIMESTAMP 0x8
241#define SK_TCP_SACK 0x10
242#define SK_TCP_SEG_SCALING 0x20
243 unsigned long flags;
244#define SK_F_INUSE 0
245#define SK_F_OFFLD_COMPLETE 1
246#define SK_F_OFFLD_SCHED 2
247#define SK_F_PG_OFFLD_COMPLETE 3
248#define SK_F_CONNECT_START 4
249#define SK_F_IPV6 5
250#define SK_F_CLOSING 7
251
252 atomic_t ref_count;
253 u32 state;
254 struct kwqe kwqe1;
255 struct kwqe kwqe2;
256 struct kwqe kwqe3;
257};
258
259struct cnic_dev {
260 struct net_device *netdev;
261 struct pci_dev *pcidev;
262 void __iomem *regview;
263 struct list_head list;
264
265 int (*register_device)(struct cnic_dev *dev, int ulp_type,
266 void *ulp_ctx);
267 int (*unregister_device)(struct cnic_dev *dev, int ulp_type);
268 int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[],
269 u32 num_wqes);
270 int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[],
271 u32 num_wqes);
272
273 int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **,
274 void *);
275 int (*cm_destroy)(struct cnic_sock *);
276 int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *);
277 int (*cm_abort)(struct cnic_sock *);
278 int (*cm_close)(struct cnic_sock *);
279 struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type);
280 int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type,
281 char *data, u16 data_size);
282 unsigned long flags;
283#define CNIC_F_CNIC_UP 1
284#define CNIC_F_BNX2_CLASS 3
285#define CNIC_F_BNX2X_CLASS 4
286 atomic_t ref_count;
287 u8 mac_addr[6];
288
289 int max_iscsi_conn;
290 int max_fcoe_conn;
291 int max_rdma_conn;
292
293 void *cnic_priv;
294};
295
296#define CNIC_WR(dev, off, val) writel(val, dev->regview + off)
297#define CNIC_WR16(dev, off, val) writew(val, dev->regview + off)
298#define CNIC_WR8(dev, off, val) writeb(val, dev->regview + off)
299#define CNIC_RD(dev, off) readl(dev->regview + off)
300#define CNIC_RD16(dev, off) readw(dev->regview + off)
301
302struct cnic_ulp_ops {
303 /* Calls to these functions are protected by RCU. When
304 * unregistering, we wait for any calls to complete before
305 * continuing.
306 */
307
308 void (*cnic_init)(struct cnic_dev *dev);
309 void (*cnic_exit)(struct cnic_dev *dev);
310 void (*cnic_start)(void *ulp_ctx);
311 void (*cnic_stop)(void *ulp_ctx);
312 void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[],
313 u32 num_cqes);
314 void (*indicate_netevent)(void *ulp_ctx, unsigned long event);
315 void (*cm_connect_complete)(struct cnic_sock *);
316 void (*cm_close_complete)(struct cnic_sock *);
317 void (*cm_abort_complete)(struct cnic_sock *);
318 void (*cm_remote_close)(struct cnic_sock *);
319 void (*cm_remote_abort)(struct cnic_sock *);
Michael Chan939b82e2010-12-23 07:42:58 +0000320 int (*iscsi_nl_send_msg)(void *ulp_ctx, u32 msg_type,
Michael Chana4636962009-06-08 18:14:43 -0700321 char *data, u16 data_size);
322 struct module *owner;
Michael Chan7fc1ece2009-08-14 15:49:47 +0000323 atomic_t ref_count;
Michael Chana4636962009-06-08 18:14:43 -0700324};
325
326extern int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);
327
328extern int cnic_unregister_driver(int ulp_type);
329
Michael Chane2ee3612009-06-13 17:43:02 -0700330extern struct cnic_eth_dev *bnx2_cnic_probe(struct net_device *dev);
Michael Chan993ac7b2009-10-10 13:46:56 +0000331extern struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev);
Michael Chane2ee3612009-06-13 17:43:02 -0700332
Michael Chana4636962009-06-08 18:14:43 -0700333#endif