Paul Walmsley | 21325b25 | 2012-10-21 01:01:12 -0600 | [diff] [blame] | 1 | /* |
| 2 | * OMAP2+ common Clock Management (CM) IP block functions |
| 3 | * |
| 4 | * Copyright (C) 2012 Texas Instruments, Inc. |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 5 | * Paul Walmsley |
Paul Walmsley | 21325b25 | 2012-10-21 01:01:12 -0600 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | * |
| 11 | * XXX This code should eventually be moved to a CM driver. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/init.h> |
Peter Ujfalusi | cc4b1e2 | 2012-11-12 16:17:08 +0100 | [diff] [blame] | 16 | #include <linux/errno.h> |
Tero Kristo | 4794208 | 2014-05-11 19:41:50 -0600 | [diff] [blame] | 17 | #include <linux/bug.h> |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 18 | #include <linux/of.h> |
| 19 | #include <linux/of_address.h> |
Paul Walmsley | 21325b25 | 2012-10-21 01:01:12 -0600 | [diff] [blame] | 20 | |
| 21 | #include "cm2xxx.h" |
| 22 | #include "cm3xxx.h" |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 23 | #include "cm33xx.h" |
Paul Walmsley | 21325b25 | 2012-10-21 01:01:12 -0600 | [diff] [blame] | 24 | #include "cm44xx.h" |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 25 | #include "clock.h" |
Paul Walmsley | 21325b25 | 2012-10-21 01:01:12 -0600 | [diff] [blame] | 26 | |
| 27 | /* |
| 28 | * cm_ll_data: function pointers to SoC-specific implementations of |
| 29 | * common CM functions |
| 30 | */ |
| 31 | static struct cm_ll_data null_cm_ll_data; |
| 32 | static struct cm_ll_data *cm_ll_data = &null_cm_ll_data; |
| 33 | |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 34 | /* cm_base: base virtual address of the CM IP block */ |
Tero Kristo | 9012933 | 2017-05-31 18:00:00 +0300 | [diff] [blame] | 35 | struct omap_domain_base cm_base; |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 36 | |
| 37 | /* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */ |
Tero Kristo | 9012933 | 2017-05-31 18:00:00 +0300 | [diff] [blame] | 38 | struct omap_domain_base cm2_base; |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 39 | |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 40 | #define CM_NO_CLOCKS 0x1 |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 41 | #define CM_SINGLE_INSTANCE 0x2 |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 42 | |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 43 | /** |
| 44 | * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use) |
| 45 | * @cm: CM base virtual address |
| 46 | * @cm2: CM2 base virtual address (if present on the booted SoC) |
| 47 | * |
| 48 | * XXX Will be replaced when the PRM/CM drivers are completed. |
| 49 | */ |
| 50 | void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2) |
| 51 | { |
Tero Kristo | 9012933 | 2017-05-31 18:00:00 +0300 | [diff] [blame] | 52 | cm_base.va = cm; |
| 53 | cm2_base.va = cm2; |
Paul Walmsley | d9a16f9 | 2012-10-29 20:57:39 -0600 | [diff] [blame] | 54 | } |
| 55 | |
Paul Walmsley | 21325b25 | 2012-10-21 01:01:12 -0600 | [diff] [blame] | 56 | /** |
Paul Walmsley | c4ceedc | 2012-10-29 20:56:29 -0600 | [diff] [blame] | 57 | * cm_split_idlest_reg - split CM_IDLEST reg addr into its components |
| 58 | * @idlest_reg: CM_IDLEST* virtual address |
| 59 | * @prcm_inst: pointer to an s16 to return the PRCM instance offset |
| 60 | * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID |
| 61 | * |
| 62 | * Given an absolute CM_IDLEST register address @idlest_reg, passes |
| 63 | * the PRCM instance offset and IDLEST register ID back to the caller |
| 64 | * via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error, |
| 65 | * or 0 upon success. XXX This function is only needed until absolute |
| 66 | * register addresses are removed from the OMAP struct clk records. |
| 67 | */ |
Tero Kristo | 6c0afb5 | 2017-02-09 11:24:37 +0200 | [diff] [blame] | 68 | int cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, s16 *prcm_inst, |
Paul Walmsley | c4ceedc | 2012-10-29 20:56:29 -0600 | [diff] [blame] | 69 | u8 *idlest_reg_id) |
| 70 | { |
| 71 | if (!cm_ll_data->split_idlest_reg) { |
| 72 | WARN_ONCE(1, "cm: %s: no low-level function defined\n", |
| 73 | __func__); |
| 74 | return -EINVAL; |
| 75 | } |
| 76 | |
| 77 | return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst, |
| 78 | idlest_reg_id); |
| 79 | } |
| 80 | |
| 81 | /** |
Tero Kristo | 021b6ff | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 82 | * omap_cm_wait_module_ready - wait for a module to leave idle or standby |
| 83 | * @part: PRCM partition |
Paul Walmsley | c4ceedc | 2012-10-29 20:56:29 -0600 | [diff] [blame] | 84 | * @prcm_mod: PRCM module offset |
Tero Kristo | 021b6ff | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 85 | * @idlest_reg: CM_IDLESTx register |
Paul Walmsley | c4ceedc | 2012-10-29 20:56:29 -0600 | [diff] [blame] | 86 | * @idlest_shift: shift of the bit in the CM_IDLEST* register to check |
| 87 | * |
| 88 | * Wait for the PRCM to indicate that the module identified by |
| 89 | * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon |
| 90 | * success, -EBUSY if the module doesn't enable in time, or -EINVAL if |
| 91 | * no per-SoC wait_module_ready() function pointer has been registered |
| 92 | * or if the idlest register is unknown on the SoC. |
| 93 | */ |
Tero Kristo | 021b6ff | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 94 | int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg, |
| 95 | u8 idlest_shift) |
Paul Walmsley | c4ceedc | 2012-10-29 20:56:29 -0600 | [diff] [blame] | 96 | { |
| 97 | if (!cm_ll_data->wait_module_ready) { |
| 98 | WARN_ONCE(1, "cm: %s: no low-level function defined\n", |
| 99 | __func__); |
| 100 | return -EINVAL; |
| 101 | } |
| 102 | |
Tero Kristo | 021b6ff | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 103 | return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg, |
| 104 | idlest_shift); |
Paul Walmsley | c4ceedc | 2012-10-29 20:56:29 -0600 | [diff] [blame] | 105 | } |
| 106 | |
| 107 | /** |
Tero Kristo | a8ae5af | 2014-10-27 08:39:23 -0700 | [diff] [blame] | 108 | * omap_cm_wait_module_idle - wait for a module to enter idle or standby |
| 109 | * @part: PRCM partition |
| 110 | * @prcm_mod: PRCM module offset |
| 111 | * @idlest_reg: CM_IDLESTx register |
| 112 | * @idlest_shift: shift of the bit in the CM_IDLEST* register to check |
| 113 | * |
| 114 | * Wait for the PRCM to indicate that the module identified by |
| 115 | * (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked. Return |
| 116 | * 0 upon success, -EBUSY if the module doesn't enable in time, or |
| 117 | * -EINVAL if no per-SoC wait_module_idle() function pointer has been |
| 118 | * registered or if the idlest register is unknown on the SoC. |
| 119 | */ |
| 120 | int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, |
| 121 | u8 idlest_shift) |
| 122 | { |
| 123 | if (!cm_ll_data->wait_module_idle) { |
| 124 | WARN_ONCE(1, "cm: %s: no low-level function defined\n", |
| 125 | __func__); |
| 126 | return -EINVAL; |
| 127 | } |
| 128 | |
| 129 | return cm_ll_data->wait_module_idle(part, prcm_mod, idlest_reg, |
| 130 | idlest_shift); |
| 131 | } |
| 132 | |
| 133 | /** |
Tero Kristo | 128603f | 2014-10-27 08:39:24 -0700 | [diff] [blame] | 134 | * omap_cm_module_enable - enable a module |
| 135 | * @mode: target mode for the module |
| 136 | * @part: PRCM partition |
| 137 | * @inst: PRCM instance |
| 138 | * @clkctrl_offs: CM_CLKCTRL register offset for the module |
| 139 | * |
| 140 | * Enables clocks for a module identified by (@part, @inst, @clkctrl_offs) |
| 141 | * making its IO space accessible. Return 0 upon success, -EINVAL if no |
| 142 | * per-SoC module_enable() function pointer has been registered. |
| 143 | */ |
| 144 | int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs) |
| 145 | { |
| 146 | if (!cm_ll_data->module_enable) { |
| 147 | WARN_ONCE(1, "cm: %s: no low-level function defined\n", |
| 148 | __func__); |
| 149 | return -EINVAL; |
| 150 | } |
| 151 | |
| 152 | cm_ll_data->module_enable(mode, part, inst, clkctrl_offs); |
| 153 | return 0; |
| 154 | } |
| 155 | |
| 156 | /** |
| 157 | * omap_cm_module_disable - disable a module |
| 158 | * @part: PRCM partition |
| 159 | * @inst: PRCM instance |
| 160 | * @clkctrl_offs: CM_CLKCTRL register offset for the module |
| 161 | * |
| 162 | * Disables clocks for a module identified by (@part, @inst, @clkctrl_offs) |
| 163 | * makings its IO space inaccessible. Return 0 upon success, -EINVAL if |
| 164 | * no per-SoC module_disable() function pointer has been registered. |
| 165 | */ |
| 166 | int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs) |
| 167 | { |
| 168 | if (!cm_ll_data->module_disable) { |
| 169 | WARN_ONCE(1, "cm: %s: no low-level function defined\n", |
| 170 | __func__); |
| 171 | return -EINVAL; |
| 172 | } |
| 173 | |
| 174 | cm_ll_data->module_disable(part, inst, clkctrl_offs); |
| 175 | return 0; |
| 176 | } |
| 177 | |
| 178 | /** |
Paul Walmsley | 21325b25 | 2012-10-21 01:01:12 -0600 | [diff] [blame] | 179 | * cm_register - register per-SoC low-level data with the CM |
| 180 | * @cld: low-level per-SoC OMAP CM data & function pointers to register |
| 181 | * |
| 182 | * Register per-SoC low-level OMAP CM data and function pointers with |
| 183 | * the OMAP CM common interface. The caller must keep the data |
| 184 | * pointed to by @cld valid until it calls cm_unregister() and |
| 185 | * it returns successfully. Returns 0 upon success, -EINVAL if @cld |
| 186 | * is NULL, or -EEXIST if cm_register() has already been called |
| 187 | * without an intervening cm_unregister(). |
| 188 | */ |
| 189 | int cm_register(struct cm_ll_data *cld) |
| 190 | { |
| 191 | if (!cld) |
| 192 | return -EINVAL; |
| 193 | |
| 194 | if (cm_ll_data != &null_cm_ll_data) |
| 195 | return -EEXIST; |
| 196 | |
| 197 | cm_ll_data = cld; |
| 198 | |
| 199 | return 0; |
| 200 | } |
| 201 | |
| 202 | /** |
| 203 | * cm_unregister - unregister per-SoC low-level data & function pointers |
| 204 | * @cld: low-level per-SoC OMAP CM data & function pointers to unregister |
| 205 | * |
| 206 | * Unregister per-SoC low-level OMAP CM data and function pointers |
| 207 | * that were previously registered with cm_register(). The |
| 208 | * caller may not destroy any of the data pointed to by @cld until |
| 209 | * this function returns successfully. Returns 0 upon success, or |
| 210 | * -EINVAL if @cld is NULL or if @cld does not match the struct |
| 211 | * cm_ll_data * previously registered by cm_register(). |
| 212 | */ |
| 213 | int cm_unregister(struct cm_ll_data *cld) |
| 214 | { |
| 215 | if (!cld || cm_ll_data != cld) |
| 216 | return -EINVAL; |
| 217 | |
| 218 | cm_ll_data = &null_cm_ll_data; |
| 219 | |
| 220 | return 0; |
| 221 | } |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 222 | |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 223 | #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ |
| 224 | defined(CONFIG_SOC_DRA7XX) |
| 225 | static struct omap_prcm_init_data cm_data __initdata = { |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 226 | .index = TI_CLKM_CM, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 227 | .init = omap4_cm_init, |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 228 | }; |
| 229 | |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 230 | static struct omap_prcm_init_data cm2_data __initdata = { |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 231 | .index = TI_CLKM_CM2, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 232 | .init = omap4_cm_init, |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 233 | }; |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 234 | #endif |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 235 | |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 236 | #ifdef CONFIG_ARCH_OMAP2 |
| 237 | static struct omap_prcm_init_data omap2_prcm_data __initdata = { |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 238 | .index = TI_CLKM_CM, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 239 | .init = omap2xxx_cm_init, |
| 240 | .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE, |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 241 | }; |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 242 | #endif |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 243 | |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 244 | #ifdef CONFIG_ARCH_OMAP3 |
| 245 | static struct omap_prcm_init_data omap3_cm_data __initdata = { |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 246 | .index = TI_CLKM_CM, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 247 | .init = omap3xxx_cm_init, |
| 248 | .flags = CM_SINGLE_INSTANCE, |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 249 | |
| 250 | /* |
| 251 | * IVA2 offset is a negative value, must offset the cm_base address |
| 252 | * by this to get it to positive side on the iomap |
| 253 | */ |
| 254 | .offset = -OMAP3430_IVA2_MOD, |
| 255 | }; |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 256 | #endif |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 257 | |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 258 | #if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX) |
| 259 | static struct omap_prcm_init_data am3_prcm_data __initdata = { |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 260 | .index = TI_CLKM_CM, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 261 | .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE, |
| 262 | .init = am33xx_cm_init, |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 263 | }; |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 264 | #endif |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 265 | |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 266 | #ifdef CONFIG_SOC_AM43XX |
| 267 | static struct omap_prcm_init_data am4_prcm_data __initdata = { |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 268 | .index = TI_CLKM_CM, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 269 | .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE, |
| 270 | .init = omap4_cm_init, |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 271 | }; |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 272 | #endif |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 273 | |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 274 | static const struct of_device_id omap_cm_dt_match_table[] __initconst = { |
| 275 | #ifdef CONFIG_ARCH_OMAP2 |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 276 | { .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data }, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 277 | #endif |
| 278 | #ifdef CONFIG_ARCH_OMAP3 |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 279 | { .compatible = "ti,omap3-cm", .data = &omap3_cm_data }, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 280 | #endif |
| 281 | #ifdef CONFIG_ARCH_OMAP4 |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 282 | { .compatible = "ti,omap4-cm1", .data = &cm_data }, |
| 283 | { .compatible = "ti,omap4-cm2", .data = &cm2_data }, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 284 | #endif |
| 285 | #ifdef CONFIG_SOC_OMAP5 |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 286 | { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data }, |
| 287 | { .compatible = "ti,omap5-cm-core", .data = &cm2_data }, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 288 | #endif |
| 289 | #ifdef CONFIG_SOC_DRA7XX |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 290 | { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data }, |
| 291 | { .compatible = "ti,dra7-cm-core", .data = &cm2_data }, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 292 | #endif |
| 293 | #ifdef CONFIG_SOC_AM33XX |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 294 | { .compatible = "ti,am3-prcm", .data = &am3_prcm_data }, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 295 | #endif |
| 296 | #ifdef CONFIG_SOC_AM43XX |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 297 | { .compatible = "ti,am4-prcm", .data = &am4_prcm_data }, |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 298 | #endif |
| 299 | #ifdef CONFIG_SOC_TI81XX |
| 300 | { .compatible = "ti,dm814-prcm", .data = &am3_prcm_data }, |
| 301 | { .compatible = "ti,dm816-prcm", .data = &am3_prcm_data }, |
| 302 | #endif |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 303 | { } |
| 304 | }; |
| 305 | |
| 306 | /** |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 307 | * omap2_cm_base_init - initialize iomappings for the CM drivers |
| 308 | * |
| 309 | * Detects and initializes the iomappings for the CM driver, based |
| 310 | * on the DT data. Returns 0 in success, negative error value |
| 311 | * otherwise. |
| 312 | */ |
| 313 | int __init omap2_cm_base_init(void) |
| 314 | { |
| 315 | struct device_node *np; |
| 316 | const struct of_device_id *match; |
| 317 | struct omap_prcm_init_data *data; |
Tero Kristo | 9012933 | 2017-05-31 18:00:00 +0300 | [diff] [blame] | 318 | struct resource res; |
| 319 | int ret; |
| 320 | struct omap_domain_base *mem = NULL; |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 321 | |
| 322 | for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) { |
| 323 | data = (struct omap_prcm_init_data *)match->data; |
| 324 | |
Tero Kristo | 9012933 | 2017-05-31 18:00:00 +0300 | [diff] [blame] | 325 | ret = of_address_to_resource(np, 0, &res); |
| 326 | if (ret) |
| 327 | return ret; |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 328 | |
| 329 | if (data->index == TI_CLKM_CM) |
Tero Kristo | 9012933 | 2017-05-31 18:00:00 +0300 | [diff] [blame] | 330 | mem = &cm_base; |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 331 | |
| 332 | if (data->index == TI_CLKM_CM2) |
Tero Kristo | 9012933 | 2017-05-31 18:00:00 +0300 | [diff] [blame] | 333 | mem = &cm2_base; |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 334 | |
Tero Kristo | 9012933 | 2017-05-31 18:00:00 +0300 | [diff] [blame] | 335 | data->mem = ioremap(res.start, resource_size(&res)); |
| 336 | |
| 337 | if (mem) { |
| 338 | mem->pa = res.start + data->offset; |
| 339 | mem->va = data->mem + data->offset; |
| 340 | } |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 341 | |
| 342 | data->np = np; |
| 343 | |
| 344 | if (data->init && (data->flags & CM_SINGLE_INSTANCE || |
Tero Kristo | 9012933 | 2017-05-31 18:00:00 +0300 | [diff] [blame] | 345 | (cm_base.va && cm2_base.va))) |
Tero Kristo | 425dc8b | 2014-11-21 15:51:37 +0200 | [diff] [blame] | 346 | data->init(data); |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 347 | } |
| 348 | |
| 349 | return 0; |
| 350 | } |
| 351 | |
| 352 | /** |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 353 | * omap_cm_init - low level init for the CM drivers |
| 354 | * |
| 355 | * Initializes the low level clock infrastructure for CM drivers. |
| 356 | * Returns 0 in success, negative error value in failure. |
| 357 | */ |
| 358 | int __init omap_cm_init(void) |
| 359 | { |
| 360 | struct device_node *np; |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 361 | const struct of_device_id *match; |
| 362 | const struct omap_prcm_init_data *data; |
| 363 | int ret; |
| 364 | |
| 365 | for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) { |
| 366 | data = match->data; |
| 367 | |
Tero Kristo | 5970ca2 | 2014-11-11 16:51:52 +0200 | [diff] [blame] | 368 | if (data->flags & CM_NO_CLOCKS) |
| 369 | continue; |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 370 | |
Tero Kristo | 80cbb22 | 2015-02-06 16:00:32 +0200 | [diff] [blame] | 371 | ret = omap2_clk_provider_init(np, data->index, NULL, data->mem); |
Tero Kristo | fe87414 | 2014-03-12 18:33:45 +0200 | [diff] [blame] | 372 | if (ret) |
| 373 | return ret; |
| 374 | } |
| 375 | |
| 376 | return 0; |
| 377 | } |