blob: a023abfab4bd8d5e7cfc1387f304ce92fd111bd2 [file] [log] [blame]
Shawn Guo95ceafd2012-09-06 07:09:11 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
Viresh Kumar748c8762014-08-28 11:22:24 +05304 * Copyright (C) 2014 Linaro.
5 * Viresh Kumar <viresh.kumar@linaro.org>
6 *
Viresh Kumarbbcf0712014-09-09 19:58:03 +05307 * The OPP code in function set_target() is reused from
Shawn Guo95ceafd2012-09-06 07:09:11 +00008 * drivers/cpufreq/omap-cpufreq.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16
17#include <linux/clk.h>
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +010018#include <linux/cpu.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040019#include <linux/cpu_cooling.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000020#include <linux/cpufreq.h>
Thomas Petazzoni34e5a522014-10-19 11:30:28 +020021#include <linux/cpufreq-dt.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040022#include <linux/cpumask.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000023#include <linux/err.h>
24#include <linux/module.h>
25#include <linux/of.h>
Nishanth Menone4db1c72013-09-19 16:03:52 -050026#include <linux/pm_opp.h>
Shawn Guo5553f9e2013-01-30 14:27:49 +000027#include <linux/platform_device.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000028#include <linux/regulator/consumer.h>
29#include <linux/slab.h>
Eduardo Valentin77cff592013-07-15 09:09:14 -040030#include <linux/thermal.h>
Shawn Guo95ceafd2012-09-06 07:09:11 +000031
Viresh Kumard2f31f12014-08-28 11:22:28 +053032struct private_data {
33 struct device *cpu_dev;
34 struct regulator *cpu_reg;
35 struct thermal_cooling_device *cdev;
36 unsigned int voltage_tolerance; /* in percentage */
37};
Shawn Guo95ceafd2012-09-06 07:09:11 +000038
Viresh Kumarbbcf0712014-09-09 19:58:03 +053039static int set_target(struct cpufreq_policy *policy, unsigned int index)
Shawn Guo95ceafd2012-09-06 07:09:11 +000040{
Nishanth Menon47d43ba2013-09-19 16:03:51 -050041 struct dev_pm_opp *opp;
Viresh Kumard2f31f12014-08-28 11:22:28 +053042 struct cpufreq_frequency_table *freq_table = policy->freq_table;
43 struct clk *cpu_clk = policy->clk;
44 struct private_data *priv = policy->driver_data;
45 struct device *cpu_dev = priv->cpu_dev;
46 struct regulator *cpu_reg = priv->cpu_reg;
jhbird.choi@samsung.com5df60552013-03-18 08:09:42 +000047 unsigned long volt = 0, volt_old = 0, tol = 0;
Viresh Kumard4019f02013-08-14 19:38:24 +053048 unsigned int old_freq, new_freq;
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010049 long freq_Hz, freq_exact;
Shawn Guo95ceafd2012-09-06 07:09:11 +000050 int ret;
51
Shawn Guo95ceafd2012-09-06 07:09:11 +000052 freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
Paul Walmsley2209b0c2013-11-25 18:01:18 -080053 if (freq_Hz <= 0)
Shawn Guo95ceafd2012-09-06 07:09:11 +000054 freq_Hz = freq_table[index].frequency * 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000055
Viresh Kumard4019f02013-08-14 19:38:24 +053056 freq_exact = freq_Hz;
57 new_freq = freq_Hz / 1000;
58 old_freq = clk_get_rate(cpu_clk) / 1000;
Shawn Guo95ceafd2012-09-06 07:09:11 +000059
Mark Brown4a511de2013-08-13 14:58:24 +020060 if (!IS_ERR(cpu_reg)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000061 rcu_read_lock();
Nishanth Menon5d4879c2013-09-19 16:03:50 -050062 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &freq_Hz);
Shawn Guo95ceafd2012-09-06 07:09:11 +000063 if (IS_ERR(opp)) {
Nishanth Menon78e8eb82013-01-18 19:52:33 +000064 rcu_read_unlock();
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053065 dev_err(cpu_dev, "failed to find OPP for %ld\n",
66 freq_Hz);
Viresh Kumard4019f02013-08-14 19:38:24 +053067 return PTR_ERR(opp);
Shawn Guo95ceafd2012-09-06 07:09:11 +000068 }
Nishanth Menon5d4879c2013-09-19 16:03:50 -050069 volt = dev_pm_opp_get_voltage(opp);
Nishanth Menon78e8eb82013-01-18 19:52:33 +000070 rcu_read_unlock();
Viresh Kumard2f31f12014-08-28 11:22:28 +053071 tol = volt * priv->voltage_tolerance / 100;
Shawn Guo95ceafd2012-09-06 07:09:11 +000072 volt_old = regulator_get_voltage(cpu_reg);
73 }
74
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053075 dev_dbg(cpu_dev, "%u MHz, %ld mV --> %u MHz, %ld mV\n",
76 old_freq / 1000, volt_old ? volt_old / 1000 : -1,
77 new_freq / 1000, volt ? volt / 1000 : -1);
Shawn Guo95ceafd2012-09-06 07:09:11 +000078
79 /* scaling up? scale voltage before frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053080 if (!IS_ERR(cpu_reg) && new_freq > old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000081 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
82 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053083 dev_err(cpu_dev, "failed to scale voltage up: %d\n",
84 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +053085 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000086 }
87 }
88
Guennadi Liakhovetski0ca68432013-02-25 18:22:37 +010089 ret = clk_set_rate(cpu_clk, freq_exact);
Shawn Guo95ceafd2012-09-06 07:09:11 +000090 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +053091 dev_err(cpu_dev, "failed to set clock rate: %d\n", ret);
Mark Brown4a511de2013-08-13 14:58:24 +020092 if (!IS_ERR(cpu_reg))
Shawn Guo95ceafd2012-09-06 07:09:11 +000093 regulator_set_voltage_tol(cpu_reg, volt_old, tol);
Viresh Kumard4019f02013-08-14 19:38:24 +053094 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +000095 }
96
97 /* scaling down? scale voltage after frequency */
Viresh Kumard4019f02013-08-14 19:38:24 +053098 if (!IS_ERR(cpu_reg) && new_freq < old_freq) {
Shawn Guo95ceafd2012-09-06 07:09:11 +000099 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
100 if (ret) {
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530101 dev_err(cpu_dev, "failed to scale voltage down: %d\n",
102 ret);
Viresh Kumard4019f02013-08-14 19:38:24 +0530103 clk_set_rate(cpu_clk, old_freq * 1000);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000104 }
105 }
106
Viresh Kumarfd143b42013-04-01 12:57:44 +0000107 return ret;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000108}
109
Viresh Kumar95b61052014-08-28 11:22:30 +0530110static int allocate_resources(int cpu, struct device **cdev,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530111 struct regulator **creg, struct clk **cclk)
Shawn Guo95ceafd2012-09-06 07:09:11 +0000112{
Viresh Kumard2f31f12014-08-28 11:22:28 +0530113 struct device *cpu_dev;
114 struct regulator *cpu_reg;
115 struct clk *cpu_clk;
116 int ret = 0;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530117 char *reg_cpu0 = "cpu0", *reg_cpu = "cpu", *reg;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000118
Viresh Kumar95b61052014-08-28 11:22:30 +0530119 cpu_dev = get_cpu_device(cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100120 if (!cpu_dev) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530121 pr_err("failed to get cpu%d device\n", cpu);
Sudeep KarkadaNageshae1825b22013-09-10 18:59:46 +0100122 return -ENODEV;
123 }
Paolo Pisatif5c3ef22013-03-28 09:24:29 +0000124
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530125 /* Try "cpu0" for older DTs */
Viresh Kumar95b61052014-08-28 11:22:30 +0530126 if (!cpu)
127 reg = reg_cpu0;
128 else
129 reg = reg_cpu;
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530130
131try_again:
132 cpu_reg = regulator_get_optional(cpu_dev, reg);
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000133 if (IS_ERR(cpu_reg)) {
134 /*
Viresh Kumar95b61052014-08-28 11:22:30 +0530135 * If cpu's regulator supply node is present, but regulator is
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000136 * not yet registered, we should try defering probe.
137 */
138 if (PTR_ERR(cpu_reg) == -EPROBE_DEFER) {
Viresh Kumar95b61052014-08-28 11:22:30 +0530139 dev_dbg(cpu_dev, "cpu%d regulator not ready, retry\n",
140 cpu);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530141 return -EPROBE_DEFER;
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000142 }
Viresh Kumar2d2c5e02014-08-28 11:22:29 +0530143
144 /* Try with "cpu-supply" */
145 if (reg == reg_cpu0) {
146 reg = reg_cpu;
147 goto try_again;
148 }
149
Thomas Petazzonia00de1a2014-10-19 11:30:29 +0200150 dev_dbg(cpu_dev, "no regulator for cpu%d: %ld\n",
151 cpu, PTR_ERR(cpu_reg));
Nishanth Menonfc31d6f2013-05-01 13:38:12 +0000152 }
153
Lucas Stache3beb0a2014-05-16 12:20:42 +0200154 cpu_clk = clk_get(cpu_dev, NULL);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000155 if (IS_ERR(cpu_clk)) {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530156 /* put regulator */
157 if (!IS_ERR(cpu_reg))
158 regulator_put(cpu_reg);
159
Shawn Guo95ceafd2012-09-06 07:09:11 +0000160 ret = PTR_ERR(cpu_clk);
Viresh Kumar48a86242014-08-28 11:22:26 +0530161
162 /*
163 * If cpu's clk node is present, but clock is not yet
164 * registered, we should try defering probe.
165 */
166 if (ret == -EPROBE_DEFER)
Viresh Kumar95b61052014-08-28 11:22:30 +0530167 dev_dbg(cpu_dev, "cpu%d clock not ready, retry\n", cpu);
Viresh Kumar48a86242014-08-28 11:22:26 +0530168 else
Abhilash Kesavan71796212014-10-31 18:09:33 +0530169 dev_err(cpu_dev, "failed to get cpu%d clock: %d\n", cpu,
170 ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530171 } else {
172 *cdev = cpu_dev;
173 *creg = cpu_reg;
174 *cclk = cpu_clk;
175 }
Viresh Kumar48a86242014-08-28 11:22:26 +0530176
Viresh Kumard2f31f12014-08-28 11:22:28 +0530177 return ret;
178}
179
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530180static int cpufreq_init(struct cpufreq_policy *policy)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530181{
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200182 struct cpufreq_dt_platform_data *pd;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530183 struct cpufreq_frequency_table *freq_table;
184 struct thermal_cooling_device *cdev;
185 struct device_node *np;
186 struct private_data *priv;
187 struct device *cpu_dev;
188 struct regulator *cpu_reg;
189 struct clk *cpu_clk;
Lucas Stach045ee452014-10-24 15:05:55 +0200190 unsigned long min_uV = ~0, max_uV = 0;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530191 unsigned int transition_latency;
192 int ret;
193
Viresh Kumar95b61052014-08-28 11:22:30 +0530194 ret = allocate_resources(policy->cpu, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530195 if (ret) {
Geert Uytterhoevenedd52b12014-10-23 11:52:54 +0200196 pr_err("%s: Failed to allocate resources: %d\n", __func__, ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530197 return ret;
198 }
199
200 np = of_node_get(cpu_dev->of_node);
201 if (!np) {
202 dev_err(cpu_dev, "failed to find cpu%d node\n", policy->cpu);
203 ret = -ENOENT;
204 goto out_put_reg_clk;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000205 }
206
Viresh Kumar1bf8cc32014-07-11 20:24:19 +0530207 /* OPPs might be populated at runtime, don't check for error here */
208 of_init_opp_table(cpu_dev);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000209
Viresh Kumard2f31f12014-08-28 11:22:28 +0530210 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
211 if (!priv) {
212 ret = -ENOMEM;
Lucas Stach045ee452014-10-24 15:05:55 +0200213 goto out_put_node;
Viresh Kumard2f31f12014-08-28 11:22:28 +0530214 }
215
216 of_property_read_u32(np, "voltage-tolerance", &priv->voltage_tolerance);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000217
218 if (of_property_read_u32(np, "clock-latency", &transition_latency))
219 transition_latency = CPUFREQ_ETERNAL;
220
Philipp Zabel43c638e2013-09-26 11:19:37 +0200221 if (!IS_ERR(cpu_reg)) {
Lucas Stach045ee452014-10-24 15:05:55 +0200222 unsigned long opp_freq = 0;
Shawn Guo95ceafd2012-09-06 07:09:11 +0000223
224 /*
Lucas Stach045ee452014-10-24 15:05:55 +0200225 * Disable any OPPs where the connected regulator isn't able to
226 * provide the specified voltage and record minimum and maximum
227 * voltage levels.
Shawn Guo95ceafd2012-09-06 07:09:11 +0000228 */
Lucas Stach045ee452014-10-24 15:05:55 +0200229 while (1) {
230 struct dev_pm_opp *opp;
231 unsigned long opp_uV, tol_uV;
232
233 rcu_read_lock();
234 opp = dev_pm_opp_find_freq_ceil(cpu_dev, &opp_freq);
235 if (IS_ERR(opp)) {
236 rcu_read_unlock();
237 break;
238 }
239 opp_uV = dev_pm_opp_get_voltage(opp);
240 rcu_read_unlock();
241
242 tol_uV = opp_uV * priv->voltage_tolerance / 100;
243 if (regulator_is_supported_voltage(cpu_reg, opp_uV,
244 opp_uV + tol_uV)) {
245 if (opp_uV < min_uV)
246 min_uV = opp_uV;
247 if (opp_uV > max_uV)
248 max_uV = opp_uV;
249 } else {
250 dev_pm_opp_disable(cpu_dev, opp_freq);
251 }
252
253 opp_freq++;
254 }
255
Shawn Guo95ceafd2012-09-06 07:09:11 +0000256 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
257 if (ret > 0)
258 transition_latency += ret * 1000;
259 }
260
Lucas Stach045ee452014-10-24 15:05:55 +0200261 ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table);
262 if (ret) {
263 pr_err("failed to init cpufreq table: %d\n", ret);
264 goto out_free_priv;
265 }
266
Eduardo Valentin77cff592013-07-15 09:09:14 -0400267 /*
268 * For now, just loading the cooling device;
269 * thermal DT code takes care of matching them.
270 */
271 if (of_find_property(np, "#cooling-cells", NULL)) {
272 cdev = of_cpufreq_cooling_register(np, cpu_present_mask);
273 if (IS_ERR(cdev))
Viresh Kumarfbd48ca2014-08-28 11:22:27 +0530274 dev_err(cpu_dev,
275 "running cpufreq without cooling device: %ld\n",
276 PTR_ERR(cdev));
Viresh Kumard2f31f12014-08-28 11:22:28 +0530277 else
278 priv->cdev = cdev;
Eduardo Valentin77cff592013-07-15 09:09:14 -0400279 }
Viresh Kumard2f31f12014-08-28 11:22:28 +0530280
281 priv->cpu_dev = cpu_dev;
282 priv->cpu_reg = cpu_reg;
283 policy->driver_data = priv;
284
285 policy->clk = cpu_clk;
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200286 ret = cpufreq_table_validate_and_show(policy, freq_table);
287 if (ret) {
288 dev_err(cpu_dev, "%s: invalid frequency table: %d\n", __func__,
289 ret);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530290 goto out_cooling_unregister;
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200291 }
292
293 policy->cpuinfo.transition_latency = transition_latency;
294
295 pd = cpufreq_get_driver_data();
Geert Uytterhoevenc81407f2014-10-27 14:44:40 +0100296 if (!pd || !pd->independent_clocks)
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200297 cpumask_setall(policy->cpus);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530298
Lucas Stachf9739d22014-09-26 15:33:46 +0200299 of_node_put(np);
300
Shawn Guo95ceafd2012-09-06 07:09:11 +0000301 return 0;
302
Viresh Kumard2f31f12014-08-28 11:22:28 +0530303out_cooling_unregister:
304 cpufreq_cooling_unregister(priv->cdev);
Nishanth Menon5d4879c2013-09-19 16:03:50 -0500305 dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table);
Lucas Stach045ee452014-10-24 15:05:55 +0200306out_free_priv:
307 kfree(priv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000308out_put_node:
309 of_node_put(np);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530310out_put_reg_clk:
311 clk_put(cpu_clk);
312 if (!IS_ERR(cpu_reg))
313 regulator_put(cpu_reg);
314
315 return ret;
316}
317
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530318static int cpufreq_exit(struct cpufreq_policy *policy)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530319{
320 struct private_data *priv = policy->driver_data;
321
322 cpufreq_cooling_unregister(priv->cdev);
323 dev_pm_opp_free_cpufreq_table(priv->cpu_dev, &policy->freq_table);
324 clk_put(policy->clk);
325 if (!IS_ERR(priv->cpu_reg))
326 regulator_put(priv->cpu_reg);
327 kfree(priv);
328
329 return 0;
330}
331
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530332static struct cpufreq_driver dt_cpufreq_driver = {
Viresh Kumard2f31f12014-08-28 11:22:28 +0530333 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
334 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530335 .target_index = set_target,
Viresh Kumard2f31f12014-08-28 11:22:28 +0530336 .get = cpufreq_generic_get,
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530337 .init = cpufreq_init,
338 .exit = cpufreq_exit,
339 .name = "cpufreq-dt",
Viresh Kumard2f31f12014-08-28 11:22:28 +0530340 .attr = cpufreq_generic_attr,
341};
342
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530343static int dt_cpufreq_probe(struct platform_device *pdev)
Viresh Kumard2f31f12014-08-28 11:22:28 +0530344{
345 struct device *cpu_dev;
346 struct regulator *cpu_reg;
347 struct clk *cpu_clk;
348 int ret;
349
350 /*
351 * All per-cluster (CPUs sharing clock/voltages) initialization is done
352 * from ->init(). In probe(), we just need to make sure that clk and
353 * regulators are available. Else defer probe and retry.
354 *
355 * FIXME: Is checking this only for CPU0 sufficient ?
356 */
Viresh Kumar95b61052014-08-28 11:22:30 +0530357 ret = allocate_resources(0, &cpu_dev, &cpu_reg, &cpu_clk);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530358 if (ret)
359 return ret;
360
361 clk_put(cpu_clk);
362 if (!IS_ERR(cpu_reg))
363 regulator_put(cpu_reg);
364
Thomas Petazzoni34e5a522014-10-19 11:30:28 +0200365 dt_cpufreq_driver.driver_data = dev_get_platdata(&pdev->dev);
366
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530367 ret = cpufreq_register_driver(&dt_cpufreq_driver);
Viresh Kumard2f31f12014-08-28 11:22:28 +0530368 if (ret)
369 dev_err(cpu_dev, "failed register driver: %d\n", ret);
370
Shawn Guo95ceafd2012-09-06 07:09:11 +0000371 return ret;
372}
Shawn Guo5553f9e2013-01-30 14:27:49 +0000373
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530374static int dt_cpufreq_remove(struct platform_device *pdev)
Shawn Guo5553f9e2013-01-30 14:27:49 +0000375{
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530376 cpufreq_unregister_driver(&dt_cpufreq_driver);
Shawn Guo5553f9e2013-01-30 14:27:49 +0000377 return 0;
378}
379
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530380static struct platform_driver dt_cpufreq_platdrv = {
Shawn Guo5553f9e2013-01-30 14:27:49 +0000381 .driver = {
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530382 .name = "cpufreq-dt",
Shawn Guo5553f9e2013-01-30 14:27:49 +0000383 .owner = THIS_MODULE,
384 },
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530385 .probe = dt_cpufreq_probe,
386 .remove = dt_cpufreq_remove,
Shawn Guo5553f9e2013-01-30 14:27:49 +0000387};
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530388module_platform_driver(dt_cpufreq_platdrv);
Shawn Guo95ceafd2012-09-06 07:09:11 +0000389
Viresh Kumar748c8762014-08-28 11:22:24 +0530390MODULE_AUTHOR("Viresh Kumar <viresh.kumar@linaro.org>");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000391MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
Viresh Kumarbbcf0712014-09-09 19:58:03 +0530392MODULE_DESCRIPTION("Generic cpufreq driver");
Shawn Guo95ceafd2012-09-06 07:09:11 +0000393MODULE_LICENSE("GPL");