blob: 7ff665a8c7080b2634fd2095e9b24fb550044a4b [file] [log] [blame]
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +02001/*
2 * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board
3 *
4 * Copyright (C) 2011 Atmel,
5 * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
6 *
7 * Licensed under GPLv2 or later.
8 */
9/dts-v1/;
Jean-Christophe PLAGNIOL-VILLARD6db64d22013-05-15 01:21:50 +080010#include "at91sam9g45.dtsi"
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020011
12/ {
13 model = "Atmel AT91SAM9M10G45-EK";
14 compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9";
15
16 chosen {
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +080017 bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020018 };
19
Ludovic Desrochesdcce6ce2012-04-02 20:44:20 +020020 memory {
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020021 reg = <0x70000000 0x4000000>;
22 };
23
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +080024 clocks {
25 #address-cells = <1>;
26 #size-cells = <1>;
27 ranges;
28
29 main_clock: clock@0 {
30 compatible = "atmel,osc", "fixed-clock";
31 clock-frequency = <12000000>;
32 };
33 };
34
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020035 ahb {
36 apb {
37 dbgu: serial@ffffee00 {
38 status = "okay";
39 };
40
41 usart1: serial@fff90000 {
Jean-Christophe PLAGNIOL-VILLARDc58c0c52012-11-19 07:30:01 +080042 pinctrl-0 =
43 <&pinctrl_usart1
44 &pinctrl_usart1_rts
45 &pinctrl_usart1_cts>;
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +020046 status = "okay";
47 };
Nicolas Ferre0d4f99d2011-12-05 18:03:05 +010048
49 macb0: ethernet@fffbc000 {
50 phy-mode = "rmii";
51 status = "okay";
52 };
Ludovic Desrochesfbc18712012-09-12 08:42:17 +020053
54 i2c0: i2c@fff84000 {
55 status = "okay";
56 };
57
58 i2c1: i2c@fff88000 {
59 status = "okay";
60 };
Ludovic Desroches4134a452012-11-19 12:24:02 +010061
Wenyou Yangc77bcef2013-05-31 11:11:33 +080062 watchdog@fffffd40 {
63 status = "okay";
64 };
65
Ludovic Desroches4134a452012-11-19 12:24:02 +010066 mmc0: mmc@fff80000 {
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +080067 pinctrl-0 = <
68 &pinctrl_board_mmc0
69 &pinctrl_mmc0_slot0_clk_cmd_dat0
70 &pinctrl_mmc0_slot0_dat1_3>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010071 status = "okay";
72 slot@0 {
73 reg = <0>;
74 bus-width = <4>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080075 cd-gpios = <&pioD 10 GPIO_ACTIVE_HIGH>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010076 };
77 };
78
79 mmc1: mmc@fffd0000 {
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +080080 pinctrl-0 = <
81 &pinctrl_board_mmc1
82 &pinctrl_mmc1_slot0_clk_cmd_dat0
83 &pinctrl_mmc1_slot0_dat1_3>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010084 status = "okay";
85 slot@0 {
86 reg = <0>;
87 bus-width = <4>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +080088 cd-gpios = <&pioD 11 GPIO_ACTIVE_HIGH>;
89 wp-gpios = <&pioD 29 GPIO_ACTIVE_HIGH>;
Ludovic Desroches4134a452012-11-19 12:24:02 +010090 };
91 };
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +080092
93 pinctrl@fffff200 {
94 mmc0 {
95 pinctrl_board_mmc0: mmc0-board {
96 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +080097 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD10 gpio CD pin pull up and deglitch */
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +080098 };
99 };
100
101 mmc1 {
102 pinctrl_board_mmc1: mmc1-board {
103 atmel,pins =
Jean-Christophe PLAGNIOL-VILLARDc9d0f312013-04-24 08:34:25 +0800104 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PD11 gpio CD pin pull up and deglitch */
105 AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD29 gpio WP pin pull up */
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +0800106 };
107 };
Bo Sheneed97292013-12-19 11:59:18 +0800108
109 pwm0 {
110 pinctrl_pwm_leds: pwm-led {
111 atmel,pins =
112 <AT91_PIOD 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PD0 periph B */
113 AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PD31 periph B */
114 };
115 };
Jean-Christophe PLAGNIOL-VILLARD199e2ed2012-11-20 00:38:18 +0800116 };
Richard Genoudb6811e92013-04-03 14:03:05 +0800117
118 spi0: spi@fffa4000{
119 status = "okay";
120 cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
121 mtd_dataflash@0 {
122 compatible = "atmel,at45", "atmel,dataflash";
123 spi-max-frequency = <13000000>;
124 reg = <0>;
125 };
126 };
Jean-Christophe PLAGNIOL-VILLARD24ce10e2013-05-03 20:56:01 +0800127
128 usb2: gadget@fff78000 {
129 atmel,vbus-gpio = <&pioB 19 GPIO_ACTIVE_HIGH>;
130 status = "okay";
131 };
Bo Sheneed97292013-12-19 11:59:18 +0800132
133 pwm0: pwm@fffb8000 {
134 status = "okay";
135
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_pwm_leds>;
138 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200139 };
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800140
Jean-Christophe PLAGNIOL-VILLARDf4390a72013-03-29 02:11:22 +0800141 fb0: fb@0x00500000 {
142 display = <&display0>;
143 status = "okay";
144
145 display0: display {
146 bits-per-pixel = <32>;
147 atmel,lcdcon-backlight;
148 atmel,dmacon = <0x1>;
149 atmel,lcdcon2 = <0x80008002>;
150 atmel,guard-time = <9>;
151 atmel,lcd-wiring-mode = "RGB";
152
153 display-timings {
154 native-mode = <&timing0>;
155 timing0: timing0 {
156 clock-frequency = <9000000>;
157 hactive = <480>;
158 vactive = <272>;
159 hback-porch = <1>;
160 hfront-porch = <1>;
161 vback-porch = <40>;
162 vfront-porch = <1>;
163 hsync-len = <45>;
164 vsync-len = <1>;
165 };
166 };
167 };
168 };
169
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800170 nand0: nand@40000000 {
171 nand-bus-width = <8>;
172 nand-ecc-mode = "soft";
173 nand-on-flash-bbt;
174 status = "okay";
175
176 boot@0 {
177 label = "bootstrap/uboot/kernel";
178 reg = <0x0 0x400000>;
179 };
180
181 rootfs@400000 {
182 label = "rootfs";
183 reg = <0x400000 0x3C00000>;
184 };
185
186 data@4000000 {
187 label = "data";
188 reg = <0x4000000 0xC000000>;
189 };
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800190 };
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800191
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800192 usb0: ohci@00700000 {
193 status = "okay";
194 num-ports = <2>;
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800195 atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
196 &pioD 3 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARDd6a01662012-01-26 02:11:06 +0800197 };
Jean-Christophe PLAGNIOL-VILLARD62c55532011-11-22 12:11:13 +0800198
199 usb1: ehci@00800000 {
200 status = "okay";
201 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200202 };
Jean-Christophe PLAGNIOL-VILLARDf2ee7ac2012-02-04 12:26:01 +0800203
204 leds {
205 compatible = "gpio-leds";
206
207 d8 {
208 label = "d8";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800209 gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
Jean-Christophe PLAGNIOL-VILLARDf2ee7ac2012-02-04 12:26:01 +0800210 linux,default-trigger = "heartbeat";
211 };
Bo Sheneed97292013-12-19 11:59:18 +0800212 };
213
214 pwmleds {
215 compatible = "pwm-leds";
Jean-Christophe PLAGNIOL-VILLARDf2ee7ac2012-02-04 12:26:01 +0800216
217 d6 {
218 label = "d6";
Bo Sheneed97292013-12-19 11:59:18 +0800219 pwms = <&pwm0 3 5000 0>;
220 max-brightness = <255>;
Jean-Christophe PLAGNIOL-VILLARDf2ee7ac2012-02-04 12:26:01 +0800221 linux,default-trigger = "nand-disk";
222 };
223
224 d7 {
225 label = "d7";
Bo Sheneed97292013-12-19 11:59:18 +0800226 pwms = <&pwm0 1 5000 0>;
227 max-brightness = <255>;
Jean-Christophe PLAGNIOL-VILLARDf2ee7ac2012-02-04 12:26:01 +0800228 linux,default-trigger = "mmc0";
229 };
230 };
Jean-Christophe PLAGNIOL-VILLARD8a087b02012-02-04 12:42:35 +0800231
232 gpio_keys {
233 compatible = "gpio-keys";
Jean-Christophe PLAGNIOL-VILLARD8a087b02012-02-04 12:42:35 +0800234
235 left_click {
236 label = "left_click";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800237 gpios = <&pioB 6 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARD8a087b02012-02-04 12:42:35 +0800238 linux,code = <272>;
239 gpio-key,wakeup;
240 };
241
242 right_click {
243 label = "right_click";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800244 gpios = <&pioB 7 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARD8a087b02012-02-04 12:42:35 +0800245 linux,code = <273>;
246 gpio-key,wakeup;
247 };
248
249 left {
250 label = "Joystick Left";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800251 gpios = <&pioB 14 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARD8a087b02012-02-04 12:42:35 +0800252 linux,code = <105>;
253 };
254
255 right {
256 label = "Joystick Right";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800257 gpios = <&pioB 15 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARD8a087b02012-02-04 12:42:35 +0800258 linux,code = <106>;
259 };
260
261 up {
262 label = "Joystick Up";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800263 gpios = <&pioB 16 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARD8a087b02012-02-04 12:42:35 +0800264 linux,code = <103>;
265 };
266
267 down {
268 label = "Joystick Down";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800269 gpios = <&pioB 17 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARD8a087b02012-02-04 12:42:35 +0800270 linux,code = <108>;
271 };
272
273 enter {
274 label = "Joystick Press";
Jean-Christophe PLAGNIOL-VILLARD92f86292013-04-24 08:34:25 +0800275 gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
Jean-Christophe PLAGNIOL-VILLARD8a087b02012-02-04 12:42:35 +0800276 linux,code = <28>;
277 };
278 };
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200279};