blob: 95568eb798c36cceb9b70795d07892b67fae3f07 [file] [log] [blame]
Carlo Caionecfb61a42014-05-01 14:29:27 +02001/*
2 * Functions and registers to access AXP20X power management chip.
3 *
4 * Copyright (C) 2013, Carlo Caione <carlo@caione.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __LINUX_MFD_AXP20X_H
12#define __LINUX_MFD_AXP20X_H
13
14enum {
15 AXP202_ID = 0,
16 AXP209_ID,
Boris BREZILLONf05be582015-04-10 12:09:01 +080017 AXP221_ID,
Jacob Panaf7e9062014-10-06 21:17:14 -070018 AXP288_ID,
19 NR_AXP20X_VARIANTS,
Carlo Caionecfb61a42014-05-01 14:29:27 +020020};
21
22#define AXP20X_DATACACHE(m) (0x04 + (m))
23
24/* Power supply */
25#define AXP20X_PWR_INPUT_STATUS 0x00
26#define AXP20X_PWR_OP_MODE 0x01
27#define AXP20X_USB_OTG_STATUS 0x02
28#define AXP20X_PWR_OUT_CTRL 0x12
29#define AXP20X_DCDC2_V_OUT 0x23
30#define AXP20X_DCDC2_LDO3_V_SCAL 0x25
31#define AXP20X_DCDC3_V_OUT 0x27
32#define AXP20X_LDO24_V_OUT 0x28
33#define AXP20X_LDO3_V_OUT 0x29
34#define AXP20X_VBUS_IPSOUT_MGMT 0x30
35#define AXP20X_V_OFF 0x31
36#define AXP20X_OFF_CTRL 0x32
37#define AXP20X_CHRG_CTRL1 0x33
38#define AXP20X_CHRG_CTRL2 0x34
39#define AXP20X_CHRG_BAK_CTRL 0x35
40#define AXP20X_PEK_KEY 0x36
41#define AXP20X_DCDC_FREQ 0x37
42#define AXP20X_V_LTF_CHRG 0x38
43#define AXP20X_V_HTF_CHRG 0x39
44#define AXP20X_APS_WARN_L1 0x3a
45#define AXP20X_APS_WARN_L2 0x3b
46#define AXP20X_V_LTF_DISCHRG 0x3c
47#define AXP20X_V_HTF_DISCHRG 0x3d
48
Boris BREZILLONf05be582015-04-10 12:09:01 +080049#define AXP22X_PWR_OUT_CTRL1 0x10
50#define AXP22X_PWR_OUT_CTRL2 0x12
51#define AXP22X_PWR_OUT_CTRL3 0x13
52#define AXP22X_DLDO1_V_OUT 0x15
53#define AXP22X_DLDO2_V_OUT 0x16
54#define AXP22X_DLDO3_V_OUT 0x17
55#define AXP22X_DLDO4_V_OUT 0x18
56#define AXP22X_ELDO1_V_OUT 0x19
57#define AXP22X_ELDO2_V_OUT 0x1a
58#define AXP22X_ELDO3_V_OUT 0x1b
59#define AXP22X_DC5LDO_V_OUT 0x1c
60#define AXP22X_DCDC1_V_OUT 0x21
61#define AXP22X_DCDC2_V_OUT 0x22
62#define AXP22X_DCDC3_V_OUT 0x23
63#define AXP22X_DCDC4_V_OUT 0x24
64#define AXP22X_DCDC5_V_OUT 0x25
65#define AXP22X_DCDC23_V_RAMP_CTRL 0x27
66#define AXP22X_ALDO1_V_OUT 0x28
67#define AXP22X_ALDO2_V_OUT 0x29
68#define AXP22X_ALDO3_V_OUT 0x2a
69#define AXP22X_CHRG_CTRL3 0x35
70
Carlo Caionecfb61a42014-05-01 14:29:27 +020071/* Interrupt */
72#define AXP20X_IRQ1_EN 0x40
73#define AXP20X_IRQ2_EN 0x41
74#define AXP20X_IRQ3_EN 0x42
75#define AXP20X_IRQ4_EN 0x43
76#define AXP20X_IRQ5_EN 0x44
Jacob Panaf7e9062014-10-06 21:17:14 -070077#define AXP20X_IRQ6_EN 0x45
Carlo Caionecfb61a42014-05-01 14:29:27 +020078#define AXP20X_IRQ1_STATE 0x48
79#define AXP20X_IRQ2_STATE 0x49
80#define AXP20X_IRQ3_STATE 0x4a
81#define AXP20X_IRQ4_STATE 0x4b
82#define AXP20X_IRQ5_STATE 0x4c
Jacob Panaf7e9062014-10-06 21:17:14 -070083#define AXP20X_IRQ6_STATE 0x4d
Carlo Caionecfb61a42014-05-01 14:29:27 +020084
85/* ADC */
86#define AXP20X_ACIN_V_ADC_H 0x56
87#define AXP20X_ACIN_V_ADC_L 0x57
88#define AXP20X_ACIN_I_ADC_H 0x58
89#define AXP20X_ACIN_I_ADC_L 0x59
90#define AXP20X_VBUS_V_ADC_H 0x5a
91#define AXP20X_VBUS_V_ADC_L 0x5b
92#define AXP20X_VBUS_I_ADC_H 0x5c
93#define AXP20X_VBUS_I_ADC_L 0x5d
94#define AXP20X_TEMP_ADC_H 0x5e
95#define AXP20X_TEMP_ADC_L 0x5f
96#define AXP20X_TS_IN_H 0x62
97#define AXP20X_TS_IN_L 0x63
98#define AXP20X_GPIO0_V_ADC_H 0x64
99#define AXP20X_GPIO0_V_ADC_L 0x65
100#define AXP20X_GPIO1_V_ADC_H 0x66
101#define AXP20X_GPIO1_V_ADC_L 0x67
102#define AXP20X_PWR_BATT_H 0x70
103#define AXP20X_PWR_BATT_M 0x71
104#define AXP20X_PWR_BATT_L 0x72
105#define AXP20X_BATT_V_H 0x78
106#define AXP20X_BATT_V_L 0x79
107#define AXP20X_BATT_CHRG_I_H 0x7a
108#define AXP20X_BATT_CHRG_I_L 0x7b
109#define AXP20X_BATT_DISCHRG_I_H 0x7c
110#define AXP20X_BATT_DISCHRG_I_L 0x7d
111#define AXP20X_IPSOUT_V_HIGH_H 0x7e
112#define AXP20X_IPSOUT_V_HIGH_L 0x7f
113
114/* Power supply */
115#define AXP20X_DCDC_MODE 0x80
116#define AXP20X_ADC_EN1 0x82
117#define AXP20X_ADC_EN2 0x83
118#define AXP20X_ADC_RATE 0x84
119#define AXP20X_GPIO10_IN_RANGE 0x85
120#define AXP20X_GPIO1_ADC_IRQ_RIS 0x86
121#define AXP20X_GPIO1_ADC_IRQ_FAL 0x87
122#define AXP20X_TIMER_CTRL 0x8a
123#define AXP20X_VBUS_MON 0x8b
124#define AXP20X_OVER_TMP 0x8f
125
Boris BREZILLONf05be582015-04-10 12:09:01 +0800126#define AXP22X_PWREN_CTRL1 0x8c
127#define AXP22X_PWREN_CTRL2 0x8d
128
Carlo Caionecfb61a42014-05-01 14:29:27 +0200129/* GPIO */
130#define AXP20X_GPIO0_CTRL 0x90
131#define AXP20X_LDO5_V_OUT 0x91
132#define AXP20X_GPIO1_CTRL 0x92
133#define AXP20X_GPIO2_CTRL 0x93
134#define AXP20X_GPIO20_SS 0x94
135#define AXP20X_GPIO3_CTRL 0x95
136
Boris BREZILLONf05be582015-04-10 12:09:01 +0800137#define AXP22X_LDO_IO0_V_OUT 0x91
138#define AXP22X_LDO_IO1_V_OUT 0x93
139#define AXP22X_GPIO_STATE 0x94
140#define AXP22X_GPIO_PULL_DOWN 0x95
141
Carlo Caionecfb61a42014-05-01 14:29:27 +0200142/* Battery */
143#define AXP20X_CHRG_CC_31_24 0xb0
144#define AXP20X_CHRG_CC_23_16 0xb1
145#define AXP20X_CHRG_CC_15_8 0xb2
146#define AXP20X_CHRG_CC_7_0 0xb3
147#define AXP20X_DISCHRG_CC_31_24 0xb4
148#define AXP20X_DISCHRG_CC_23_16 0xb5
149#define AXP20X_DISCHRG_CC_15_8 0xb6
150#define AXP20X_DISCHRG_CC_7_0 0xb7
151#define AXP20X_CC_CTRL 0xb8
152#define AXP20X_FG_RES 0xb9
153
Boris BREZILLONf05be582015-04-10 12:09:01 +0800154/* AXP22X specific registers */
155#define AXP22X_BATLOW_THRES1 0xe6
156
Jacob Panaf7e9062014-10-06 21:17:14 -0700157/* AXP288 specific registers */
158#define AXP288_PMIC_ADC_H 0x56
159#define AXP288_PMIC_ADC_L 0x57
160#define AXP288_ADC_TS_PIN_CTRL 0x84
Jacob Panaf7e9062014-10-06 21:17:14 -0700161#define AXP288_PMIC_ADC_EN 0x84
Jacob Panaf7e9062014-10-06 21:17:14 -0700162
Todd E Brandt774e0b42015-01-07 13:25:52 -0800163/* Fuel Gauge */
164#define AXP288_FG_RDC1_REG 0xba
165#define AXP288_FG_RDC0_REG 0xbb
166#define AXP288_FG_OCVH_REG 0xbc
167#define AXP288_FG_OCVL_REG 0xbd
168#define AXP288_FG_OCV_CURVE_REG 0xc0
169#define AXP288_FG_DES_CAP1_REG 0xe0
170#define AXP288_FG_DES_CAP0_REG 0xe1
171#define AXP288_FG_CC_MTR1_REG 0xe2
172#define AXP288_FG_CC_MTR0_REG 0xe3
173#define AXP288_FG_OCV_CAP_REG 0xe4
174#define AXP288_FG_CC_CAP_REG 0xe5
175#define AXP288_FG_LOW_CAP_REG 0xe6
176#define AXP288_FG_TUNE0 0xe8
177#define AXP288_FG_TUNE1 0xe9
178#define AXP288_FG_TUNE2 0xea
179#define AXP288_FG_TUNE3 0xeb
180#define AXP288_FG_TUNE4 0xec
181#define AXP288_FG_TUNE5 0xed
Jacob Panaf7e9062014-10-06 21:17:14 -0700182
Carlo Caionecfb61a42014-05-01 14:29:27 +0200183/* Regulators IDs */
184enum {
185 AXP20X_LDO1 = 0,
186 AXP20X_LDO2,
187 AXP20X_LDO3,
188 AXP20X_LDO4,
189 AXP20X_LDO5,
190 AXP20X_DCDC2,
191 AXP20X_DCDC3,
192 AXP20X_REG_ID_MAX,
193};
194
Boris BREZILLONf05be582015-04-10 12:09:01 +0800195enum {
196 AXP22X_DCDC1 = 0,
197 AXP22X_DCDC2,
198 AXP22X_DCDC3,
199 AXP22X_DCDC4,
200 AXP22X_DCDC5,
201 AXP22X_DC1SW,
202 AXP22X_DC5LDO,
203 AXP22X_ALDO1,
204 AXP22X_ALDO2,
205 AXP22X_ALDO3,
206 AXP22X_ELDO1,
207 AXP22X_ELDO2,
208 AXP22X_ELDO3,
209 AXP22X_DLDO1,
210 AXP22X_DLDO2,
211 AXP22X_DLDO3,
212 AXP22X_DLDO4,
213 AXP22X_RTC_LDO,
214 AXP22X_LDO_IO0,
215 AXP22X_LDO_IO1,
216 AXP22X_REG_ID_MAX,
217};
218
Carlo Caionecfb61a42014-05-01 14:29:27 +0200219/* IRQs */
220enum {
221 AXP20X_IRQ_ACIN_OVER_V = 1,
222 AXP20X_IRQ_ACIN_PLUGIN,
223 AXP20X_IRQ_ACIN_REMOVAL,
224 AXP20X_IRQ_VBUS_OVER_V,
225 AXP20X_IRQ_VBUS_PLUGIN,
226 AXP20X_IRQ_VBUS_REMOVAL,
227 AXP20X_IRQ_VBUS_V_LOW,
228 AXP20X_IRQ_BATT_PLUGIN,
229 AXP20X_IRQ_BATT_REMOVAL,
230 AXP20X_IRQ_BATT_ENT_ACT_MODE,
231 AXP20X_IRQ_BATT_EXIT_ACT_MODE,
232 AXP20X_IRQ_CHARG,
233 AXP20X_IRQ_CHARG_DONE,
234 AXP20X_IRQ_BATT_TEMP_HIGH,
235 AXP20X_IRQ_BATT_TEMP_LOW,
236 AXP20X_IRQ_DIE_TEMP_HIGH,
237 AXP20X_IRQ_CHARG_I_LOW,
238 AXP20X_IRQ_DCDC1_V_LONG,
239 AXP20X_IRQ_DCDC2_V_LONG,
240 AXP20X_IRQ_DCDC3_V_LONG,
241 AXP20X_IRQ_PEK_SHORT = 22,
242 AXP20X_IRQ_PEK_LONG,
243 AXP20X_IRQ_N_OE_PWR_ON,
244 AXP20X_IRQ_N_OE_PWR_OFF,
245 AXP20X_IRQ_VBUS_VALID,
246 AXP20X_IRQ_VBUS_NOT_VALID,
247 AXP20X_IRQ_VBUS_SESS_VALID,
248 AXP20X_IRQ_VBUS_SESS_END,
249 AXP20X_IRQ_LOW_PWR_LVL1,
250 AXP20X_IRQ_LOW_PWR_LVL2,
251 AXP20X_IRQ_TIMER,
252 AXP20X_IRQ_PEK_RIS_EDGE,
253 AXP20X_IRQ_PEK_FAL_EDGE,
254 AXP20X_IRQ_GPIO3_INPUT,
255 AXP20X_IRQ_GPIO2_INPUT,
256 AXP20X_IRQ_GPIO1_INPUT,
257 AXP20X_IRQ_GPIO0_INPUT,
258};
259
Boris BREZILLONf05be582015-04-10 12:09:01 +0800260enum axp22x_irqs {
261 AXP22X_IRQ_ACIN_OVER_V = 1,
262 AXP22X_IRQ_ACIN_PLUGIN,
263 AXP22X_IRQ_ACIN_REMOVAL,
264 AXP22X_IRQ_VBUS_OVER_V,
265 AXP22X_IRQ_VBUS_PLUGIN,
266 AXP22X_IRQ_VBUS_REMOVAL,
267 AXP22X_IRQ_VBUS_V_LOW,
268 AXP22X_IRQ_BATT_PLUGIN,
269 AXP22X_IRQ_BATT_REMOVAL,
270 AXP22X_IRQ_BATT_ENT_ACT_MODE,
271 AXP22X_IRQ_BATT_EXIT_ACT_MODE,
272 AXP22X_IRQ_CHARG,
273 AXP22X_IRQ_CHARG_DONE,
274 AXP22X_IRQ_BATT_TEMP_HIGH,
275 AXP22X_IRQ_BATT_TEMP_LOW,
276 AXP22X_IRQ_DIE_TEMP_HIGH,
277 AXP22X_IRQ_PEK_SHORT,
278 AXP22X_IRQ_PEK_LONG,
279 AXP22X_IRQ_LOW_PWR_LVL1,
280 AXP22X_IRQ_LOW_PWR_LVL2,
281 AXP22X_IRQ_TIMER,
282 AXP22X_IRQ_PEK_RIS_EDGE,
283 AXP22X_IRQ_PEK_FAL_EDGE,
284 AXP22X_IRQ_GPIO1_INPUT,
285 AXP22X_IRQ_GPIO0_INPUT,
286};
287
Jacob Panaf7e9062014-10-06 21:17:14 -0700288enum axp288_irqs {
289 AXP288_IRQ_VBUS_FALL = 2,
290 AXP288_IRQ_VBUS_RISE,
291 AXP288_IRQ_OV,
292 AXP288_IRQ_FALLING_ALT,
293 AXP288_IRQ_RISING_ALT,
294 AXP288_IRQ_OV_ALT,
295 AXP288_IRQ_DONE = 10,
296 AXP288_IRQ_CHARGING,
297 AXP288_IRQ_SAFE_QUIT,
298 AXP288_IRQ_SAFE_ENTER,
299 AXP288_IRQ_ABSENT,
300 AXP288_IRQ_APPEND,
301 AXP288_IRQ_QWBTU,
302 AXP288_IRQ_WBTU,
303 AXP288_IRQ_QWBTO,
304 AXP288_IRQ_WBTO,
305 AXP288_IRQ_QCBTU,
306 AXP288_IRQ_CBTU,
307 AXP288_IRQ_QCBTO,
308 AXP288_IRQ_CBTO,
309 AXP288_IRQ_WL2,
310 AXP288_IRQ_WL1,
311 AXP288_IRQ_GPADC,
312 AXP288_IRQ_OT = 31,
313 AXP288_IRQ_GPIO0,
314 AXP288_IRQ_GPIO1,
315 AXP288_IRQ_POKO,
316 AXP288_IRQ_POKL,
317 AXP288_IRQ_POKS,
318 AXP288_IRQ_POKN,
319 AXP288_IRQ_POKP,
320 AXP288_IRQ_TIMER,
321 AXP288_IRQ_MV_CHNG,
322 AXP288_IRQ_BC_USB_CHNG,
323};
324
325#define AXP288_TS_ADC_H 0x58
326#define AXP288_TS_ADC_L 0x59
327#define AXP288_GP_ADC_H 0x5a
328#define AXP288_GP_ADC_L 0x5b
329
Carlo Caionecfb61a42014-05-01 14:29:27 +0200330struct axp20x_dev {
331 struct device *dev;
332 struct i2c_client *i2c_client;
333 struct regmap *regmap;
334 struct regmap_irq_chip_data *regmap_irqc;
335 long variant;
Jacob Panaf7e9062014-10-06 21:17:14 -0700336 int nr_cells;
337 struct mfd_cell *cells;
338 const struct regmap_config *regmap_cfg;
339 const struct regmap_irq_chip *regmap_irq_chip;
Carlo Caionecfb61a42014-05-01 14:29:27 +0200340};
341
Todd E Brandt774e0b42015-01-07 13:25:52 -0800342#define BATTID_LEN 64
343#define OCV_CURVE_SIZE 32
344#define MAX_THERM_CURVE_SIZE 25
345#define PD_DEF_MIN_TEMP 0
346#define PD_DEF_MAX_TEMP 55
347
348struct axp20x_fg_pdata {
349 char battid[BATTID_LEN + 1];
350 int design_cap;
351 int min_volt;
352 int max_volt;
353 int max_temp;
354 int min_temp;
355 int cap1;
356 int cap0;
357 int rdc1;
358 int rdc0;
359 int ocv_curve[OCV_CURVE_SIZE];
360 int tcsz;
361 int thermistor_curve[MAX_THERM_CURVE_SIZE][2];
362};
363
Carlo Caionecfb61a42014-05-01 14:29:27 +0200364#endif /* __LINUX_MFD_AXP20X_H */