blob: 49f72a848423a62d3ff44943cfae84751aee09c0 [file] [log] [blame]
Arnd Bergmann48be9ac2013-02-28 18:19:16 +01001/*
2 * arch/arm/mach-dove/board-dt.c
3 *
4 * Marvell Dove 88AP510 System On Chip FDT Board
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/init.h>
12#include <linux/clk-provider.h>
Sebastian Hesselbarthf07d73e2013-07-02 13:03:40 +020013#include <linux/clocksource.h>
14#include <linux/irqchip.h>
Arnd Bergmann48be9ac2013-02-28 18:19:16 +010015#include <linux/of.h>
16#include <linux/of_platform.h>
17#include <linux/platform_data/usb-ehci-orion.h>
18#include <asm/hardware/cache-tauros2.h>
19#include <asm/mach/arch.h>
Sebastian Hesselbarthf07d73e2013-07-02 13:03:40 +020020#include <mach/dove.h>
Arnd Bergmann48be9ac2013-02-28 18:19:16 +010021#include <mach/pm.h>
22#include <plat/common.h>
23#include <plat/irq.h>
24#include "common.h"
25
26/*
27 * There are still devices that doesn't even know about DT,
28 * get clock gates here and add a clock lookup.
29 */
30static void __init dove_legacy_clk_init(void)
31{
32 struct device_node *np = of_find_compatible_node(NULL, NULL,
33 "marvell,dove-gating-clock");
34 struct of_phandle_args clkspec;
35
36 clkspec.np = np;
37 clkspec.args_count = 1;
38
Arnd Bergmann48be9ac2013-02-28 18:19:16 +010039 clkspec.args[0] = CLOCK_GATING_BIT_PCIE0;
40 orion_clkdev_add("0", "pcie",
41 of_clk_get_from_provider(&clkspec));
42
43 clkspec.args[0] = CLOCK_GATING_BIT_PCIE1;
44 orion_clkdev_add("1", "pcie",
45 of_clk_get_from_provider(&clkspec));
46}
47
Sebastian Hesselbarthf07d73e2013-07-02 13:03:40 +020048static void __init dove_dt_time_init(void)
Arnd Bergmann48be9ac2013-02-28 18:19:16 +010049{
Sebastian Hesselbarth367dc182013-05-11 03:08:07 +020050 of_clk_init(NULL);
Sebastian Hesselbarthf07d73e2013-07-02 13:03:40 +020051 clocksource_of_init();
52}
53
54static void __init dove_dt_init_early(void)
55{
56 mvebu_mbus_init("marvell,dove-mbus",
57 BRIDGE_WINS_BASE, BRIDGE_WINS_SZ,
58 DOVE_MC_WINS_BASE, DOVE_MC_WINS_SZ);
Arnd Bergmann48be9ac2013-02-28 18:19:16 +010059}
60
Arnd Bergmann48be9ac2013-02-28 18:19:16 +010061static void __init dove_dt_init(void)
62{
63 pr_info("Dove 88AP510 SoC\n");
64
65#ifdef CONFIG_CACHE_TAUROS2
66 tauros2_init(0);
67#endif
Thomas Petazzoni7d554902013-03-21 17:59:17 +010068 dove_setup_cpu_wins();
Arnd Bergmann48be9ac2013-02-28 18:19:16 +010069
Sebastian Hesselbarthf07d73e2013-07-02 13:03:40 +020070 /* Setup clocks for legacy devices */
71 dove_legacy_clk_init();
Arnd Bergmann48be9ac2013-02-28 18:19:16 +010072
73 /* Internal devices not ported to DT yet */
Arnd Bergmann48be9ac2013-02-28 18:19:16 +010074 dove_pcie_init(1, 1);
75
76 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
77}
78
79static const char * const dove_dt_board_compat[] = {
80 "marvell,dove",
81 NULL
82};
83
84DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
85 .map_io = dove_map_io,
Sebastian Hesselbarthf07d73e2013-07-02 13:03:40 +020086 .init_early = dove_dt_init_early,
87 .init_time = dove_dt_time_init,
Arnd Bergmann48be9ac2013-02-28 18:19:16 +010088 .init_machine = dove_dt_init,
89 .restart = dove_restart,
90 .dt_compat = dove_dt_board_compat,
91MACHINE_END