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Mika Westerbergd16a5aa2014-03-20 22:04:23 +08001/*
2 * Intel Low Power Subsystem PWM controller driver
3 *
4 * Copyright (C) 2014, Intel Corporation
5 * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
6 * Author: Chew Kean Ho <kean.ho.chew@intel.com>
7 * Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
8 * Author: Chew Chiau Ee <chiau.ee.chew@intel.com>
Alan Cox093e00b2014-04-18 19:17:40 +08009 * Author: Alan Cox <alan@linux.intel.com>
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080010 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
Thierry Redinge0c86a32014-08-23 00:22:45 +020016#include <linux/io.h>
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080017#include <linux/kernel.h>
18#include <linux/module.h>
Qipeng Zhaf080be22015-10-26 12:58:27 +020019#include <linux/pm_runtime.h>
Alan Cox093e00b2014-04-18 19:17:40 +080020
Andy Shevchenkoc558e392014-08-19 19:17:35 +030021#include "pwm-lpss.h"
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080022
23#define PWM 0x00000000
24#define PWM_ENABLE BIT(31)
25#define PWM_SW_UPDATE BIT(30)
26#define PWM_BASE_UNIT_SHIFT 8
27#define PWM_BASE_UNIT_MASK 0x00ffff00
28#define PWM_ON_TIME_DIV_MASK 0x000000ff
29#define PWM_DIVISION_CORRECTION 0x2
30#define PWM_LIMIT (0x8000 + PWM_DIVISION_CORRECTION)
31#define NSECS_PER_SEC 1000000000UL
32
Mika Westerberg4e11f5a2015-10-20 16:53:05 +030033/* Size of each PWM register space if multiple */
34#define PWM_SIZE 0x400
35
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080036struct pwm_lpss_chip {
37 struct pwm_chip chip;
38 void __iomem *regs;
Alan Cox093e00b2014-04-18 19:17:40 +080039 unsigned long clk_rate;
40};
41
Alan Cox093e00b2014-04-18 19:17:40 +080042/* BayTrail */
Andy Shevchenkoc558e392014-08-19 19:17:35 +030043const struct pwm_lpss_boardinfo pwm_lpss_byt_info = {
Mika Westerberg4e11f5a2015-10-20 16:53:05 +030044 .clk_rate = 25000000,
45 .npwm = 1,
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080046};
Andy Shevchenkoc558e392014-08-19 19:17:35 +030047EXPORT_SYMBOL_GPL(pwm_lpss_byt_info);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080048
Alan Cox373c5782014-08-19 17:18:29 +030049/* Braswell */
Andy Shevchenkoc558e392014-08-19 19:17:35 +030050const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = {
Mika Westerberg4e11f5a2015-10-20 16:53:05 +030051 .clk_rate = 19200000,
52 .npwm = 1,
Alan Cox373c5782014-08-19 17:18:29 +030053};
Andy Shevchenkoc558e392014-08-19 19:17:35 +030054EXPORT_SYMBOL_GPL(pwm_lpss_bsw_info);
Alan Cox373c5782014-08-19 17:18:29 +030055
Mika Westerberg87219cb2015-10-20 16:53:06 +030056/* Broxton */
57const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = {
58 .clk_rate = 19200000,
59 .npwm = 4,
60};
61EXPORT_SYMBOL_GPL(pwm_lpss_bxt_info);
62
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080063static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip)
64{
65 return container_of(chip, struct pwm_lpss_chip, chip);
66}
67
Mika Westerberg4e11f5a2015-10-20 16:53:05 +030068static inline u32 pwm_lpss_read(const struct pwm_device *pwm)
69{
70 struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
71
72 return readl(lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
73}
74
75static inline void pwm_lpss_write(const struct pwm_device *pwm, u32 value)
76{
77 struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip);
78
79 writel(value, lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM);
80}
81
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080082static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm,
83 int duty_ns, int period_ns)
84{
85 struct pwm_lpss_chip *lpwm = to_lpwm(chip);
86 u8 on_time_div;
87 unsigned long c;
88 unsigned long long base_unit, freq = NSECS_PER_SEC;
89 u32 ctrl;
90
91 do_div(freq, period_ns);
92
93 /* The equation is: base_unit = ((freq / c) * 65536) + correction */
94 base_unit = freq * 65536;
95
Alan Cox093e00b2014-04-18 19:17:40 +080096 c = lpwm->clk_rate;
Mika Westerbergd16a5aa2014-03-20 22:04:23 +080097 if (!c)
98 return -EINVAL;
99
100 do_div(base_unit, c);
101 base_unit += PWM_DIVISION_CORRECTION;
102 if (base_unit > PWM_LIMIT)
103 return -EINVAL;
104
105 if (duty_ns <= 0)
106 duty_ns = 1;
107 on_time_div = 255 - (255 * duty_ns / period_ns);
108
Qipeng Zhaf080be22015-10-26 12:58:27 +0200109 pm_runtime_get_sync(chip->dev);
110
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300111 ctrl = pwm_lpss_read(pwm);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800112 ctrl &= ~(PWM_BASE_UNIT_MASK | PWM_ON_TIME_DIV_MASK);
113 ctrl |= (u16) base_unit << PWM_BASE_UNIT_SHIFT;
114 ctrl |= on_time_div;
115 /* request PWM to update on next cycle */
116 ctrl |= PWM_SW_UPDATE;
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300117 pwm_lpss_write(pwm, ctrl);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800118
Qipeng Zhaf080be22015-10-26 12:58:27 +0200119 pm_runtime_put(chip->dev);
120
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800121 return 0;
122}
123
124static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm)
125{
Qipeng Zhaf080be22015-10-26 12:58:27 +0200126 pm_runtime_get_sync(chip->dev);
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300127 pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_ENABLE);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800128 return 0;
129}
130
131static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm)
132{
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300133 pwm_lpss_write(pwm, pwm_lpss_read(pwm) & ~PWM_ENABLE);
Qipeng Zhaf080be22015-10-26 12:58:27 +0200134 pm_runtime_put(chip->dev);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800135}
136
137static const struct pwm_ops pwm_lpss_ops = {
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300138 .free = pwm_lpss_disable,
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800139 .config = pwm_lpss_config,
140 .enable = pwm_lpss_enable,
141 .disable = pwm_lpss_disable,
142 .owner = THIS_MODULE,
143};
144
Andy Shevchenkoc558e392014-08-19 19:17:35 +0300145struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
146 const struct pwm_lpss_boardinfo *info)
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800147{
148 struct pwm_lpss_chip *lpwm;
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800149 int ret;
150
Alan Cox093e00b2014-04-18 19:17:40 +0800151 lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800152 if (!lpwm)
Alan Cox093e00b2014-04-18 19:17:40 +0800153 return ERR_PTR(-ENOMEM);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800154
Alan Cox093e00b2014-04-18 19:17:40 +0800155 lpwm->regs = devm_ioremap_resource(dev, r);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800156 if (IS_ERR(lpwm->regs))
Thierry Reding89c03392014-05-07 10:27:57 +0200157 return ERR_CAST(lpwm->regs);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800158
Heikki Krogerus65accd82014-05-09 11:35:21 +0300159 lpwm->clk_rate = info->clk_rate;
Alan Cox093e00b2014-04-18 19:17:40 +0800160 lpwm->chip.dev = dev;
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800161 lpwm->chip.ops = &pwm_lpss_ops;
162 lpwm->chip.base = -1;
Mika Westerberg4e11f5a2015-10-20 16:53:05 +0300163 lpwm->chip.npwm = info->npwm;
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800164
165 ret = pwmchip_add(&lpwm->chip);
166 if (ret) {
Alan Cox093e00b2014-04-18 19:17:40 +0800167 dev_err(dev, "failed to add PWM chip: %d\n", ret);
168 return ERR_PTR(ret);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800169 }
170
Alan Cox093e00b2014-04-18 19:17:40 +0800171 return lpwm;
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800172}
Andy Shevchenkoc558e392014-08-19 19:17:35 +0300173EXPORT_SYMBOL_GPL(pwm_lpss_probe);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800174
Andy Shevchenkoc558e392014-08-19 19:17:35 +0300175int pwm_lpss_remove(struct pwm_lpss_chip *lpwm)
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800176{
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800177 return pwmchip_remove(&lpwm->chip);
178}
Andy Shevchenkoc558e392014-08-19 19:17:35 +0300179EXPORT_SYMBOL_GPL(pwm_lpss_remove);
Mika Westerbergd16a5aa2014-03-20 22:04:23 +0800180
181MODULE_DESCRIPTION("PWM driver for Intel LPSS");
182MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>");
183MODULE_LICENSE("GPL v2");