Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Intel Low Power Subsystem PWM controller driver |
| 3 | * |
| 4 | * Copyright (C) 2014, Intel Corporation |
| 5 | * Author: Mika Westerberg <mika.westerberg@linux.intel.com> |
| 6 | * Author: Chew Kean Ho <kean.ho.chew@intel.com> |
| 7 | * Author: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> |
| 8 | * Author: Chew Chiau Ee <chiau.ee.chew@intel.com> |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 9 | * Author: Alan Cox <alan@linux.intel.com> |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 10 | * |
| 11 | * This program is free software; you can redistribute it and/or modify |
| 12 | * it under the terms of the GNU General Public License version 2 as |
| 13 | * published by the Free Software Foundation. |
| 14 | */ |
| 15 | |
Thierry Reding | e0c86a3 | 2014-08-23 00:22:45 +0200 | [diff] [blame] | 16 | #include <linux/io.h> |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 17 | #include <linux/kernel.h> |
| 18 | #include <linux/module.h> |
Qipeng Zha | f080be2 | 2015-10-26 12:58:27 +0200 | [diff] [blame^] | 19 | #include <linux/pm_runtime.h> |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 20 | |
Andy Shevchenko | c558e39 | 2014-08-19 19:17:35 +0300 | [diff] [blame] | 21 | #include "pwm-lpss.h" |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 22 | |
| 23 | #define PWM 0x00000000 |
| 24 | #define PWM_ENABLE BIT(31) |
| 25 | #define PWM_SW_UPDATE BIT(30) |
| 26 | #define PWM_BASE_UNIT_SHIFT 8 |
| 27 | #define PWM_BASE_UNIT_MASK 0x00ffff00 |
| 28 | #define PWM_ON_TIME_DIV_MASK 0x000000ff |
| 29 | #define PWM_DIVISION_CORRECTION 0x2 |
| 30 | #define PWM_LIMIT (0x8000 + PWM_DIVISION_CORRECTION) |
| 31 | #define NSECS_PER_SEC 1000000000UL |
| 32 | |
Mika Westerberg | 4e11f5a | 2015-10-20 16:53:05 +0300 | [diff] [blame] | 33 | /* Size of each PWM register space if multiple */ |
| 34 | #define PWM_SIZE 0x400 |
| 35 | |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 36 | struct pwm_lpss_chip { |
| 37 | struct pwm_chip chip; |
| 38 | void __iomem *regs; |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 39 | unsigned long clk_rate; |
| 40 | }; |
| 41 | |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 42 | /* BayTrail */ |
Andy Shevchenko | c558e39 | 2014-08-19 19:17:35 +0300 | [diff] [blame] | 43 | const struct pwm_lpss_boardinfo pwm_lpss_byt_info = { |
Mika Westerberg | 4e11f5a | 2015-10-20 16:53:05 +0300 | [diff] [blame] | 44 | .clk_rate = 25000000, |
| 45 | .npwm = 1, |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 46 | }; |
Andy Shevchenko | c558e39 | 2014-08-19 19:17:35 +0300 | [diff] [blame] | 47 | EXPORT_SYMBOL_GPL(pwm_lpss_byt_info); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 48 | |
Alan Cox | 373c578 | 2014-08-19 17:18:29 +0300 | [diff] [blame] | 49 | /* Braswell */ |
Andy Shevchenko | c558e39 | 2014-08-19 19:17:35 +0300 | [diff] [blame] | 50 | const struct pwm_lpss_boardinfo pwm_lpss_bsw_info = { |
Mika Westerberg | 4e11f5a | 2015-10-20 16:53:05 +0300 | [diff] [blame] | 51 | .clk_rate = 19200000, |
| 52 | .npwm = 1, |
Alan Cox | 373c578 | 2014-08-19 17:18:29 +0300 | [diff] [blame] | 53 | }; |
Andy Shevchenko | c558e39 | 2014-08-19 19:17:35 +0300 | [diff] [blame] | 54 | EXPORT_SYMBOL_GPL(pwm_lpss_bsw_info); |
Alan Cox | 373c578 | 2014-08-19 17:18:29 +0300 | [diff] [blame] | 55 | |
Mika Westerberg | 87219cb | 2015-10-20 16:53:06 +0300 | [diff] [blame] | 56 | /* Broxton */ |
| 57 | const struct pwm_lpss_boardinfo pwm_lpss_bxt_info = { |
| 58 | .clk_rate = 19200000, |
| 59 | .npwm = 4, |
| 60 | }; |
| 61 | EXPORT_SYMBOL_GPL(pwm_lpss_bxt_info); |
| 62 | |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 63 | static inline struct pwm_lpss_chip *to_lpwm(struct pwm_chip *chip) |
| 64 | { |
| 65 | return container_of(chip, struct pwm_lpss_chip, chip); |
| 66 | } |
| 67 | |
Mika Westerberg | 4e11f5a | 2015-10-20 16:53:05 +0300 | [diff] [blame] | 68 | static inline u32 pwm_lpss_read(const struct pwm_device *pwm) |
| 69 | { |
| 70 | struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip); |
| 71 | |
| 72 | return readl(lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM); |
| 73 | } |
| 74 | |
| 75 | static inline void pwm_lpss_write(const struct pwm_device *pwm, u32 value) |
| 76 | { |
| 77 | struct pwm_lpss_chip *lpwm = to_lpwm(pwm->chip); |
| 78 | |
| 79 | writel(value, lpwm->regs + pwm->hwpwm * PWM_SIZE + PWM); |
| 80 | } |
| 81 | |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 82 | static int pwm_lpss_config(struct pwm_chip *chip, struct pwm_device *pwm, |
| 83 | int duty_ns, int period_ns) |
| 84 | { |
| 85 | struct pwm_lpss_chip *lpwm = to_lpwm(chip); |
| 86 | u8 on_time_div; |
| 87 | unsigned long c; |
| 88 | unsigned long long base_unit, freq = NSECS_PER_SEC; |
| 89 | u32 ctrl; |
| 90 | |
| 91 | do_div(freq, period_ns); |
| 92 | |
| 93 | /* The equation is: base_unit = ((freq / c) * 65536) + correction */ |
| 94 | base_unit = freq * 65536; |
| 95 | |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 96 | c = lpwm->clk_rate; |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 97 | if (!c) |
| 98 | return -EINVAL; |
| 99 | |
| 100 | do_div(base_unit, c); |
| 101 | base_unit += PWM_DIVISION_CORRECTION; |
| 102 | if (base_unit > PWM_LIMIT) |
| 103 | return -EINVAL; |
| 104 | |
| 105 | if (duty_ns <= 0) |
| 106 | duty_ns = 1; |
| 107 | on_time_div = 255 - (255 * duty_ns / period_ns); |
| 108 | |
Qipeng Zha | f080be2 | 2015-10-26 12:58:27 +0200 | [diff] [blame^] | 109 | pm_runtime_get_sync(chip->dev); |
| 110 | |
Mika Westerberg | 4e11f5a | 2015-10-20 16:53:05 +0300 | [diff] [blame] | 111 | ctrl = pwm_lpss_read(pwm); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 112 | ctrl &= ~(PWM_BASE_UNIT_MASK | PWM_ON_TIME_DIV_MASK); |
| 113 | ctrl |= (u16) base_unit << PWM_BASE_UNIT_SHIFT; |
| 114 | ctrl |= on_time_div; |
| 115 | /* request PWM to update on next cycle */ |
| 116 | ctrl |= PWM_SW_UPDATE; |
Mika Westerberg | 4e11f5a | 2015-10-20 16:53:05 +0300 | [diff] [blame] | 117 | pwm_lpss_write(pwm, ctrl); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 118 | |
Qipeng Zha | f080be2 | 2015-10-26 12:58:27 +0200 | [diff] [blame^] | 119 | pm_runtime_put(chip->dev); |
| 120 | |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 121 | return 0; |
| 122 | } |
| 123 | |
| 124 | static int pwm_lpss_enable(struct pwm_chip *chip, struct pwm_device *pwm) |
| 125 | { |
Qipeng Zha | f080be2 | 2015-10-26 12:58:27 +0200 | [diff] [blame^] | 126 | pm_runtime_get_sync(chip->dev); |
Mika Westerberg | 4e11f5a | 2015-10-20 16:53:05 +0300 | [diff] [blame] | 127 | pwm_lpss_write(pwm, pwm_lpss_read(pwm) | PWM_ENABLE); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 128 | return 0; |
| 129 | } |
| 130 | |
| 131 | static void pwm_lpss_disable(struct pwm_chip *chip, struct pwm_device *pwm) |
| 132 | { |
Mika Westerberg | 4e11f5a | 2015-10-20 16:53:05 +0300 | [diff] [blame] | 133 | pwm_lpss_write(pwm, pwm_lpss_read(pwm) & ~PWM_ENABLE); |
Qipeng Zha | f080be2 | 2015-10-26 12:58:27 +0200 | [diff] [blame^] | 134 | pm_runtime_put(chip->dev); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 135 | } |
| 136 | |
| 137 | static const struct pwm_ops pwm_lpss_ops = { |
Mika Westerberg | 4e11f5a | 2015-10-20 16:53:05 +0300 | [diff] [blame] | 138 | .free = pwm_lpss_disable, |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 139 | .config = pwm_lpss_config, |
| 140 | .enable = pwm_lpss_enable, |
| 141 | .disable = pwm_lpss_disable, |
| 142 | .owner = THIS_MODULE, |
| 143 | }; |
| 144 | |
Andy Shevchenko | c558e39 | 2014-08-19 19:17:35 +0300 | [diff] [blame] | 145 | struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r, |
| 146 | const struct pwm_lpss_boardinfo *info) |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 147 | { |
| 148 | struct pwm_lpss_chip *lpwm; |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 149 | int ret; |
| 150 | |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 151 | lpwm = devm_kzalloc(dev, sizeof(*lpwm), GFP_KERNEL); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 152 | if (!lpwm) |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 153 | return ERR_PTR(-ENOMEM); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 154 | |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 155 | lpwm->regs = devm_ioremap_resource(dev, r); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 156 | if (IS_ERR(lpwm->regs)) |
Thierry Reding | 89c0339 | 2014-05-07 10:27:57 +0200 | [diff] [blame] | 157 | return ERR_CAST(lpwm->regs); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 158 | |
Heikki Krogerus | 65accd8 | 2014-05-09 11:35:21 +0300 | [diff] [blame] | 159 | lpwm->clk_rate = info->clk_rate; |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 160 | lpwm->chip.dev = dev; |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 161 | lpwm->chip.ops = &pwm_lpss_ops; |
| 162 | lpwm->chip.base = -1; |
Mika Westerberg | 4e11f5a | 2015-10-20 16:53:05 +0300 | [diff] [blame] | 163 | lpwm->chip.npwm = info->npwm; |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 164 | |
| 165 | ret = pwmchip_add(&lpwm->chip); |
| 166 | if (ret) { |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 167 | dev_err(dev, "failed to add PWM chip: %d\n", ret); |
| 168 | return ERR_PTR(ret); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 169 | } |
| 170 | |
Alan Cox | 093e00b | 2014-04-18 19:17:40 +0800 | [diff] [blame] | 171 | return lpwm; |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 172 | } |
Andy Shevchenko | c558e39 | 2014-08-19 19:17:35 +0300 | [diff] [blame] | 173 | EXPORT_SYMBOL_GPL(pwm_lpss_probe); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 174 | |
Andy Shevchenko | c558e39 | 2014-08-19 19:17:35 +0300 | [diff] [blame] | 175 | int pwm_lpss_remove(struct pwm_lpss_chip *lpwm) |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 176 | { |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 177 | return pwmchip_remove(&lpwm->chip); |
| 178 | } |
Andy Shevchenko | c558e39 | 2014-08-19 19:17:35 +0300 | [diff] [blame] | 179 | EXPORT_SYMBOL_GPL(pwm_lpss_remove); |
Mika Westerberg | d16a5aa | 2014-03-20 22:04:23 +0800 | [diff] [blame] | 180 | |
| 181 | MODULE_DESCRIPTION("PWM driver for Intel LPSS"); |
| 182 | MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>"); |
| 183 | MODULE_LICENSE("GPL v2"); |