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Philipp Zabelb7482f52008-05-28 17:58:06 +01001/*
2 * uda1380.c - Philips UDA1380 ALSA SoC audio driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
Philipp Zabel1abd9182009-06-15 22:18:23 +02008 * Copyright (c) 2007-2009 Philipp Zabel <philipp.zabel@gmail.com>
Philipp Zabelb7482f52008-05-28 17:58:06 +01009 *
10 * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
11 * codec model.
12 *
13 * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
14 * Copyright 2005 Openedhand Ltd.
15 */
16
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/types.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010020#include <linux/slab.h>
21#include <linux/errno.h>
Philipp Zabel1abd9182009-06-15 22:18:23 +020022#include <linux/gpio.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010023#include <linux/delay.h>
24#include <linux/i2c.h>
Philipp Zabelef9e5e52009-03-03 16:10:54 +010025#include <linux/workqueue.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010026#include <sound/core.h>
27#include <sound/control.h>
28#include <sound/initval.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010029#include <sound/soc.h>
30#include <sound/soc-dapm.h>
31#include <sound/tlv.h>
Philipp Zabel1abd9182009-06-15 22:18:23 +020032#include <sound/uda1380.h>
Philipp Zabelb7482f52008-05-28 17:58:06 +010033
34#include "uda1380.h"
35
Philipp Zabel1abd9182009-06-15 22:18:23 +020036/* codec private data */
37struct uda1380_priv {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000038 struct snd_soc_codec *codec;
Philipp Zabel1abd9182009-06-15 22:18:23 +020039 u16 reg_cache[UDA1380_CACHEREGNUM];
40 unsigned int dac_clk;
41 struct work_struct work;
42};
43
Philipp Zabelb7482f52008-05-28 17:58:06 +010044/*
45 * uda1380 register cache
46 */
47static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
48 0x0502, 0x0000, 0x0000, 0x3f3f,
49 0x0202, 0x0000, 0x0000, 0x0000,
50 0x0000, 0x0000, 0x0000, 0x0000,
51 0x0000, 0x0000, 0x0000, 0x0000,
52 0x0000, 0xff00, 0x0000, 0x4800,
53 0x0000, 0x0000, 0x0000, 0x0000,
54 0x0000, 0x0000, 0x0000, 0x0000,
55 0x0000, 0x0000, 0x0000, 0x0000,
56 0x0000, 0x8000, 0x0002, 0x0000,
57};
58
Philipp Zabelef9e5e52009-03-03 16:10:54 +010059static unsigned long uda1380_cache_dirty;
60
Philipp Zabelb7482f52008-05-28 17:58:06 +010061/*
62 * read uda1380 register cache
63 */
64static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
65 unsigned int reg)
66{
67 u16 *cache = codec->reg_cache;
68 if (reg == UDA1380_RESET)
69 return 0;
70 if (reg >= UDA1380_CACHEREGNUM)
71 return -1;
72 return cache[reg];
73}
74
75/*
76 * write uda1380 register cache
77 */
78static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
79 u16 reg, unsigned int value)
80{
81 u16 *cache = codec->reg_cache;
Philipp Zabelef9e5e52009-03-03 16:10:54 +010082
Philipp Zabelb7482f52008-05-28 17:58:06 +010083 if (reg >= UDA1380_CACHEREGNUM)
84 return;
Philipp Zabelef9e5e52009-03-03 16:10:54 +010085 if ((reg >= 0x10) && (cache[reg] != value))
86 set_bit(reg - 0x10, &uda1380_cache_dirty);
Philipp Zabelb7482f52008-05-28 17:58:06 +010087 cache[reg] = value;
88}
89
90/*
91 * write to the UDA1380 register space
92 */
93static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
94 unsigned int value)
95{
96 u8 data[3];
97
98 /* data is
99 * data[0] is register offset
100 * data[1] is MS byte
101 * data[2] is LS byte
102 */
103 data[0] = reg;
104 data[1] = (value & 0xff00) >> 8;
105 data[2] = value & 0x00ff;
106
107 uda1380_write_reg_cache(codec, reg, value);
108
109 /* the interpolator & decimator regs must only be written when the
110 * codec DAI is active.
111 */
112 if (!codec->active && (reg >= UDA1380_MVOL))
113 return 0;
114 pr_debug("uda1380: hw write %x val %x\n", reg, value);
115 if (codec->hw_write(codec->control_data, data, 3) == 3) {
116 unsigned int val;
117 i2c_master_send(codec->control_data, data, 1);
118 i2c_master_recv(codec->control_data, data, 2);
119 val = (data[0]<<8) | data[1];
120 if (val != value) {
121 pr_debug("uda1380: READ BACK VAL %x\n",
122 (data[0]<<8) | data[1]);
123 return -EIO;
124 }
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100125 if (reg >= 0x10)
126 clear_bit(reg - 0x10, &uda1380_cache_dirty);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100127 return 0;
128 } else
129 return -EIO;
130}
131
132#define uda1380_reset(c) uda1380_write(c, UDA1380_RESET, 0)
133
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100134static void uda1380_flush_work(struct work_struct *work)
135{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000136 struct uda1380_priv *uda1380 = container_of(work, struct uda1380_priv, work);
137 struct snd_soc_codec *uda1380_codec = uda1380->codec;
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100138 int bit, reg;
139
Akinobu Mita984b3f52010-03-05 13:41:37 -0800140 for_each_set_bit(bit, &uda1380_cache_dirty, UDA1380_CACHEREGNUM - 0x10) {
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100141 reg = 0x10 + bit;
142 pr_debug("uda1380: flush reg %x val %x:\n", reg,
143 uda1380_read_reg_cache(uda1380_codec, reg));
144 uda1380_write(uda1380_codec, reg,
145 uda1380_read_reg_cache(uda1380_codec, reg));
146 clear_bit(bit, &uda1380_cache_dirty);
147 }
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000148
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100149}
150
Philipp Zabelb7482f52008-05-28 17:58:06 +0100151/* declarations of ALSA reg_elem_REAL controls */
152static const char *uda1380_deemp[] = {
153 "None",
154 "32kHz",
155 "44.1kHz",
156 "48kHz",
157 "96kHz",
158};
159static const char *uda1380_input_sel[] = {
160 "Line",
161 "Mic + Line R",
162 "Line L",
163 "Mic",
164};
165static const char *uda1380_output_sel[] = {
166 "DAC",
167 "Analog Mixer",
168};
169static const char *uda1380_spf_mode[] = {
170 "Flat",
171 "Minimum1",
172 "Minimum2",
173 "Maximum"
174};
175static const char *uda1380_capture_sel[] = {
176 "ADC",
177 "Digital Mixer"
178};
179static const char *uda1380_sel_ns[] = {
180 "3rd-order",
181 "5th-order"
182};
183static const char *uda1380_mix_control[] = {
184 "off",
185 "PCM only",
186 "before sound processing",
187 "after sound processing"
188};
189static const char *uda1380_sdet_setting[] = {
190 "3200",
191 "4800",
192 "9600",
193 "19200"
194};
195static const char *uda1380_os_setting[] = {
196 "single-speed",
197 "double-speed (no mixing)",
198 "quad-speed (no mixing)"
199};
200
201static const struct soc_enum uda1380_deemp_enum[] = {
202 SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, 5, uda1380_deemp),
203 SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, 5, uda1380_deemp),
204};
205static const struct soc_enum uda1380_input_sel_enum =
206 SOC_ENUM_SINGLE(UDA1380_ADC, 2, 4, uda1380_input_sel); /* SEL_MIC, SEL_LNA */
207static const struct soc_enum uda1380_output_sel_enum =
208 SOC_ENUM_SINGLE(UDA1380_PM, 7, 2, uda1380_output_sel); /* R02_EN_AVC */
209static const struct soc_enum uda1380_spf_enum =
210 SOC_ENUM_SINGLE(UDA1380_MODE, 14, 4, uda1380_spf_mode); /* M */
211static const struct soc_enum uda1380_capture_sel_enum =
212 SOC_ENUM_SINGLE(UDA1380_IFACE, 6, 2, uda1380_capture_sel); /* SEL_SOURCE */
213static const struct soc_enum uda1380_sel_ns_enum =
214 SOC_ENUM_SINGLE(UDA1380_MIXER, 14, 2, uda1380_sel_ns); /* SEL_NS */
215static const struct soc_enum uda1380_mix_enum =
216 SOC_ENUM_SINGLE(UDA1380_MIXER, 12, 4, uda1380_mix_control); /* MIX, MIX_POS */
217static const struct soc_enum uda1380_sdet_enum =
218 SOC_ENUM_SINGLE(UDA1380_MIXER, 4, 4, uda1380_sdet_setting); /* SD_VALUE */
219static const struct soc_enum uda1380_os_enum =
220 SOC_ENUM_SINGLE(UDA1380_MIXER, 0, 3, uda1380_os_setting); /* OS */
221
222/*
223 * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
224 */
225static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
226
227/*
228 * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
229 * from -66 dB in 0.5 dB steps (2 dB steps, really) and
230 * from -52 dB in 0.25 dB steps
231 */
232static const unsigned int mvol_tlv[] = {
233 TLV_DB_RANGE_HEAD(3),
234 0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
235 16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
236 44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0),
237};
238
239/*
240 * from -72 dB in 1.5 dB steps (6 dB steps really),
241 * from -66 dB in 0.75 dB steps (3 dB steps really),
242 * from -60 dB in 0.5 dB steps (2 dB steps really) and
243 * from -46 dB in 0.25 dB steps
244 */
245static const unsigned int vc_tlv[] = {
246 TLV_DB_RANGE_HEAD(4),
247 0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
248 8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
249 16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
250 44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0),
251};
252
253/* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
254static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
255
256/* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
257 * off at 18 dB max) */
258static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
259
260/* from -63 to 24 dB in 0.5 dB steps (-128...48) */
261static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
262
263/* from 0 to 24 dB in 3 dB steps */
264static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
265
266/* from 0 to 30 dB in 2 dB steps */
267static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
268
269static const struct snd_kcontrol_new uda1380_snd_controls[] = {
270 SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv), /* AVCR, AVCL */
271 SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
272 SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv), /* VC2 */
273 SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv), /* VC1 */
274 SOC_ENUM("Sound Processing Filter", uda1380_spf_enum), /* M */
275 SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv), /* TRL, TRR */
276 SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv), /* BBL, BBR */
277/**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */
278 SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */
279 SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */
280 SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */
281 SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */
282 SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
283 SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
284 SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
Philipp Zabelb7482f52008-05-28 17:58:06 +0100285 SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
286 SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
287 SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
288 SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */
289/**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */
290 SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
291 SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */
292 SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */
293 SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0), /* SKIP_DCFIL (before decimator) */
294 SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0), /* EN_DCFIL (at output of decimator) */
295 SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0), /* TODO: enum, see table 62 */
296 SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1), /* AGC_LEVEL */
297 /* -5.5, -8, -11.5, -14 dBFS */
298 SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
299};
300
Philipp Zabelb7482f52008-05-28 17:58:06 +0100301/* Input mux */
302static const struct snd_kcontrol_new uda1380_input_mux_control =
303 SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
304
305/* Output mux */
306static const struct snd_kcontrol_new uda1380_output_mux_control =
307 SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
308
309/* Capture mux */
310static const struct snd_kcontrol_new uda1380_capture_mux_control =
311 SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
312
313
314static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
315 SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
316 &uda1380_input_mux_control),
317 SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
318 &uda1380_output_mux_control),
319 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
320 &uda1380_capture_mux_control),
321 SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
322 SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
323 SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
324 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
325 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
326 SND_SOC_DAPM_INPUT("VINM"),
327 SND_SOC_DAPM_INPUT("VINL"),
328 SND_SOC_DAPM_INPUT("VINR"),
329 SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
330 SND_SOC_DAPM_OUTPUT("VOUTLHP"),
331 SND_SOC_DAPM_OUTPUT("VOUTRHP"),
332 SND_SOC_DAPM_OUTPUT("VOUTL"),
333 SND_SOC_DAPM_OUTPUT("VOUTR"),
334 SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
335 SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
336};
337
338static const struct snd_soc_dapm_route audio_map[] = {
339
340 /* output mux */
341 {"HeadPhone Driver", NULL, "Output Mux"},
342 {"VOUTR", NULL, "Output Mux"},
343 {"VOUTL", NULL, "Output Mux"},
344
345 {"Analog Mixer", NULL, "VINR"},
346 {"Analog Mixer", NULL, "VINL"},
347 {"Analog Mixer", NULL, "DAC"},
348
349 {"Output Mux", "DAC", "DAC"},
350 {"Output Mux", "Analog Mixer", "Analog Mixer"},
351
352 /* {"DAC", "Digital Mixer", "I2S" } */
353
354 /* headphone driver */
355 {"VOUTLHP", NULL, "HeadPhone Driver"},
356 {"VOUTRHP", NULL, "HeadPhone Driver"},
357
358 /* input mux */
359 {"Left ADC", NULL, "Input Mux"},
360 {"Input Mux", "Mic", "Mic LNA"},
361 {"Input Mux", "Mic + Line R", "Mic LNA"},
362 {"Input Mux", "Line L", "Left PGA"},
363 {"Input Mux", "Line", "Left PGA"},
364
365 /* right input */
366 {"Right ADC", "Mic + Line R", "Right PGA"},
367 {"Right ADC", "Line", "Right PGA"},
368
369 /* inputs */
370 {"Mic LNA", NULL, "VINM"},
371 {"Left PGA", NULL, "VINL"},
372 {"Right PGA", NULL, "VINR"},
373};
374
375static int uda1380_add_widgets(struct snd_soc_codec *codec)
376{
377 snd_soc_dapm_new_controls(codec, uda1380_dapm_widgets,
378 ARRAY_SIZE(uda1380_dapm_widgets));
379
380 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
381
Philipp Zabelb7482f52008-05-28 17:58:06 +0100382 return 0;
383}
384
Philipp Zabel5b247442009-02-03 17:19:40 +0100385static int uda1380_set_dai_fmt_both(struct snd_soc_dai *codec_dai,
Philipp Zabelb7482f52008-05-28 17:58:06 +0100386 unsigned int fmt)
387{
388 struct snd_soc_codec *codec = codec_dai->codec;
389 int iface;
390
391 /* set up DAI based upon fmt */
392 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
393 iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
394
Philipp Zabelb7482f52008-05-28 17:58:06 +0100395 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
396 case SND_SOC_DAIFMT_I2S:
397 iface |= R01_SFORI_I2S | R01_SFORO_I2S;
398 break;
399 case SND_SOC_DAIFMT_LSB:
Philipp Zabel5b247442009-02-03 17:19:40 +0100400 iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100401 break;
402 case SND_SOC_DAIFMT_MSB:
Philipp Zabel5b247442009-02-03 17:19:40 +0100403 iface |= R01_SFORI_MSB | R01_SFORO_MSB;
404 }
405
Philipp Zabel5f2a9382009-03-03 16:10:52 +0100406 /* DATAI is slave only, so in single-link mode, this has to be slave */
407 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
408 return -EINVAL;
Philipp Zabel5b247442009-02-03 17:19:40 +0100409
410 uda1380_write(codec, UDA1380_IFACE, iface);
411
412 return 0;
413}
414
415static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
416 unsigned int fmt)
417{
418 struct snd_soc_codec *codec = codec_dai->codec;
419 int iface;
420
421 /* set up DAI based upon fmt */
422 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
423 iface &= ~R01_SFORI_MASK;
424
425 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
426 case SND_SOC_DAIFMT_I2S:
427 iface |= R01_SFORI_I2S;
428 break;
429 case SND_SOC_DAIFMT_LSB:
430 iface |= R01_SFORI_LSB16;
431 break;
432 case SND_SOC_DAIFMT_MSB:
433 iface |= R01_SFORI_MSB;
434 }
435
Philipp Zabel5f2a9382009-03-03 16:10:52 +0100436 /* DATAI is slave only, so this has to be slave */
437 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
438 return -EINVAL;
439
Philipp Zabel5b247442009-02-03 17:19:40 +0100440 uda1380_write(codec, UDA1380_IFACE, iface);
441
442 return 0;
443}
444
445static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
446 unsigned int fmt)
447{
448 struct snd_soc_codec *codec = codec_dai->codec;
449 int iface;
450
451 /* set up DAI based upon fmt */
452 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
453 iface &= ~(R01_SIM | R01_SFORO_MASK);
454
455 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
456 case SND_SOC_DAIFMT_I2S:
457 iface |= R01_SFORO_I2S;
458 break;
459 case SND_SOC_DAIFMT_LSB:
460 iface |= R01_SFORO_LSB16;
461 break;
462 case SND_SOC_DAIFMT_MSB:
463 iface |= R01_SFORO_MSB;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100464 }
465
466 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
467 iface |= R01_SIM;
468
469 uda1380_write(codec, UDA1380_IFACE, iface);
470
471 return 0;
472}
473
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100474static int uda1380_trigger(struct snd_pcm_substream *substream, int cmd,
475 struct snd_soc_dai *dai)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100476{
477 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000478 struct snd_soc_codec *codec = rtd->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900479 struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100480 int mixer = uda1380_read_reg_cache(codec, UDA1380_MIXER);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100481
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100482 switch (cmd) {
483 case SNDRV_PCM_TRIGGER_START:
484 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
485 uda1380_write_reg_cache(codec, UDA1380_MIXER,
486 mixer & ~R14_SILENCE);
Philipp Zabel1abd9182009-06-15 22:18:23 +0200487 schedule_work(&uda1380->work);
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100488 break;
489 case SNDRV_PCM_TRIGGER_STOP:
490 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
491 uda1380_write_reg_cache(codec, UDA1380_MIXER,
492 mixer | R14_SILENCE);
Philipp Zabel1abd9182009-06-15 22:18:23 +0200493 schedule_work(&uda1380->work);
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100494 break;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100495 }
Philipp Zabelb7482f52008-05-28 17:58:06 +0100496 return 0;
497}
498
499static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
Mark Browndee89c42008-11-18 22:11:38 +0000500 struct snd_pcm_hw_params *params,
501 struct snd_soc_dai *dai)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100502{
503 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000504 struct snd_soc_codec *codec = rtd->codec;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100505 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
506
507 /* set WSPLL power and divider if running from this clock */
508 if (clk & R00_DAC_CLK) {
509 int rate = params_rate(params);
510 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
511 clk &= ~0x3; /* clear SEL_LOOP_DIV */
512 switch (rate) {
513 case 6250 ... 12500:
514 clk |= 0x0;
515 break;
516 case 12501 ... 25000:
517 clk |= 0x1;
518 break;
519 case 25001 ... 50000:
520 clk |= 0x2;
521 break;
522 case 50001 ... 100000:
523 clk |= 0x3;
524 break;
525 }
526 uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
527 }
528
529 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
530 clk |= R00_EN_DAC | R00_EN_INT;
531 else
532 clk |= R00_EN_ADC | R00_EN_DEC;
533
534 uda1380_write(codec, UDA1380_CLK, clk);
535 return 0;
536}
537
Mark Browndee89c42008-11-18 22:11:38 +0000538static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream,
539 struct snd_soc_dai *dai)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100540{
541 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000542 struct snd_soc_codec *codec = rtd->codec;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100543 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
544
545 /* shut down WSPLL power if running from this clock */
546 if (clk & R00_DAC_CLK) {
547 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
548 uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
549 }
550
551 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
552 clk &= ~(R00_EN_DAC | R00_EN_INT);
553 else
554 clk &= ~(R00_EN_ADC | R00_EN_DEC);
555
556 uda1380_write(codec, UDA1380_CLK, clk);
557}
558
Philipp Zabelb7482f52008-05-28 17:58:06 +0100559static int uda1380_set_bias_level(struct snd_soc_codec *codec,
560 enum snd_soc_bias_level level)
561{
562 int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
563
564 switch (level) {
565 case SND_SOC_BIAS_ON:
566 case SND_SOC_BIAS_PREPARE:
567 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
568 break;
569 case SND_SOC_BIAS_STANDBY:
570 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS);
571 break;
572 case SND_SOC_BIAS_OFF:
573 uda1380_write(codec, UDA1380_PM, 0x0);
574 break;
575 }
576 codec->bias_level = level;
577 return 0;
578}
579
580#define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
581 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
582 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
583
Eric Miao6335d052009-03-03 09:41:00 +0800584static struct snd_soc_dai_ops uda1380_dai_ops = {
585 .hw_params = uda1380_pcm_hw_params,
586 .shutdown = uda1380_pcm_shutdown,
Mark Brown65ec1cd2009-03-11 16:51:31 +0000587 .trigger = uda1380_trigger,
Eric Miao6335d052009-03-03 09:41:00 +0800588 .set_fmt = uda1380_set_dai_fmt_both,
589};
590
591static struct snd_soc_dai_ops uda1380_dai_ops_playback = {
592 .hw_params = uda1380_pcm_hw_params,
593 .shutdown = uda1380_pcm_shutdown,
Mark Brown65ec1cd2009-03-11 16:51:31 +0000594 .trigger = uda1380_trigger,
Eric Miao6335d052009-03-03 09:41:00 +0800595 .set_fmt = uda1380_set_dai_fmt_playback,
596};
597
598static struct snd_soc_dai_ops uda1380_dai_ops_capture = {
599 .hw_params = uda1380_pcm_hw_params,
600 .shutdown = uda1380_pcm_shutdown,
Mark Brown65ec1cd2009-03-11 16:51:31 +0000601 .trigger = uda1380_trigger,
Eric Miao6335d052009-03-03 09:41:00 +0800602 .set_fmt = uda1380_set_dai_fmt_capture,
603};
604
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000605static struct snd_soc_dai_driver uda1380_dai[] = {
Philipp Zabelb7482f52008-05-28 17:58:06 +0100606{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000607 .name = "uda1380-hifi",
Philipp Zabelb7482f52008-05-28 17:58:06 +0100608 .playback = {
609 .stream_name = "Playback",
610 .channels_min = 1,
611 .channels_max = 2,
612 .rates = UDA1380_RATES,
613 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
614 .capture = {
615 .stream_name = "Capture",
616 .channels_min = 1,
617 .channels_max = 2,
618 .rates = UDA1380_RATES,
619 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
Eric Miao6335d052009-03-03 09:41:00 +0800620 .ops = &uda1380_dai_ops,
Philipp Zabelb7482f52008-05-28 17:58:06 +0100621},
622{ /* playback only - dual interface */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000623 .name = "uda1380-hifi-playback",
Philipp Zabelb7482f52008-05-28 17:58:06 +0100624 .playback = {
625 .stream_name = "Playback",
626 .channels_min = 1,
627 .channels_max = 2,
628 .rates = UDA1380_RATES,
629 .formats = SNDRV_PCM_FMTBIT_S16_LE,
630 },
Eric Miao6335d052009-03-03 09:41:00 +0800631 .ops = &uda1380_dai_ops_playback,
Philipp Zabelb7482f52008-05-28 17:58:06 +0100632},
633{ /* capture only - dual interface*/
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000634 .name = "uda1380-hifi-capture",
Philipp Zabelb7482f52008-05-28 17:58:06 +0100635 .capture = {
636 .stream_name = "Capture",
637 .channels_min = 1,
638 .channels_max = 2,
639 .rates = UDA1380_RATES,
640 .formats = SNDRV_PCM_FMTBIT_S16_LE,
641 },
Eric Miao6335d052009-03-03 09:41:00 +0800642 .ops = &uda1380_dai_ops_capture,
Philipp Zabelb7482f52008-05-28 17:58:06 +0100643},
644};
Philipp Zabelb7482f52008-05-28 17:58:06 +0100645
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000646static int uda1380_suspend(struct snd_soc_codec *codec, pm_message_t state)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100647{
Philipp Zabelb7482f52008-05-28 17:58:06 +0100648 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
649 return 0;
650}
651
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000652static int uda1380_resume(struct snd_soc_codec *codec)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100653{
Philipp Zabelb7482f52008-05-28 17:58:06 +0100654 int i;
655 u8 data[2];
656 u16 *cache = codec->reg_cache;
657
658 /* Sync reg_cache with the hardware */
659 for (i = 0; i < ARRAY_SIZE(uda1380_reg); i++) {
660 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
661 data[1] = cache[i] & 0x00ff;
662 codec->hw_write(codec->control_data, data, 2);
663 }
664 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100665 return 0;
666}
667
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000668static int uda1380_probe(struct snd_soc_codec *codec)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100669{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000670 struct uda1380_platform_data *pdata =codec->dev->platform_data;
671 struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
672 int ret;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100673
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000674 codec->hw_write = (hw_write_t)i2c_master_send;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100675
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000676 if (!pdata || !pdata->gpio_power || !pdata->gpio_reset)
677 return -EINVAL;
Philipp Zabelef9e5e52009-03-03 16:10:54 +0100678
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000679 ret = gpio_request(pdata->gpio_power, "uda1380 power");
680 if (ret)
681 return ret;
682 ret = gpio_request(pdata->gpio_reset, "uda1380 reset");
683 if (ret)
684 goto err_gpio;
685
686 gpio_direction_output(pdata->gpio_power, 1);
687
688 /* we may need to have the clock running here - pH5 */
689 gpio_direction_output(pdata->gpio_reset, 1);
690 udelay(5);
691 gpio_set_value(pdata->gpio_reset, 0);
692
693 ret = uda1380_reset(codec);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100694 if (ret < 0) {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000695 dev_err(codec->dev, "Failed to issue reset\n");
696 goto err_reset;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100697 }
698
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000699 INIT_WORK(&uda1380->work, uda1380_flush_work);
700
Philipp Zabelb7482f52008-05-28 17:58:06 +0100701 /* power on device */
702 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
703 /* set clock input */
Philipp Zabel1abd9182009-06-15 22:18:23 +0200704 switch (pdata->dac_clk) {
Philipp Zabelb7482f52008-05-28 17:58:06 +0100705 case UDA1380_DAC_CLK_SYSCLK:
706 uda1380_write(codec, UDA1380_CLK, 0);
707 break;
708 case UDA1380_DAC_CLK_WSPLL:
709 uda1380_write(codec, UDA1380_CLK, R00_DAC_CLK);
710 break;
711 }
712
Ian Molton3e8e1952009-01-09 00:23:21 +0000713 snd_soc_add_controls(codec, uda1380_snd_controls,
714 ARRAY_SIZE(uda1380_snd_controls));
Philipp Zabelb7482f52008-05-28 17:58:06 +0100715 uda1380_add_widgets(codec);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100716
Philipp Zabel1abd9182009-06-15 22:18:23 +0200717 return 0;
718
Philipp Zabel1abd9182009-06-15 22:18:23 +0200719err_reset:
720 gpio_set_value(pdata->gpio_power, 0);
721 gpio_free(pdata->gpio_reset);
722err_gpio:
723 gpio_free(pdata->gpio_power);
Philipp Zabel1abd9182009-06-15 22:18:23 +0200724 return ret;
725}
726
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000727/* power down chip */
728static int uda1380_remove(struct snd_soc_codec *codec)
Philipp Zabel1abd9182009-06-15 22:18:23 +0200729{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000730 struct uda1380_platform_data *pdata =codec->dev->platform_data;
Philipp Zabel1abd9182009-06-15 22:18:23 +0200731
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000732 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
Philipp Zabel1abd9182009-06-15 22:18:23 +0200733
734 gpio_set_value(pdata->gpio_power, 0);
735 gpio_free(pdata->gpio_reset);
736 gpio_free(pdata->gpio_power);
737
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000738 return 0;
Philipp Zabel1abd9182009-06-15 22:18:23 +0200739}
Philipp Zabelb7482f52008-05-28 17:58:06 +0100740
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000741static struct snd_soc_codec_driver soc_codec_dev_uda1380 = {
742 .probe = uda1380_probe,
743 .remove = uda1380_remove,
744 .suspend = uda1380_suspend,
745 .resume = uda1380_resume,
746 .read = uda1380_read_reg_cache,
747 .write = uda1380_write,
748 .set_bias_level = uda1380_set_bias_level,
749 .reg_cache_size = ARRAY_SIZE(uda1380_reg),
750 .reg_word_size = sizeof(u16),
751 .reg_cache_default = uda1380_reg,
752 .reg_cache_step = 1,
753};
754
Philipp Zabelb7482f52008-05-28 17:58:06 +0100755#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
Philipp Zabel1abd9182009-06-15 22:18:23 +0200756static __devinit int uda1380_i2c_probe(struct i2c_client *i2c,
757 const struct i2c_device_id *id)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100758{
Philipp Zabel1abd9182009-06-15 22:18:23 +0200759 struct uda1380_priv *uda1380;
Philipp Zabelb7482f52008-05-28 17:58:06 +0100760 int ret;
761
Philipp Zabel1abd9182009-06-15 22:18:23 +0200762 uda1380 = kzalloc(sizeof(struct uda1380_priv), GFP_KERNEL);
763 if (uda1380 == NULL)
764 return -ENOMEM;
765
Philipp Zabel1abd9182009-06-15 22:18:23 +0200766 i2c_set_clientdata(i2c, uda1380);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100767
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000768 ret = snd_soc_register_codec(&i2c->dev,
769 &soc_codec_dev_uda1380, uda1380_dai, ARRAY_SIZE(uda1380_dai));
770 if (ret < 0)
Philipp Zabel1abd9182009-06-15 22:18:23 +0200771 kfree(uda1380);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100772 return ret;
773}
774
Philipp Zabel1abd9182009-06-15 22:18:23 +0200775static int __devexit uda1380_i2c_remove(struct i2c_client *i2c)
Philipp Zabelb7482f52008-05-28 17:58:06 +0100776{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000777 snd_soc_unregister_codec(&i2c->dev);
778 kfree(i2c_get_clientdata(i2c));
Philipp Zabelb7482f52008-05-28 17:58:06 +0100779 return 0;
780}
781
Jean Delvare88fc39d2008-09-01 18:46:58 +0100782static const struct i2c_device_id uda1380_i2c_id[] = {
783 { "uda1380", 0 },
784 { }
785};
786MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id);
Philipp Zabelb7482f52008-05-28 17:58:06 +0100787
788static struct i2c_driver uda1380_i2c_driver = {
789 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000790 .name = "uda1380-codec",
Philipp Zabelb7482f52008-05-28 17:58:06 +0100791 .owner = THIS_MODULE,
792 },
Jean Delvare88fc39d2008-09-01 18:46:58 +0100793 .probe = uda1380_i2c_probe,
Philipp Zabel1abd9182009-06-15 22:18:23 +0200794 .remove = __devexit_p(uda1380_i2c_remove),
Jean Delvare88fc39d2008-09-01 18:46:58 +0100795 .id_table = uda1380_i2c_id,
Philipp Zabelb7482f52008-05-28 17:58:06 +0100796};
Philipp Zabelb7482f52008-05-28 17:58:06 +0100797#endif
798
Takashi Iwaic9b3a402008-12-10 07:47:22 +0100799static int __init uda1380_modinit(void)
Mark Brown64089b82008-12-08 19:17:58 +0000800{
Philipp Zabel1abd9182009-06-15 22:18:23 +0200801 int ret;
802#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
803 ret = i2c_add_driver(&uda1380_i2c_driver);
804 if (ret != 0)
805 pr_err("Failed to register UDA1380 I2C driver: %d\n", ret);
806#endif
807 return 0;
Mark Brown64089b82008-12-08 19:17:58 +0000808}
809module_init(uda1380_modinit);
810
811static void __exit uda1380_exit(void)
812{
Philipp Zabel1abd9182009-06-15 22:18:23 +0200813#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
814 i2c_del_driver(&uda1380_i2c_driver);
815#endif
Mark Brown64089b82008-12-08 19:17:58 +0000816}
817module_exit(uda1380_exit);
818
Philipp Zabelb7482f52008-05-28 17:58:06 +0100819MODULE_AUTHOR("Giorgio Padrin");
820MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
821MODULE_LICENSE("GPL");