| Mikko Perttunen | f1b53c4 | 2017-09-05 11:43:05 +0300 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2017 NVIDIA Corporation. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify it |
| 5 | * under the terms and conditions of the GNU General Public License, |
| 6 | * version 2, as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 11 | * more details. |
| 12 | * |
| 13 | * You should have received a copy of the GNU General Public License |
| 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 15 | * |
| 16 | */ |
| 17 | |
| 18 | #define HOST1X_CHANNEL_DMASTART 0x0000 |
| 19 | #define HOST1X_CHANNEL_DMASTART_HI 0x0004 |
| 20 | #define HOST1X_CHANNEL_DMAPUT 0x0008 |
| 21 | #define HOST1X_CHANNEL_DMAPUT_HI 0x000c |
| 22 | #define HOST1X_CHANNEL_DMAGET 0x0010 |
| 23 | #define HOST1X_CHANNEL_DMAGET_HI 0x0014 |
| 24 | #define HOST1X_CHANNEL_DMAEND 0x0018 |
| 25 | #define HOST1X_CHANNEL_DMAEND_HI 0x001c |
| 26 | #define HOST1X_CHANNEL_DMACTRL 0x0020 |
| 27 | #define HOST1X_CHANNEL_DMACTRL_DMASTOP BIT(0) |
| 28 | #define HOST1X_CHANNEL_DMACTRL_DMAGETRST BIT(1) |
| 29 | #define HOST1X_CHANNEL_DMACTRL_DMAINITGET BIT(2) |
| 30 | #define HOST1X_CHANNEL_CMDFIFO_STAT 0x0024 |
| 31 | #define HOST1X_CHANNEL_CMDFIFO_STAT_EMPTY BIT(13) |
| 32 | #define HOST1X_CHANNEL_CMDFIFO_RDATA 0x0028 |
| 33 | #define HOST1X_CHANNEL_CMDP_OFFSET 0x0030 |
| 34 | #define HOST1X_CHANNEL_CMDP_CLASS 0x0034 |
| 35 | #define HOST1X_CHANNEL_CHANNELSTAT 0x0038 |
| 36 | #define HOST1X_CHANNEL_CMDPROC_STOP 0x0048 |
| 37 | #define HOST1X_CHANNEL_TEARDOWN 0x004c |
| 38 | |
| 39 | #define HOST1X_SYNC_SYNCPT_CPU_INCR(x) (0x6400 + 4*(x)) |
| 40 | #define HOST1X_SYNC_SYNCPT_THRESH_CPU0_INT_STATUS(x) (0x6464 + 4*(x)) |
| 41 | #define HOST1X_SYNC_SYNCPT_THRESH_INT_ENABLE_CPU0(x) (0x652c + 4*(x)) |
| 42 | #define HOST1X_SYNC_SYNCPT_THRESH_INT_DISABLE(x) (0x6590 + 4*(x)) |
| 43 | #define HOST1X_SYNC_SYNCPT_BASE(x) (0x8000 + 4*(x)) |
| 44 | #define HOST1X_SYNC_SYNCPT(x) (0x8080 + 4*(x)) |
| 45 | #define HOST1X_SYNC_SYNCPT_INT_THRESH(x) (0x8a00 + 4*(x)) |
| 46 | #define HOST1X_SYNC_SYNCPT_CH_APP(x) (0x9384 + 4*(x)) |
| 47 | #define HOST1X_SYNC_SYNCPT_CH_APP_CH(v) (((v) & 0x3f) << 8) |