blob: 42254175fcf46fd496dcad168fbd46cf1b8d9f1e [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mach-pxa/generic.c
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * Code common to all PXA machines.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
17 * need be.
18 */
Russell King2f8163b2011-07-26 10:53:52 +010019#include <linux/gpio.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
Russell Kinga09e64f2008-08-05 16:14:15 +010024#include <mach/hardware.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <asm/mach/map.h>
Eric Miao67697172008-12-18 11:10:32 +080026#include <asm/mach-types.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Russell Kingafd2fc02008-08-07 11:05:25 +010028#include <mach/reset.h>
Marek Vasutad68bb92010-11-03 16:29:35 +010029#include <mach/smemc.h>
Haojian Zhuanga4553352010-11-24 11:54:19 +080030#include <mach/pxa3xx-regs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
32#include "generic.h"
33
Eric Miao04fef222008-07-29 14:26:00 +080034void clear_reset_status(unsigned int mask)
35{
36 if (cpu_is_pxa2xx())
37 pxa2xx_clear_reset_status(mask);
Haojian Zhuanga4553352010-11-24 11:54:19 +080038 else {
39 /* RESET_STATUS_* has a 1:1 mapping with ARSR */
40 ARSR = mask;
41 }
Eric Miao04fef222008-07-29 14:26:00 +080042}
43
Eric Miao67697172008-12-18 11:10:32 +080044unsigned long get_clock_tick_rate(void)
45{
46 unsigned long clock_tick_rate;
47
48 if (cpu_is_pxa25x())
49 clock_tick_rate = 3686400;
50 else if (machine_is_mainstone())
51 clock_tick_rate = 3249600;
52 else
53 clock_tick_rate = 3250000;
54
55 return clock_tick_rate;
56}
57EXPORT_SYMBOL(get_clock_tick_rate);
58
Linus Torvalds1da177e2005-04-16 15:20:36 -070059/*
Russell King15a40332007-08-20 10:07:44 +010060 * Get the clock frequency as reflected by CCCR and the turbo flag.
61 * We assume these values have been applied via a fcs.
62 * If info is not 0 we also display the current settings.
63 */
64unsigned int get_clk_frequency_khz(int info)
65{
Eric Miao0ffcbfd2008-09-11 10:27:30 +080066 if (cpu_is_pxa25x())
Russell King15a40332007-08-20 10:07:44 +010067 return pxa25x_get_clk_frequency_khz(info);
eric miao2c8086a2007-09-11 19:13:17 -070068 else if (cpu_is_pxa27x())
Russell King15a40332007-08-20 10:07:44 +010069 return pxa27x_get_clk_frequency_khz(info);
Haojian Zhuangecf89b82010-09-19 20:09:10 -040070 return 0;
Russell King15a40332007-08-20 10:07:44 +010071}
72EXPORT_SYMBOL(get_clk_frequency_khz);
73
74/*
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 * Intel PXA2xx internal register mapping.
76 *
Marek Vasut851982c2010-10-11 02:20:19 +020077 * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
78 * and cache flush area.
Linus Torvalds1da177e2005-04-16 15:20:36 -070079 */
Marek Vasut851982c2010-10-11 02:20:19 +020080static struct map_desc common_io_desc[] __initdata = {
Deepak Saxena6f9182e2005-10-28 15:19:01 +010081 { /* Devs */
82 .virtual = 0xf2000000,
83 .pfn = __phys_to_pfn(0x40000000),
84 .length = 0x02000000,
85 .type = MT_DEVICE
Deepak Saxena6f9182e2005-10-28 15:19:01 +010086 }, { /* UNCACHED_PHYS_0 */
87 .virtual = 0xff000000,
88 .pfn = __phys_to_pfn(0x00000000),
89 .length = 0x00100000,
90 .type = MT_DEVICE
91 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070092};
93
94void __init pxa_map_io(void)
95{
Marek Vasut851982c2010-10-11 02:20:19 +020096 iotable_init(ARRAY_AND_SIZE(common_io_desc));
Linus Torvalds1da177e2005-04-16 15:20:36 -070097}