Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix |
| 3 | * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de>, Pengutronix |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
| 13 | /dts-v1/; |
Shawn Guo | 36dffd8 | 2013-04-07 10:49:34 +0800 | [diff] [blame] | 14 | #include "imx53-tqma53.dtsi" |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 15 | |
| 16 | / { |
| 17 | model = "TQ MBa53 starter kit"; |
| 18 | compatible = "tq,mba53", "tq,tqma53", "fsl,imx53"; |
Sascha Hauer | 4fa8cf7 | 2013-06-04 13:07:09 +0200 | [diff] [blame] | 19 | |
Sascha Hauer | 4fa8cf7 | 2013-06-04 13:07:09 +0200 | [diff] [blame] | 20 | backlight { |
| 21 | compatible = "pwm-backlight"; |
Laurent Pinchart | 15968f1 | 2013-07-11 16:37:47 +0200 | [diff] [blame] | 22 | pwms = <&pwm2 0 50000>; |
Sascha Hauer | 4fa8cf7 | 2013-06-04 13:07:09 +0200 | [diff] [blame] | 23 | brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>; |
| 24 | default-brightness-level = <10>; |
| 25 | enable-gpios = <&gpio7 7 0>; |
| 26 | power-supply = <®_backlight>; |
| 27 | }; |
| 28 | |
| 29 | disp1: display@disp1 { |
| 30 | compatible = "fsl,imx-parallel-display"; |
| 31 | pinctrl-names = "default"; |
| 32 | pinctrl-0 = <&pinctrl_disp1_1>; |
| 33 | crtcs = <&ipu 1>; |
| 34 | interface-pix-fmt = "rgb24"; |
| 35 | status = "disabled"; |
| 36 | }; |
Markus Niebel | eefb800 | 2013-06-04 13:07:11 +0200 | [diff] [blame] | 37 | |
Shawn Guo | a4a2aa9 | 2013-11-06 15:43:36 +0800 | [diff] [blame] | 38 | regulators { |
| 39 | compatible = "simple-bus"; |
Shawn Guo | 352d318 | 2014-02-07 23:18:30 +0800 | [diff] [blame] | 40 | #address-cells = <1>; |
| 41 | #size-cells = <0>; |
Shawn Guo | a4a2aa9 | 2013-11-06 15:43:36 +0800 | [diff] [blame] | 42 | |
Shawn Guo | 352d318 | 2014-02-07 23:18:30 +0800 | [diff] [blame] | 43 | reg_backlight: regulator@0 { |
Shawn Guo | a4a2aa9 | 2013-11-06 15:43:36 +0800 | [diff] [blame] | 44 | compatible = "regulator-fixed"; |
Shawn Guo | 352d318 | 2014-02-07 23:18:30 +0800 | [diff] [blame] | 45 | reg = <0>; |
Shawn Guo | a4a2aa9 | 2013-11-06 15:43:36 +0800 | [diff] [blame] | 46 | regulator-name = "lcd-supply"; |
| 47 | gpio = <&gpio2 5 0>; |
| 48 | startup-delay-us = <5000>; |
| 49 | enable-active-low; |
| 50 | }; |
| 51 | |
Shawn Guo | 352d318 | 2014-02-07 23:18:30 +0800 | [diff] [blame] | 52 | reg_3p2v: regulator@1 { |
Shawn Guo | a4a2aa9 | 2013-11-06 15:43:36 +0800 | [diff] [blame] | 53 | compatible = "regulator-fixed"; |
Shawn Guo | 352d318 | 2014-02-07 23:18:30 +0800 | [diff] [blame] | 54 | reg = <1>; |
Shawn Guo | a4a2aa9 | 2013-11-06 15:43:36 +0800 | [diff] [blame] | 55 | regulator-name = "3P2V"; |
| 56 | regulator-min-microvolt = <3200000>; |
| 57 | regulator-max-microvolt = <3200000>; |
| 58 | regulator-always-on; |
| 59 | }; |
Markus Niebel | eefb800 | 2013-06-04 13:07:11 +0200 | [diff] [blame] | 60 | }; |
| 61 | |
| 62 | sound { |
| 63 | compatible = "tq,imx53-mba53-sgtl5000", |
| 64 | "fsl,imx-audio-sgtl5000"; |
| 65 | model = "imx53-mba53-sgtl5000"; |
| 66 | ssi-controller = <&ssi2>; |
| 67 | audio-codec = <&codec>; |
| 68 | audio-routing = |
| 69 | "MIC_IN", "Mic Jack", |
| 70 | "Mic Jack", "Mic Bias", |
| 71 | "Headphone Jack", "HP_OUT"; |
| 72 | mux-int-port = <2>; |
| 73 | mux-ext-port = <5>; |
| 74 | }; |
Sascha Hauer | 4fa8cf7 | 2013-06-04 13:07:09 +0200 | [diff] [blame] | 75 | }; |
| 76 | |
| 77 | &ldb { |
| 78 | pinctrl-names = "default"; |
| 79 | pinctrl-0 = <&pinctrl_lvds1_1>; |
| 80 | status = "disabled"; |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 81 | }; |
| 82 | |
| 83 | &iomuxc { |
| 84 | lvds1 { |
| 85 | pinctrl_lvds1_1: lvds1-grp1 { |
Shawn Guo | e164153 | 2013-02-20 10:32:52 +0800 | [diff] [blame] | 86 | fsl,pins = < |
Steffen Trumtrar | 188e97d | 2013-06-04 13:07:14 +0200 | [diff] [blame] | 87 | MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000 |
| 88 | MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000 |
| 89 | MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000 |
| 90 | MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000 |
| 91 | MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000 |
Shawn Guo | e164153 | 2013-02-20 10:32:52 +0800 | [diff] [blame] | 92 | >; |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 93 | }; |
| 94 | |
| 95 | pinctrl_lvds1_2: lvds1-grp2 { |
Shawn Guo | e164153 | 2013-02-20 10:32:52 +0800 | [diff] [blame] | 96 | fsl,pins = < |
Steffen Trumtrar | 188e97d | 2013-06-04 13:07:14 +0200 | [diff] [blame] | 97 | MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3 0x80000000 |
| 98 | MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2 0x80000000 |
| 99 | MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK 0x80000000 |
| 100 | MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1 0x80000000 |
| 101 | MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0 0x80000000 |
Shawn Guo | e164153 | 2013-02-20 10:32:52 +0800 | [diff] [blame] | 102 | >; |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 103 | }; |
| 104 | }; |
| 105 | |
| 106 | disp1 { |
| 107 | pinctrl_disp1_1: disp1-grp1 { |
Shawn Guo | e164153 | 2013-02-20 10:32:52 +0800 | [diff] [blame] | 108 | fsl,pins = < |
Markus Niebel | 81b8a3c | 2013-06-04 13:07:15 +0200 | [diff] [blame] | 109 | MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x80000000 /* DISP1_CLK */ |
Steffen Trumtrar | 188e97d | 2013-06-04 13:07:14 +0200 | [diff] [blame] | 110 | MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x80000000 /* DISP1_DRDY */ |
| 111 | MX53_PAD_EIM_D23__IPU_DI1_PIN2 0x80000000 /* DISP1_HSYNC */ |
| 112 | MX53_PAD_EIM_EB3__IPU_DI1_PIN3 0x80000000 /* DISP1_VSYNC */ |
| 113 | MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x80000000 |
| 114 | MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x80000000 |
| 115 | MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x80000000 |
| 116 | MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x80000000 |
| 117 | MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x80000000 |
| 118 | MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x80000000 |
| 119 | MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x80000000 |
| 120 | MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x80000000 |
| 121 | MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x80000000 |
| 122 | MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x80000000 |
| 123 | MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x80000000 |
| 124 | MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x80000000 |
| 125 | MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x80000000 |
| 126 | MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x80000000 |
| 127 | MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x80000000 |
| 128 | MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x80000000 |
| 129 | MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x80000000 |
| 130 | MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x80000000 |
| 131 | MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x80000000 |
| 132 | MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x80000000 |
| 133 | MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x80000000 |
| 134 | MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x80000000 |
| 135 | MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x80000000 |
| 136 | MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x80000000 |
Shawn Guo | e164153 | 2013-02-20 10:32:52 +0800 | [diff] [blame] | 137 | >; |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 138 | }; |
| 139 | }; |
Philipp Zabel | d7db539 | 2013-06-04 13:07:10 +0200 | [diff] [blame] | 140 | |
| 141 | tve { |
| 142 | pinctrl_vga_sync_1: vgasync-grp1 { |
| 143 | fsl,pins = < |
| 144 | /* VGA_VSYNC, HSYNC with max drive strength */ |
| 145 | MX53_PAD_EIM_CS1__IPU_DI1_PIN6 0xe6 |
| 146 | MX53_PAD_EIM_DA15__IPU_DI1_PIN4 0xe6 |
| 147 | >; |
| 148 | }; |
| 149 | }; |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 150 | }; |
| 151 | |
| 152 | &cspi { |
| 153 | status = "okay"; |
| 154 | }; |
| 155 | |
Markus Niebel | eefb800 | 2013-06-04 13:07:11 +0200 | [diff] [blame] | 156 | &audmux { |
| 157 | status = "okay"; |
| 158 | pinctrl-names = "default"; |
Shawn Guo | 7ac0f70 | 2013-11-04 14:45:46 +0800 | [diff] [blame] | 159 | pinctrl-0 = <&pinctrl_audmux>; |
Markus Niebel | eefb800 | 2013-06-04 13:07:11 +0200 | [diff] [blame] | 160 | }; |
| 161 | |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 162 | &i2c2 { |
| 163 | codec: sgtl5000@a { |
| 164 | compatible = "fsl,sgtl5000"; |
| 165 | reg = <0x0a>; |
Markus Niebel | eefb800 | 2013-06-04 13:07:11 +0200 | [diff] [blame] | 166 | clocks = <&clks 150>; |
| 167 | VDDA-supply = <®_3p2v>; |
| 168 | VDDIO-supply = <®_3p2v>; |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 169 | }; |
| 170 | |
| 171 | expander: pca9554@20 { |
| 172 | compatible = "pca9554"; |
| 173 | reg = <0x20>; |
| 174 | interrupts = <109>; |
Markus Niebel | 74154be | 2013-06-04 13:07:12 +0200 | [diff] [blame] | 175 | #gpio-cells = <2>; |
| 176 | gpio-controller; |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 177 | }; |
| 178 | |
| 179 | sensor2: lm75@49 { |
| 180 | compatible = "lm75"; |
| 181 | reg = <0x49>; |
| 182 | }; |
| 183 | }; |
| 184 | |
| 185 | &fec { |
Markus Niebel | deb19eb | 2013-06-04 13:07:13 +0200 | [diff] [blame] | 186 | phy-reset-gpios = <&gpio7 6 0>; |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 187 | status = "okay"; |
| 188 | }; |
| 189 | |
| 190 | &esdhc2 { |
| 191 | status = "okay"; |
| 192 | }; |
| 193 | |
| 194 | &uart3 { |
| 195 | status = "okay"; |
| 196 | }; |
| 197 | |
| 198 | &ecspi1 { |
| 199 | status = "okay"; |
| 200 | }; |
| 201 | |
Michael Olbrich | 3b1a0f2 | 2013-06-04 13:07:08 +0200 | [diff] [blame] | 202 | &usbotg { |
| 203 | dr_mode = "host"; |
| 204 | status = "okay"; |
| 205 | }; |
| 206 | |
| 207 | &usbh1 { |
| 208 | status = "okay"; |
| 209 | }; |
| 210 | |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 211 | &uart1 { |
| 212 | status = "okay"; |
| 213 | }; |
| 214 | |
Markus Niebel | eefb800 | 2013-06-04 13:07:11 +0200 | [diff] [blame] | 215 | &ssi2 { |
| 216 | fsl,mode = "i2s-slave"; |
| 217 | status = "okay"; |
| 218 | }; |
| 219 | |
Steffen Trumtrar | be3a568 | 2013-01-10 11:27:27 +0100 | [diff] [blame] | 220 | &uart2 { |
| 221 | status = "okay"; |
| 222 | }; |
| 223 | |
| 224 | &can1 { |
| 225 | status = "okay"; |
| 226 | }; |
| 227 | |
| 228 | &can2 { |
| 229 | status = "okay"; |
| 230 | }; |
| 231 | |
| 232 | &i2c3 { |
| 233 | status = "okay"; |
| 234 | }; |
Philipp Zabel | d7db539 | 2013-06-04 13:07:10 +0200 | [diff] [blame] | 235 | |
| 236 | &tve { |
| 237 | pinctrl-names = "default"; |
| 238 | pinctrl-0 = <&pinctrl_vga_sync_1>; |
| 239 | ddc = <&i2c3>; |
| 240 | fsl,tve-mode = "vga"; |
| 241 | fsl,hsync-pin = <4>; |
| 242 | fsl,vsync-pin = <6>; |
| 243 | status = "okay"; |
| 244 | }; |