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Alessandro Zummo1d98af82006-03-27 01:16:47 -08001/*
2 * ST M48T86 / Dallas DS12887 RTC driver
3 * Copyright (c) 2006 Tower Technologies
4 *
5 * Author: Alessandro Zummo <a.zummo@towertech.it>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This drivers only supports the clock running in BCD and 24H mode.
12 * If it will be ever adapted to binary and 12H mode, care must be taken
13 * to not introduce bugs.
14 */
15
16#include <linux/module.h>
17#include <linux/rtc.h>
18#include <linux/platform_device.h>
Alessandro Zummo1d98af82006-03-27 01:16:47 -080019#include <linux/bcd.h>
H Hartley Sweeten8057c862017-02-10 11:11:56 -070020#include <linux/io.h>
Alessandro Zummo1d98af82006-03-27 01:16:47 -080021
H Hartley Sweeten68b54f42017-02-10 11:11:55 -070022#define M48T86_SEC 0x00
23#define M48T86_SECALRM 0x01
24#define M48T86_MIN 0x02
25#define M48T86_MINALRM 0x03
26#define M48T86_HOUR 0x04
27#define M48T86_HOURALRM 0x05
28#define M48T86_DOW 0x06 /* 1 = sunday */
29#define M48T86_DOM 0x07
30#define M48T86_MONTH 0x08 /* 1 - 12 */
31#define M48T86_YEAR 0x09 /* 0 - 99 */
32#define M48T86_A 0x0a
33#define M48T86_B 0x0b
34#define M48T86_B_SET BIT(7)
35#define M48T86_B_DM BIT(2)
36#define M48T86_B_H24 BIT(1)
37#define M48T86_C 0x0c
38#define M48T86_D 0x0d
39#define M48T86_D_VRT BIT(7)
H Hartley Sweetenb180cf82017-02-10 11:11:57 -070040#define M48T86_NVRAM(x) (0x0e + (x))
41#define M48T86_NVRAM_LEN 114
Alessandro Zummo1d98af82006-03-27 01:16:47 -080042
H Hartley Sweeten8057c862017-02-10 11:11:56 -070043struct m48t86_rtc_info {
44 void __iomem *index_reg;
45 void __iomem *data_reg;
46 struct rtc_device *rtc;
H Hartley Sweeten8057c862017-02-10 11:11:56 -070047};
48
49static unsigned char m48t86_readb(struct device *dev, unsigned long addr)
50{
51 struct m48t86_rtc_info *info = dev_get_drvdata(dev);
52 unsigned char value;
53
H Hartley Sweeten0500ce52017-02-15 09:35:27 -070054 writeb(addr, info->index_reg);
55 value = readb(info->data_reg);
56
H Hartley Sweeten8057c862017-02-10 11:11:56 -070057 return value;
58}
59
60static void m48t86_writeb(struct device *dev,
61 unsigned char value, unsigned long addr)
62{
63 struct m48t86_rtc_info *info = dev_get_drvdata(dev);
64
H Hartley Sweeten0500ce52017-02-15 09:35:27 -070065 writeb(addr, info->index_reg);
66 writeb(value, info->data_reg);
H Hartley Sweeten8057c862017-02-10 11:11:56 -070067}
68
Alessandro Zummo1d98af82006-03-27 01:16:47 -080069static int m48t86_rtc_read_time(struct device *dev, struct rtc_time *tm)
70{
71 unsigned char reg;
Alessandro Zummo1d98af82006-03-27 01:16:47 -080072
H Hartley Sweeten8057c862017-02-10 11:11:56 -070073 reg = m48t86_readb(dev, M48T86_B);
Alessandro Zummo1d98af82006-03-27 01:16:47 -080074
H Hartley Sweeten68b54f42017-02-10 11:11:55 -070075 if (reg & M48T86_B_DM) {
Alessandro Zummo1d98af82006-03-27 01:16:47 -080076 /* data (binary) mode */
H Hartley Sweeten8057c862017-02-10 11:11:56 -070077 tm->tm_sec = m48t86_readb(dev, M48T86_SEC);
78 tm->tm_min = m48t86_readb(dev, M48T86_MIN);
79 tm->tm_hour = m48t86_readb(dev, M48T86_HOUR) & 0x3f;
80 tm->tm_mday = m48t86_readb(dev, M48T86_DOM);
Alessandro Zummo1d98af82006-03-27 01:16:47 -080081 /* tm_mon is 0-11 */
H Hartley Sweeten8057c862017-02-10 11:11:56 -070082 tm->tm_mon = m48t86_readb(dev, M48T86_MONTH) - 1;
83 tm->tm_year = m48t86_readb(dev, M48T86_YEAR) + 100;
84 tm->tm_wday = m48t86_readb(dev, M48T86_DOW);
Alessandro Zummo1d98af82006-03-27 01:16:47 -080085 } else {
86 /* bcd mode */
H Hartley Sweeten8057c862017-02-10 11:11:56 -070087 tm->tm_sec = bcd2bin(m48t86_readb(dev, M48T86_SEC));
88 tm->tm_min = bcd2bin(m48t86_readb(dev, M48T86_MIN));
89 tm->tm_hour = bcd2bin(m48t86_readb(dev, M48T86_HOUR) &
90 0x3f);
91 tm->tm_mday = bcd2bin(m48t86_readb(dev, M48T86_DOM));
Alessandro Zummo1d98af82006-03-27 01:16:47 -080092 /* tm_mon is 0-11 */
H Hartley Sweeten8057c862017-02-10 11:11:56 -070093 tm->tm_mon = bcd2bin(m48t86_readb(dev, M48T86_MONTH)) - 1;
94 tm->tm_year = bcd2bin(m48t86_readb(dev, M48T86_YEAR)) + 100;
95 tm->tm_wday = bcd2bin(m48t86_readb(dev, M48T86_DOW));
Alessandro Zummo1d98af82006-03-27 01:16:47 -080096 }
97
98 /* correct the hour if the clock is in 12h mode */
H Hartley Sweeten68b54f42017-02-10 11:11:55 -070099 if (!(reg & M48T86_B_H24))
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700100 if (m48t86_readb(dev, M48T86_HOUR) & 0x80)
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800101 tm->tm_hour += 12;
102
Alexandre Belloni22652ba2018-02-19 16:23:56 +0100103 return 0;
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800104}
105
106static int m48t86_rtc_set_time(struct device *dev, struct rtc_time *tm)
107{
108 unsigned char reg;
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800109
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700110 reg = m48t86_readb(dev, M48T86_B);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800111
112 /* update flag and 24h mode */
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700113 reg |= M48T86_B_SET | M48T86_B_H24;
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700114 m48t86_writeb(dev, reg, M48T86_B);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800115
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700116 if (reg & M48T86_B_DM) {
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800117 /* data (binary) mode */
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700118 m48t86_writeb(dev, tm->tm_sec, M48T86_SEC);
119 m48t86_writeb(dev, tm->tm_min, M48T86_MIN);
120 m48t86_writeb(dev, tm->tm_hour, M48T86_HOUR);
121 m48t86_writeb(dev, tm->tm_mday, M48T86_DOM);
122 m48t86_writeb(dev, tm->tm_mon + 1, M48T86_MONTH);
123 m48t86_writeb(dev, tm->tm_year % 100, M48T86_YEAR);
124 m48t86_writeb(dev, tm->tm_wday, M48T86_DOW);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800125 } else {
126 /* bcd mode */
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700127 m48t86_writeb(dev, bin2bcd(tm->tm_sec), M48T86_SEC);
128 m48t86_writeb(dev, bin2bcd(tm->tm_min), M48T86_MIN);
129 m48t86_writeb(dev, bin2bcd(tm->tm_hour), M48T86_HOUR);
130 m48t86_writeb(dev, bin2bcd(tm->tm_mday), M48T86_DOM);
131 m48t86_writeb(dev, bin2bcd(tm->tm_mon + 1), M48T86_MONTH);
132 m48t86_writeb(dev, bin2bcd(tm->tm_year % 100), M48T86_YEAR);
133 m48t86_writeb(dev, bin2bcd(tm->tm_wday), M48T86_DOW);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800134 }
135
136 /* update ended */
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700137 reg &= ~M48T86_B_SET;
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700138 m48t86_writeb(dev, reg, M48T86_B);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800139
140 return 0;
141}
142
143static int m48t86_rtc_proc(struct device *dev, struct seq_file *seq)
144{
145 unsigned char reg;
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800146
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700147 reg = m48t86_readb(dev, M48T86_B);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800148
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800149 seq_printf(seq, "mode\t\t: %s\n",
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700150 (reg & M48T86_B_DM) ? "binary" : "bcd");
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800151
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700152 reg = m48t86_readb(dev, M48T86_D);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800153
154 seq_printf(seq, "battery\t\t: %s\n",
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700155 (reg & M48T86_D_VRT) ? "ok" : "exhausted");
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800156
157 return 0;
158}
159
David Brownellff8371a2006-09-30 23:28:17 -0700160static const struct rtc_class_ops m48t86_rtc_ops = {
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800161 .read_time = m48t86_rtc_read_time,
162 .set_time = m48t86_rtc_set_time,
163 .proc = m48t86_rtc_proc,
164};
165
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200166static int m48t86_nvram_read(void *priv, unsigned int off, void *buf,
167 size_t count)
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700168{
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200169 struct device *dev = priv;
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700170 unsigned int i;
171
172 for (i = 0; i < count; i++)
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200173 ((u8 *)buf)[i] = m48t86_readb(dev, M48T86_NVRAM(off + i));
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700174
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200175 return 0;
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700176}
177
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200178static int m48t86_nvram_write(void *priv, unsigned int off, void *buf,
179 size_t count)
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700180{
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200181 struct device *dev = priv;
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700182 unsigned int i;
183
184 for (i = 0; i < count; i++)
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200185 m48t86_writeb(dev, ((u8 *)buf)[i], M48T86_NVRAM(off + i));
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700186
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200187 return 0;
H Hartley Sweetenb180cf82017-02-10 11:11:57 -0700188}
189
H Hartley Sweeten3ea07122017-02-15 09:35:23 -0700190/*
191 * The RTC is an optional feature at purchase time on some Technologic Systems
192 * boards. Verify that it actually exists by checking if the last two bytes
193 * of the NVRAM can be changed.
194 *
195 * This is based on the method used in their rtc7800.c example.
196 */
197static bool m48t86_verify_chip(struct platform_device *pdev)
198{
199 unsigned int offset0 = M48T86_NVRAM(M48T86_NVRAM_LEN - 2);
200 unsigned int offset1 = M48T86_NVRAM(M48T86_NVRAM_LEN - 1);
201 unsigned char tmp0, tmp1;
202
203 tmp0 = m48t86_readb(&pdev->dev, offset0);
204 tmp1 = m48t86_readb(&pdev->dev, offset1);
205
206 m48t86_writeb(&pdev->dev, 0x00, offset0);
207 m48t86_writeb(&pdev->dev, 0x55, offset1);
208 if (m48t86_readb(&pdev->dev, offset1) == 0x55) {
209 m48t86_writeb(&pdev->dev, 0xaa, offset1);
210 if (m48t86_readb(&pdev->dev, offset1) == 0xaa &&
211 m48t86_readb(&pdev->dev, offset0) == 0x00) {
212 m48t86_writeb(&pdev->dev, tmp0, offset0);
213 m48t86_writeb(&pdev->dev, tmp1, offset1);
214
215 return true;
216 }
217 }
218 return false;
219}
220
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700221static int m48t86_rtc_probe(struct platform_device *pdev)
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800222{
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700223 struct m48t86_rtc_info *info;
H Hartley Sweeten0500ce52017-02-15 09:35:27 -0700224 struct resource *res;
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800225 unsigned char reg;
Alexandre Belloni5508c722017-10-13 00:04:20 +0200226 int err;
Alexandre Bellonie3f51c02018-02-12 23:47:27 +0100227 struct nvmem_config m48t86_nvmem_cfg = {
228 .name = "m48t86_nvram",
229 .word_size = 1,
230 .stride = 1,
231 .size = M48T86_NVRAM_LEN,
232 .reg_read = m48t86_nvram_read,
233 .reg_write = m48t86_nvram_write,
234 .priv = &pdev->dev,
235 };
Jingoo Hand5b6bb02013-04-29 16:19:42 -0700236
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700237 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
238 if (!info)
239 return -ENOMEM;
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800240
H Hartley Sweeten0500ce52017-02-15 09:35:27 -0700241 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
242 if (!res)
243 return -ENODEV;
244 info->index_reg = devm_ioremap_resource(&pdev->dev, res);
245 if (IS_ERR(info->index_reg))
246 return PTR_ERR(info->index_reg);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800247
H Hartley Sweeten0500ce52017-02-15 09:35:27 -0700248 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
249 if (!res)
250 return -ENODEV;
251 info->data_reg = devm_ioremap_resource(&pdev->dev, res);
252 if (IS_ERR(info->data_reg))
253 return PTR_ERR(info->data_reg);
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700254
255 dev_set_drvdata(&pdev->dev, info);
256
H Hartley Sweeten3ea07122017-02-15 09:35:23 -0700257 if (!m48t86_verify_chip(pdev)) {
258 dev_info(&pdev->dev, "RTC not present\n");
259 return -ENODEV;
260 }
261
Alexandre Belloni5508c722017-10-13 00:04:20 +0200262 info->rtc = devm_rtc_allocate_device(&pdev->dev);
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700263 if (IS_ERR(info->rtc))
264 return PTR_ERR(info->rtc);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800265
Alexandre Belloni5508c722017-10-13 00:04:20 +0200266 info->rtc->ops = &m48t86_rtc_ops;
Alexandre Bellonif8033aa2017-10-13 00:04:21 +0200267 info->rtc->nvram_old_abi = true;
268
Alexandre Belloni5508c722017-10-13 00:04:20 +0200269 err = rtc_register_device(info->rtc);
270 if (err)
271 return err;
272
Alexandre Belloni3c1bb612018-02-12 23:47:26 +0100273 rtc_nvmem_register(info->rtc, &m48t86_nvmem_cfg);
274
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800275 /* read battery status */
H Hartley Sweeten8057c862017-02-10 11:11:56 -0700276 reg = m48t86_readb(&pdev->dev, M48T86_D);
277 dev_info(&pdev->dev, "battery %s\n",
H Hartley Sweeten68b54f42017-02-10 11:11:55 -0700278 (reg & M48T86_D_VRT) ? "ok" : "exhausted");
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800279
280 return 0;
281}
282
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800283static struct platform_driver m48t86_rtc_platform_driver = {
284 .driver = {
285 .name = "rtc-m48t86",
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800286 },
287 .probe = m48t86_rtc_probe,
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800288};
289
Axel Lin0c4eae62012-01-10 15:10:48 -0800290module_platform_driver(m48t86_rtc_platform_driver);
Alessandro Zummo1d98af82006-03-27 01:16:47 -0800291
292MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
293MODULE_DESCRIPTION("M48T86 RTC driver");
294MODULE_LICENSE("GPL");
Kay Sieversad28a072008-04-10 21:29:25 -0700295MODULE_ALIAS("platform:rtc-m48t86");