blob: d580a357c5477f7a6bd54e572d931ed2e84103e0 [file] [log] [blame]
Chunming Zhouf556cb0c2015-08-02 11:18:04 +08001/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 *
23 */
24#include <linux/kthread.h>
25#include <linux/wait.h>
26#include <linux/sched.h>
27#include <drm/drmP.h>
28#include "gpu_scheduler.h"
29
30static void amd_sched_fence_wait_cb(struct fence *f, struct fence_cb *cb)
31{
32 struct amd_sched_fence *fence =
33 container_of(cb, struct amd_sched_fence, cb);
34 list_del_init(&fence->list);
35 fence_put(&fence->base);
36}
37
38struct amd_sched_fence *amd_sched_fence_create(
39 struct amd_sched_entity *s_entity)
40{
41 struct amd_sched_fence *fence = NULL;
42 fence = kzalloc(sizeof(struct amd_sched_fence), GFP_KERNEL);
43 if (fence == NULL)
44 return NULL;
45 fence->v_seq = atomic64_inc_return(&s_entity->last_queued_v_seq);
46 fence->entity = s_entity;
47 spin_lock_init(&fence->lock);
48 fence_init(&fence->base, &amd_sched_fence_ops,
49 &fence->lock,
50 s_entity->fence_context,
51 fence->v_seq);
52 fence_get(&fence->base);
53 list_add_tail(&fence->list, &s_entity->fence_list);
54 if (fence_add_callback(&fence->base,&fence->cb,
55 amd_sched_fence_wait_cb)) {
56 fence_put(&fence->base);
57 kfree(fence);
58 return NULL;
59 }
60 return fence;
61}
62
63bool amd_sched_check_ts(struct amd_sched_entity *s_entity, uint64_t v_seq)
64{
65 return atomic64_read(&s_entity->last_signaled_v_seq) >= v_seq ? true : false;
66}
67
68void amd_sched_fence_signal(struct amd_sched_fence *fence)
69{
70 if (amd_sched_check_ts(fence->entity, fence->v_seq)) {
71 int ret = fence_signal_locked(&fence->base);
72 if (!ret)
73 FENCE_TRACE(&fence->base, "signaled from irq context\n");
74 else
75 FENCE_TRACE(&fence->base, "was already signaled\n");
76 } else
77 WARN(true, "fence process dismattch with job!\n");
78}
79
80static const char *amd_sched_fence_get_driver_name(struct fence *fence)
81{
82 return "amd_sched";
83}
84
85static const char *amd_sched_fence_get_timeline_name(struct fence *f)
86{
87 struct amd_sched_fence *fence = to_amd_sched_fence(f);
88 return (const char *)fence->entity->name;
89}
90
91static bool amd_sched_fence_enable_signaling(struct fence *f)
92{
93 struct amd_sched_fence *fence = to_amd_sched_fence(f);
94
95 return !amd_sched_check_ts(fence->entity, fence->v_seq);
96}
97
98static bool amd_sched_fence_is_signaled(struct fence *f)
99{
100 struct amd_sched_fence *fence = to_amd_sched_fence(f);
101
102 return amd_sched_check_ts(fence->entity, fence->v_seq);
103}
104
105const struct fence_ops amd_sched_fence_ops = {
106 .get_driver_name = amd_sched_fence_get_driver_name,
107 .get_timeline_name = amd_sched_fence_get_timeline_name,
108 .enable_signaling = amd_sched_fence_enable_signaling,
109 .signaled = amd_sched_fence_is_signaled,
110 .wait = fence_default_wait,
111 .release = NULL,
112};