blob: 764cf798b91511f8cc789e64a866a9ee3934aa28 [file] [log] [blame]
Fabio Estevam5349f2a2012-04-11 22:12:11 -03001/*
2 * Copyright 2012 Sascha Hauer, Pengutronix
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
Shawn Guo36dffd82013-04-07 10:49:34 +080013#include "imx27.dtsi"
Fabio Estevam5349f2a2012-04-11 22:12:11 -030014
15/ {
Fabio Estevam991eb582012-12-25 09:10:51 -020016 model = "Freescale i.MX27 Product Development Kit";
17 compatible = "fsl,imx27-pdk", "fsl,imx27";
Fabio Estevam5349f2a2012-04-11 22:12:11 -030018
19 memory {
Fabio Estevam88308ed2014-04-02 19:25:44 -030020 reg = <0xa0000000 0x08000000>;
Fabio Estevam5349f2a2012-04-11 22:12:11 -030021 };
Fabio Estevamdd860a92014-04-16 14:53:20 -030022
23 usbphy {
24 compatible = "simple-bus";
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 usbphy0: usbphy@0 {
29 compatible = "usb-nop-xceiv";
30 reg = <0>;
31 clocks = <&clks 0>;
32 clock-names = "main_clk";
33 };
34 };
Shawn Guobe4ccfc2012-12-31 11:32:48 +080035};
Fabio Estevam5349f2a2012-04-11 22:12:11 -030036
Fabio Estevam2636c1e2014-04-15 18:55:12 -030037&cspi2 {
38 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_cspi2>;
40 fsl,spi-num-chipselects = <1>;
41 cs-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
42 status = "okay";
43
44 pmic: mc13783@0 {
45 #address-cells = <1>;
46 #size-cells = <0>;
47 compatible = "fsl,mc13783";
48 reg = <0>;
49 spi-cs-high;
50 spi-max-frequency = <1000000>;
51 interrupt-parent = <&gpio3>;
52 interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
53
54 regulators {
55 vgen_reg: vgen {
56 regulator-min-microvolt = <1500000>;
57 regulator-max-microvolt = <1500000>;
58 regulator-always-on;
59 regulator-boot-on;
60 };
61
62 vmmc1_reg: vmmc1 {
63 regulator-min-microvolt = <1600000>;
64 regulator-max-microvolt = <3000000>;
65 };
66
67 gpo1_reg: gpo1 {
68 regulator-always-on;
69 regulator-boot-on;
70 };
71
72 gpo3_reg: gpo3 {
73 regulator-always-on;
74 regulator-boot-on;
75 };
76 };
77 };
78};
Fabio Estevam09c74502014-04-13 11:48:41 -030079
80&fec {
Fabio Estevam702fbb82014-04-13 11:48:43 -030081 phy-mode = "mii";
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_fec>;
Shawn Guobe4ccfc2012-12-31 11:32:48 +080084 status = "okay";
85};
Fabio Estevam5349f2a2012-04-11 22:12:11 -030086
Fabio Estevamf6bd3f32014-04-17 15:23:31 -030087&kpp {
88 linux,keymap = <
89 MATRIX_KEY(0, 0, KEY_UP)
90 MATRIX_KEY(0, 1, KEY_DOWN)
91 MATRIX_KEY(1, 0, KEY_RIGHT)
92 MATRIX_KEY(1, 1, KEY_LEFT)
93 MATRIX_KEY(1, 2, KEY_ENTER)
94 MATRIX_KEY(2, 0, KEY_F6)
95 MATRIX_KEY(2, 1, KEY_F8)
96 MATRIX_KEY(2, 2, KEY_F9)
97 MATRIX_KEY(2, 3, KEY_F10)
98 >;
99 status = "okay";
100};
101
Fabio Estevamb41331e2014-04-17 15:23:30 -0300102&nfc {
103 pinctrl-names = "default";
104 pinctrl-0 = <&pinctrl_nand>;
105 nand-ecc-mode = "hw";
106 nand-on-flash-bbt;
107 status = "okay";
108};
109
Fabio Estevam09c74502014-04-13 11:48:41 -0300110&uart1 {
111 fsl,uart-has-rtscts;
Fabio Estevame5877322014-04-13 11:48:42 -0300112 pinctrl-names = "default";
113 pinctrl-0 = <&pinctrl_uart1>;
Shawn Guobe4ccfc2012-12-31 11:32:48 +0800114 status = "okay";
Fabio Estevam5349f2a2012-04-11 22:12:11 -0300115};
Fabio Estevame5877322014-04-13 11:48:42 -0300116
Fabio Estevamdd860a92014-04-16 14:53:20 -0300117&usbotg {
118 pinctrl-names = "default";
119 pinctrl-0 = <&pinctrl_usbotg>;
120 dr_mode = "otg";
121 fsl,usbphy = <&usbphy0>;
122 phy_type = "ulpi";
123 status = "okay";
124};
125
Fabio Estevame5877322014-04-13 11:48:42 -0300126&iomuxc {
127 imx27-pdk {
Fabio Estevam2636c1e2014-04-15 18:55:12 -0300128 pinctrl_cspi2: cspi2grp {
129 fsl,pins = <
130 MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0
131 MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0
132 MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0
133 MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 /* SPI2 CS0 */
134 MX27_PAD_TOUT__GPIO3_14 0x0 /* PMIC IRQ */
135 >;
136 };
137
Fabio Estevam702fbb82014-04-13 11:48:43 -0300138 pinctrl_fec: fecgrp {
139 fsl,pins = <
140 MX27_PAD_SD3_CMD__FEC_TXD0 0x0
141 MX27_PAD_SD3_CLK__FEC_TXD1 0x0
142 MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
143 MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
144 MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
145 MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
146 MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
147 MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
148 MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
149 MX27_PAD_ATA_DATA7__FEC_MDC 0x0
150 MX27_PAD_ATA_DATA8__FEC_CRS 0x0
151 MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
152 MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
153 MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
154 MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
155 MX27_PAD_ATA_DATA13__FEC_COL 0x0
156 MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
157 MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
158 >;
159 };
160
Fabio Estevamb41331e2014-04-17 15:23:30 -0300161 pinctrl_nand: nandgrp {
162 fsl,pins = <
163 MX27_PAD_NFRB__NFRB 0x0
164 MX27_PAD_NFCLE__NFCLE 0x0
165 MX27_PAD_NFWP_B__NFWP_B 0x0
166 MX27_PAD_NFCE_B__NFCE_B 0x0
167 MX27_PAD_NFALE__NFALE 0x0
168 MX27_PAD_NFRE_B__NFRE_B 0x0
169 MX27_PAD_NFWE_B__NFWE_B 0x0
170 >;
171 };
172
Fabio Estevame5877322014-04-13 11:48:42 -0300173 pinctrl_uart1: uart1grp {
174 fsl,pins = <
175 MX27_PAD_UART1_TXD__UART1_TXD 0x0
176 MX27_PAD_UART1_RXD__UART1_RXD 0x0
177 MX27_PAD_UART1_CTS__UART1_CTS 0x0
178 MX27_PAD_UART1_RTS__UART1_RTS 0x0
179 >;
180 };
Fabio Estevamdd860a92014-04-16 14:53:20 -0300181
182 pinctrl_usbotg: usbotggrp {
183 fsl,pins = <
184 MX27_PAD_USBOTG_NXT__USBOTG_NXT 0x0
185 MX27_PAD_USBOTG_STP__USBOTG_STP 0x0
186 MX27_PAD_USBOTG_DIR__USBOTG_DIR 0x0
187 MX27_PAD_USBOTG_CLK__USBOTG_CLK 0x0
188 MX27_PAD_USBOTG_DATA0__USBOTG_DATA0 0x0
189 MX27_PAD_USBOTG_DATA1__USBOTG_DATA1 0x0
190 MX27_PAD_USBOTG_DATA2__USBOTG_DATA2 0x0
191 MX27_PAD_USBOTG_DATA3__USBOTG_DATA3 0x0
192 MX27_PAD_USBOTG_DATA4__USBOTG_DATA4 0x0
193 MX27_PAD_USBOTG_DATA5__USBOTG_DATA5 0x0
194 MX27_PAD_USBOTG_DATA6__USBOTG_DATA6 0x0
195 MX27_PAD_USBOTG_DATA7__USBOTG_DATA7 0x0
196 >;
197 };
Fabio Estevame5877322014-04-13 11:48:42 -0300198 };
199};