Rob Clark | 0cf6c71 | 2013-06-24 17:12:04 -0400 | [diff] [blame] | 1 | #ifndef MMSS_CC_XML |
| 2 | #define MMSS_CC_XML |
| 3 | |
| 4 | /* Autogenerated file, DO NOT EDIT manually! |
| 5 | |
| 6 | This file was generated by the rules-ng-ng headergen tool in this git repository: |
Rob Clark | 22ba8b6 | 2013-10-07 12:42:27 -0400 | [diff] [blame] | 7 | http://github.com/freedreno/envytools/ |
| 8 | git clone https://github.com/freedreno/envytools.git |
Rob Clark | 0cf6c71 | 2013-06-24 17:12:04 -0400 | [diff] [blame] | 9 | |
| 10 | The rules-ng-ng source files this header was generated from are: |
Rob Clark | facb4f4 | 2013-11-30 12:45:48 -0500 | [diff] [blame] | 11 | - /home/robclark/src/freedreno/envytools/rnndb/msm.xml ( 647 bytes, from 2013-11-30 14:45:35) |
Rob Clark | 0cf6c71 | 2013-06-24 17:12:04 -0400 | [diff] [blame] | 12 | - /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1453 bytes, from 2013-03-31 16:51:27) |
Rob Clark | f9a1ca5 | 2014-08-01 08:26:56 -0400 | [diff] [blame^] | 13 | - /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp4.xml ( 20457 bytes, from 2014-08-01 12:22:48) |
| 14 | - /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp_common.xml ( 1615 bytes, from 2014-07-17 15:34:33) |
| 15 | - /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp5.xml ( 22517 bytes, from 2014-07-17 15:34:33) |
Rob Clark | 0cf6c71 | 2013-06-24 17:12:04 -0400 | [diff] [blame] | 16 | - /home/robclark/src/freedreno/envytools/rnndb/dsi/dsi.xml ( 11712 bytes, from 2013-08-17 17:13:43) |
| 17 | - /home/robclark/src/freedreno/envytools/rnndb/dsi/sfpb.xml ( 344 bytes, from 2013-08-11 19:26:32) |
Rob Clark | f9a1ca5 | 2014-08-01 08:26:56 -0400 | [diff] [blame^] | 18 | - /home/robclark/src/freedreno/envytools/rnndb/dsi/mmss_cc.xml ( 1686 bytes, from 2014-08-01 12:23:53) |
Rob Clark | 0cf6c71 | 2013-06-24 17:12:04 -0400 | [diff] [blame] | 19 | - /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2013-07-05 19:21:12) |
Rob Clark | f9a1ca5 | 2014-08-01 08:26:56 -0400 | [diff] [blame^] | 20 | - /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 23613 bytes, from 2014-07-17 15:33:30) |
Rob Clark | 0cf6c71 | 2013-06-24 17:12:04 -0400 | [diff] [blame] | 21 | |
Rob Clark | f9a1ca5 | 2014-08-01 08:26:56 -0400 | [diff] [blame^] | 22 | Copyright (C) 2013-2014 by the following authors: |
Rob Clark | 0cf6c71 | 2013-06-24 17:12:04 -0400 | [diff] [blame] | 23 | - Rob Clark <robdclark@gmail.com> (robclark) |
| 24 | |
| 25 | Permission is hereby granted, free of charge, to any person obtaining |
| 26 | a copy of this software and associated documentation files (the |
| 27 | "Software"), to deal in the Software without restriction, including |
| 28 | without limitation the rights to use, copy, modify, merge, publish, |
| 29 | distribute, sublicense, and/or sell copies of the Software, and to |
| 30 | permit persons to whom the Software is furnished to do so, subject to |
| 31 | the following conditions: |
| 32 | |
| 33 | The above copyright notice and this permission notice (including the |
| 34 | next paragraph) shall be included in all copies or substantial |
| 35 | portions of the Software. |
| 36 | |
| 37 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 38 | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 39 | MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| 40 | IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
| 41 | LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
| 42 | OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
| 43 | WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 44 | */ |
| 45 | |
| 46 | |
| 47 | enum mmss_cc_clk { |
| 48 | CLK = 0, |
| 49 | PCLK = 1, |
| 50 | }; |
| 51 | |
| 52 | #define REG_MMSS_CC_AHB 0x00000008 |
| 53 | |
| 54 | static inline uint32_t __offset_CLK(enum mmss_cc_clk idx) |
| 55 | { |
| 56 | switch (idx) { |
| 57 | case CLK: return 0x0000004c; |
| 58 | case PCLK: return 0x00000130; |
| 59 | default: return INVALID_IDX(idx); |
| 60 | } |
| 61 | } |
| 62 | static inline uint32_t REG_MMSS_CC_CLK(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0); } |
| 63 | |
| 64 | static inline uint32_t REG_MMSS_CC_CLK_CC(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0); } |
| 65 | #define MMSS_CC_CLK_CC_CLK_EN 0x00000001 |
| 66 | #define MMSS_CC_CLK_CC_ROOT_EN 0x00000004 |
| 67 | #define MMSS_CC_CLK_CC_MND_EN 0x00000020 |
| 68 | #define MMSS_CC_CLK_CC_MND_MODE__MASK 0x000000c0 |
| 69 | #define MMSS_CC_CLK_CC_MND_MODE__SHIFT 6 |
| 70 | static inline uint32_t MMSS_CC_CLK_CC_MND_MODE(uint32_t val) |
| 71 | { |
| 72 | return ((val) << MMSS_CC_CLK_CC_MND_MODE__SHIFT) & MMSS_CC_CLK_CC_MND_MODE__MASK; |
| 73 | } |
| 74 | #define MMSS_CC_CLK_CC_PMXO_SEL__MASK 0x00000300 |
| 75 | #define MMSS_CC_CLK_CC_PMXO_SEL__SHIFT 8 |
| 76 | static inline uint32_t MMSS_CC_CLK_CC_PMXO_SEL(uint32_t val) |
| 77 | { |
| 78 | return ((val) << MMSS_CC_CLK_CC_PMXO_SEL__SHIFT) & MMSS_CC_CLK_CC_PMXO_SEL__MASK; |
| 79 | } |
| 80 | |
| 81 | static inline uint32_t REG_MMSS_CC_CLK_MD(enum mmss_cc_clk i0) { return 0x00000004 + __offset_CLK(i0); } |
| 82 | #define MMSS_CC_CLK_MD_D__MASK 0x000000ff |
| 83 | #define MMSS_CC_CLK_MD_D__SHIFT 0 |
| 84 | static inline uint32_t MMSS_CC_CLK_MD_D(uint32_t val) |
| 85 | { |
| 86 | return ((val) << MMSS_CC_CLK_MD_D__SHIFT) & MMSS_CC_CLK_MD_D__MASK; |
| 87 | } |
| 88 | #define MMSS_CC_CLK_MD_M__MASK 0x0000ff00 |
| 89 | #define MMSS_CC_CLK_MD_M__SHIFT 8 |
| 90 | static inline uint32_t MMSS_CC_CLK_MD_M(uint32_t val) |
| 91 | { |
| 92 | return ((val) << MMSS_CC_CLK_MD_M__SHIFT) & MMSS_CC_CLK_MD_M__MASK; |
| 93 | } |
| 94 | |
| 95 | static inline uint32_t REG_MMSS_CC_CLK_NS(enum mmss_cc_clk i0) { return 0x00000008 + __offset_CLK(i0); } |
| 96 | #define MMSS_CC_CLK_NS_SRC__MASK 0x0000000f |
| 97 | #define MMSS_CC_CLK_NS_SRC__SHIFT 0 |
| 98 | static inline uint32_t MMSS_CC_CLK_NS_SRC(uint32_t val) |
| 99 | { |
| 100 | return ((val) << MMSS_CC_CLK_NS_SRC__SHIFT) & MMSS_CC_CLK_NS_SRC__MASK; |
| 101 | } |
| 102 | #define MMSS_CC_CLK_NS_PRE_DIV_FUNC__MASK 0x00fff000 |
| 103 | #define MMSS_CC_CLK_NS_PRE_DIV_FUNC__SHIFT 12 |
| 104 | static inline uint32_t MMSS_CC_CLK_NS_PRE_DIV_FUNC(uint32_t val) |
| 105 | { |
| 106 | return ((val) << MMSS_CC_CLK_NS_PRE_DIV_FUNC__SHIFT) & MMSS_CC_CLK_NS_PRE_DIV_FUNC__MASK; |
| 107 | } |
| 108 | #define MMSS_CC_CLK_NS_VAL__MASK 0xff000000 |
| 109 | #define MMSS_CC_CLK_NS_VAL__SHIFT 24 |
| 110 | static inline uint32_t MMSS_CC_CLK_NS_VAL(uint32_t val) |
| 111 | { |
| 112 | return ((val) << MMSS_CC_CLK_NS_VAL__SHIFT) & MMSS_CC_CLK_NS_VAL__MASK; |
| 113 | } |
| 114 | |
Rob Clark | f9a1ca5 | 2014-08-01 08:26:56 -0400 | [diff] [blame^] | 115 | #define REG_MMSS_CC_DSI2_PIXEL_CC 0x00000094 |
| 116 | |
| 117 | #define REG_MMSS_CC_DSI2_PIXEL_NS 0x000000e4 |
| 118 | |
| 119 | #define REG_MMSS_CC_DSI2_PIXEL_CC2 0x00000264 |
| 120 | |
Rob Clark | 0cf6c71 | 2013-06-24 17:12:04 -0400 | [diff] [blame] | 121 | |
| 122 | #endif /* MMSS_CC_XML */ |