Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 1 | #if !defined(_AMDGPU_TRACE_H) || defined(TRACE_HEADER_MULTI_READ) |
| 2 | #define _AMDGPU_TRACE_H_ |
| 3 | |
| 4 | #include <linux/stringify.h> |
| 5 | #include <linux/types.h> |
| 6 | #include <linux/tracepoint.h> |
| 7 | |
| 8 | #include <drm/drmP.h> |
| 9 | |
| 10 | #undef TRACE_SYSTEM |
| 11 | #define TRACE_SYSTEM amdgpu |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 12 | #define TRACE_INCLUDE_FILE amdgpu_trace |
| 13 | |
Andres Rodriguez | c98b5c9 | 2017-03-11 10:50:34 -0500 | [diff] [blame] | 14 | #define AMDGPU_JOB_GET_TIMELINE_NAME(job) \ |
| 15 | job->base.s_fence->finished.ops->get_timeline_name(&job->base.s_fence->finished) |
| 16 | |
Tom St Denis | f4b373f | 2016-05-31 08:02:27 -0400 | [diff] [blame] | 17 | TRACE_EVENT(amdgpu_mm_rreg, |
| 18 | TP_PROTO(unsigned did, uint32_t reg, uint32_t value), |
| 19 | TP_ARGS(did, reg, value), |
| 20 | TP_STRUCT__entry( |
| 21 | __field(unsigned, did) |
| 22 | __field(uint32_t, reg) |
| 23 | __field(uint32_t, value) |
| 24 | ), |
| 25 | TP_fast_assign( |
| 26 | __entry->did = did; |
| 27 | __entry->reg = reg; |
| 28 | __entry->value = value; |
| 29 | ), |
Tom St Denis | e11666e | 2016-12-14 10:52:00 -0500 | [diff] [blame] | 30 | TP_printk("0x%04lx, 0x%08lx, 0x%08lx", |
Tom St Denis | f4b373f | 2016-05-31 08:02:27 -0400 | [diff] [blame] | 31 | (unsigned long)__entry->did, |
| 32 | (unsigned long)__entry->reg, |
| 33 | (unsigned long)__entry->value) |
| 34 | ); |
| 35 | |
| 36 | TRACE_EVENT(amdgpu_mm_wreg, |
| 37 | TP_PROTO(unsigned did, uint32_t reg, uint32_t value), |
| 38 | TP_ARGS(did, reg, value), |
| 39 | TP_STRUCT__entry( |
| 40 | __field(unsigned, did) |
| 41 | __field(uint32_t, reg) |
| 42 | __field(uint32_t, value) |
| 43 | ), |
| 44 | TP_fast_assign( |
| 45 | __entry->did = did; |
| 46 | __entry->reg = reg; |
| 47 | __entry->value = value; |
| 48 | ), |
Tom St Denis | e11666e | 2016-12-14 10:52:00 -0500 | [diff] [blame] | 49 | TP_printk("0x%04lx, 0x%08lx, 0x%08lx", |
Tom St Denis | f4b373f | 2016-05-31 08:02:27 -0400 | [diff] [blame] | 50 | (unsigned long)__entry->did, |
| 51 | (unsigned long)__entry->reg, |
| 52 | (unsigned long)__entry->value) |
| 53 | ); |
| 54 | |
Christian König | cef105f | 2016-12-06 03:41:55 -0500 | [diff] [blame] | 55 | TRACE_EVENT(amdgpu_iv, |
| 56 | TP_PROTO(struct amdgpu_iv_entry *iv), |
| 57 | TP_ARGS(iv), |
| 58 | TP_STRUCT__entry( |
| 59 | __field(unsigned, client_id) |
| 60 | __field(unsigned, src_id) |
| 61 | __field(unsigned, ring_id) |
| 62 | __field(unsigned, vm_id) |
| 63 | __field(unsigned, vm_id_src) |
| 64 | __field(uint64_t, timestamp) |
| 65 | __field(unsigned, timestamp_src) |
| 66 | __field(unsigned, pas_id) |
| 67 | __array(unsigned, src_data, 4) |
| 68 | ), |
| 69 | TP_fast_assign( |
| 70 | __entry->client_id = iv->client_id; |
| 71 | __entry->src_id = iv->src_id; |
| 72 | __entry->ring_id = iv->ring_id; |
| 73 | __entry->vm_id = iv->vm_id; |
| 74 | __entry->vm_id_src = iv->vm_id_src; |
| 75 | __entry->timestamp = iv->timestamp; |
| 76 | __entry->timestamp_src = iv->timestamp_src; |
| 77 | __entry->pas_id = iv->pas_id; |
| 78 | __entry->src_data[0] = iv->src_data[0]; |
| 79 | __entry->src_data[1] = iv->src_data[1]; |
| 80 | __entry->src_data[2] = iv->src_data[2]; |
| 81 | __entry->src_data[3] = iv->src_data[3]; |
| 82 | ), |
| 83 | TP_printk("client_id:%u src_id:%u ring:%u vm_id:%u timestamp: %llu pas_id:%u src_data: %08x %08x %08x %08x\n", |
| 84 | __entry->client_id, __entry->src_id, |
| 85 | __entry->ring_id, __entry->vm_id, |
| 86 | __entry->timestamp, __entry->pas_id, |
| 87 | __entry->src_data[0], __entry->src_data[1], |
| 88 | __entry->src_data[2], __entry->src_data[3]) |
| 89 | ); |
| 90 | |
| 91 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 92 | TRACE_EVENT(amdgpu_bo_create, |
| 93 | TP_PROTO(struct amdgpu_bo *bo), |
| 94 | TP_ARGS(bo), |
| 95 | TP_STRUCT__entry( |
| 96 | __field(struct amdgpu_bo *, bo) |
| 97 | __field(u32, pages) |
David Mao | 42ffb58 | 2016-06-07 17:43:51 +0800 | [diff] [blame] | 98 | __field(u32, type) |
| 99 | __field(u32, prefer) |
| 100 | __field(u32, allow) |
| 101 | __field(u32, visible) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 102 | ), |
| 103 | |
| 104 | TP_fast_assign( |
| 105 | __entry->bo = bo; |
| 106 | __entry->pages = bo->tbo.num_pages; |
David Mao | 42ffb58 | 2016-06-07 17:43:51 +0800 | [diff] [blame] | 107 | __entry->type = bo->tbo.mem.mem_type; |
Kent Russell | 6d7d9c5 | 2017-08-08 07:58:01 -0400 | [diff] [blame] | 108 | __entry->prefer = bo->preferred_domains; |
David Mao | 42ffb58 | 2016-06-07 17:43:51 +0800 | [diff] [blame] | 109 | __entry->allow = bo->allowed_domains; |
| 110 | __entry->visible = bo->flags; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 111 | ), |
David Mao | 42ffb58 | 2016-06-07 17:43:51 +0800 | [diff] [blame] | 112 | |
Kent Russell | 6d7d9c5 | 2017-08-08 07:58:01 -0400 | [diff] [blame] | 113 | TP_printk("bo=%p, pages=%u, type=%d, preferred=%d, allowed=%d, visible=%d", |
David Mao | 42ffb58 | 2016-06-07 17:43:51 +0800 | [diff] [blame] | 114 | __entry->bo, __entry->pages, __entry->type, |
| 115 | __entry->prefer, __entry->allow, __entry->visible) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 116 | ); |
| 117 | |
| 118 | TRACE_EVENT(amdgpu_cs, |
| 119 | TP_PROTO(struct amdgpu_cs_parser *p, int i), |
| 120 | TP_ARGS(p, i), |
| 121 | TP_STRUCT__entry( |
Christian König | e30590e | 2015-06-10 19:21:14 +0200 | [diff] [blame] | 122 | __field(struct amdgpu_bo_list *, bo_list) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 123 | __field(u32, ring) |
| 124 | __field(u32, dw) |
| 125 | __field(u32, fences) |
| 126 | ), |
| 127 | |
| 128 | TP_fast_assign( |
Christian König | e30590e | 2015-06-10 19:21:14 +0200 | [diff] [blame] | 129 | __entry->bo_list = p->bo_list; |
Christian König | b07c60c | 2016-01-31 12:29:04 +0100 | [diff] [blame] | 130 | __entry->ring = p->job->ring->idx; |
Christian König | 50838c8 | 2016-02-03 13:44:52 +0100 | [diff] [blame] | 131 | __entry->dw = p->job->ibs[i].length_dw; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 132 | __entry->fences = amdgpu_fence_count_emitted( |
Christian König | b07c60c | 2016-01-31 12:29:04 +0100 | [diff] [blame] | 133 | p->job->ring); |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 134 | ), |
Christian König | e30590e | 2015-06-10 19:21:14 +0200 | [diff] [blame] | 135 | TP_printk("bo_list=%p, ring=%u, dw=%u, fences=%u", |
| 136 | __entry->bo_list, __entry->ring, __entry->dw, |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 137 | __entry->fences) |
| 138 | ); |
| 139 | |
Chunming Zhou | 7034dec | 2015-11-11 14:56:00 +0800 | [diff] [blame] | 140 | TRACE_EVENT(amdgpu_cs_ioctl, |
| 141 | TP_PROTO(struct amdgpu_job *job), |
| 142 | TP_ARGS(job), |
| 143 | TP_STRUCT__entry( |
Andres Rodriguez | f6fd203 | 2017-03-09 21:25:52 -0500 | [diff] [blame] | 144 | __field(uint64_t, sched_job_id) |
Andres Rodriguez | c98b5c9 | 2017-03-11 10:50:34 -0500 | [diff] [blame] | 145 | __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) |
Andres Rodriguez | ced2ef6 | 2017-03-09 21:25:54 -0500 | [diff] [blame] | 146 | __field(unsigned int, context) |
| 147 | __field(unsigned int, seqno) |
Chris Wilson | f54d186 | 2016-10-25 13:00:45 +0100 | [diff] [blame] | 148 | __field(struct dma_fence *, fence) |
Chunming Zhou | 7034dec | 2015-11-11 14:56:00 +0800 | [diff] [blame] | 149 | __field(char *, ring_name) |
| 150 | __field(u32, num_ibs) |
| 151 | ), |
| 152 | |
| 153 | TP_fast_assign( |
Andres Rodriguez | f6fd203 | 2017-03-09 21:25:52 -0500 | [diff] [blame] | 154 | __entry->sched_job_id = job->base.id; |
Andres Rodriguez | c98b5c9 | 2017-03-11 10:50:34 -0500 | [diff] [blame] | 155 | __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) |
Andres Rodriguez | ced2ef6 | 2017-03-09 21:25:54 -0500 | [diff] [blame] | 156 | __entry->context = job->base.s_fence->finished.context; |
| 157 | __entry->seqno = job->base.s_fence->finished.seqno; |
Christian König | b07c60c | 2016-01-31 12:29:04 +0100 | [diff] [blame] | 158 | __entry->ring_name = job->ring->name; |
Chunming Zhou | 7034dec | 2015-11-11 14:56:00 +0800 | [diff] [blame] | 159 | __entry->num_ibs = job->num_ibs; |
| 160 | ), |
Andres Rodriguez | ced2ef6 | 2017-03-09 21:25:54 -0500 | [diff] [blame] | 161 | TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u", |
| 162 | __entry->sched_job_id, __get_str(timeline), __entry->context, |
| 163 | __entry->seqno, __entry->ring_name, __entry->num_ibs) |
Chunming Zhou | 7034dec | 2015-11-11 14:56:00 +0800 | [diff] [blame] | 164 | ); |
| 165 | |
| 166 | TRACE_EVENT(amdgpu_sched_run_job, |
| 167 | TP_PROTO(struct amdgpu_job *job), |
| 168 | TP_ARGS(job), |
| 169 | TP_STRUCT__entry( |
Andres Rodriguez | f6fd203 | 2017-03-09 21:25:52 -0500 | [diff] [blame] | 170 | __field(uint64_t, sched_job_id) |
Andres Rodriguez | c98b5c9 | 2017-03-11 10:50:34 -0500 | [diff] [blame] | 171 | __string(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) |
Andres Rodriguez | 82c6bd4 | 2017-02-24 13:20:58 -0500 | [diff] [blame] | 172 | __field(unsigned int, context) |
| 173 | __field(unsigned int, seqno) |
Chunming Zhou | 7034dec | 2015-11-11 14:56:00 +0800 | [diff] [blame] | 174 | __field(char *, ring_name) |
| 175 | __field(u32, num_ibs) |
| 176 | ), |
| 177 | |
| 178 | TP_fast_assign( |
Andres Rodriguez | f6fd203 | 2017-03-09 21:25:52 -0500 | [diff] [blame] | 179 | __entry->sched_job_id = job->base.id; |
Andres Rodriguez | c98b5c9 | 2017-03-11 10:50:34 -0500 | [diff] [blame] | 180 | __assign_str(timeline, AMDGPU_JOB_GET_TIMELINE_NAME(job)) |
Andres Rodriguez | 82c6bd4 | 2017-02-24 13:20:58 -0500 | [diff] [blame] | 181 | __entry->context = job->base.s_fence->finished.context; |
| 182 | __entry->seqno = job->base.s_fence->finished.seqno; |
Christian König | b07c60c | 2016-01-31 12:29:04 +0100 | [diff] [blame] | 183 | __entry->ring_name = job->ring->name; |
Chunming Zhou | 7034dec | 2015-11-11 14:56:00 +0800 | [diff] [blame] | 184 | __entry->num_ibs = job->num_ibs; |
| 185 | ), |
Andres Rodriguez | 2359419 | 2017-03-09 21:25:53 -0500 | [diff] [blame] | 186 | TP_printk("sched_job=%llu, timeline=%s, context=%u, seqno=%u, ring_name=%s, num_ibs=%u", |
| 187 | __entry->sched_job_id, __get_str(timeline), __entry->context, |
| 188 | __entry->seqno, __entry->ring_name, __entry->num_ibs) |
Chunming Zhou | 7034dec | 2015-11-11 14:56:00 +0800 | [diff] [blame] | 189 | ); |
| 190 | |
| 191 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 192 | TRACE_EVENT(amdgpu_vm_grab_id, |
Christian König | c5296d1 | 2017-04-07 15:31:13 +0200 | [diff] [blame] | 193 | TP_PROTO(struct amdgpu_vm *vm, struct amdgpu_ring *ring, |
| 194 | struct amdgpu_job *job), |
Christian König | 0c0fdf1 | 2016-07-08 10:48:24 +0200 | [diff] [blame] | 195 | TP_ARGS(vm, ring, job), |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 196 | TP_STRUCT__entry( |
Christian König | 165e4e0 | 2016-01-07 18:15:22 +0100 | [diff] [blame] | 197 | __field(struct amdgpu_vm *, vm) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 198 | __field(u32, ring) |
Christian König | c5296d1 | 2017-04-07 15:31:13 +0200 | [diff] [blame] | 199 | __field(u32, vm_id) |
| 200 | __field(u32, vm_hub) |
Christian König | 22073fe | 2016-02-26 16:18:36 +0100 | [diff] [blame] | 201 | __field(u64, pd_addr) |
Christian König | 0c0fdf1 | 2016-07-08 10:48:24 +0200 | [diff] [blame] | 202 | __field(u32, needs_flush) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 203 | ), |
| 204 | |
| 205 | TP_fast_assign( |
Christian König | 165e4e0 | 2016-01-07 18:15:22 +0100 | [diff] [blame] | 206 | __entry->vm = vm; |
Christian König | c5296d1 | 2017-04-07 15:31:13 +0200 | [diff] [blame] | 207 | __entry->ring = ring->idx; |
| 208 | __entry->vm_id = job->vm_id; |
| 209 | __entry->vm_hub = ring->funcs->vmhub, |
Christian König | 0c0fdf1 | 2016-07-08 10:48:24 +0200 | [diff] [blame] | 210 | __entry->pd_addr = job->vm_pd_addr; |
| 211 | __entry->needs_flush = job->vm_needs_flush; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 212 | ), |
Christian König | c5296d1 | 2017-04-07 15:31:13 +0200 | [diff] [blame] | 213 | TP_printk("vm=%p, ring=%u, id=%u, hub=%u, pd_addr=%010Lx needs_flush=%u", |
| 214 | __entry->vm, __entry->ring, __entry->vm_id, |
| 215 | __entry->vm_hub, __entry->pd_addr, __entry->needs_flush) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 216 | ); |
| 217 | |
Christian König | 93e3e43 | 2015-06-09 16:58:33 +0200 | [diff] [blame] | 218 | TRACE_EVENT(amdgpu_vm_bo_map, |
| 219 | TP_PROTO(struct amdgpu_bo_va *bo_va, |
| 220 | struct amdgpu_bo_va_mapping *mapping), |
| 221 | TP_ARGS(bo_va, mapping), |
| 222 | TP_STRUCT__entry( |
| 223 | __field(struct amdgpu_bo *, bo) |
| 224 | __field(long, start) |
| 225 | __field(long, last) |
| 226 | __field(u64, offset) |
Christian König | 663ebbf | 2017-06-28 11:06:52 +0200 | [diff] [blame] | 227 | __field(u64, flags) |
Christian König | 93e3e43 | 2015-06-09 16:58:33 +0200 | [diff] [blame] | 228 | ), |
| 229 | |
| 230 | TP_fast_assign( |
Christian König | ec68154 | 2017-08-01 10:51:43 +0200 | [diff] [blame] | 231 | __entry->bo = bo_va ? bo_va->base.bo : NULL; |
Christian König | a9f87f6 | 2017-03-30 14:03:59 +0200 | [diff] [blame] | 232 | __entry->start = mapping->start; |
| 233 | __entry->last = mapping->last; |
Christian König | 93e3e43 | 2015-06-09 16:58:33 +0200 | [diff] [blame] | 234 | __entry->offset = mapping->offset; |
| 235 | __entry->flags = mapping->flags; |
| 236 | ), |
Christian König | 663ebbf | 2017-06-28 11:06:52 +0200 | [diff] [blame] | 237 | TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", |
Christian König | 93e3e43 | 2015-06-09 16:58:33 +0200 | [diff] [blame] | 238 | __entry->bo, __entry->start, __entry->last, |
| 239 | __entry->offset, __entry->flags) |
| 240 | ); |
| 241 | |
| 242 | TRACE_EVENT(amdgpu_vm_bo_unmap, |
| 243 | TP_PROTO(struct amdgpu_bo_va *bo_va, |
| 244 | struct amdgpu_bo_va_mapping *mapping), |
| 245 | TP_ARGS(bo_va, mapping), |
| 246 | TP_STRUCT__entry( |
| 247 | __field(struct amdgpu_bo *, bo) |
| 248 | __field(long, start) |
| 249 | __field(long, last) |
| 250 | __field(u64, offset) |
Christian König | 663ebbf | 2017-06-28 11:06:52 +0200 | [diff] [blame] | 251 | __field(u64, flags) |
Christian König | 93e3e43 | 2015-06-09 16:58:33 +0200 | [diff] [blame] | 252 | ), |
| 253 | |
| 254 | TP_fast_assign( |
Christian König | ec68154 | 2017-08-01 10:51:43 +0200 | [diff] [blame] | 255 | __entry->bo = bo_va->base.bo; |
Christian König | a9f87f6 | 2017-03-30 14:03:59 +0200 | [diff] [blame] | 256 | __entry->start = mapping->start; |
| 257 | __entry->last = mapping->last; |
Christian König | 93e3e43 | 2015-06-09 16:58:33 +0200 | [diff] [blame] | 258 | __entry->offset = mapping->offset; |
| 259 | __entry->flags = mapping->flags; |
| 260 | ), |
Christian König | 663ebbf | 2017-06-28 11:06:52 +0200 | [diff] [blame] | 261 | TP_printk("bo=%p, start=%lx, last=%lx, offset=%010llx, flags=%llx", |
Christian König | 93e3e43 | 2015-06-09 16:58:33 +0200 | [diff] [blame] | 262 | __entry->bo, __entry->start, __entry->last, |
| 263 | __entry->offset, __entry->flags) |
| 264 | ); |
| 265 | |
Christian König | d6c10f6 | 2015-09-28 12:00:23 +0200 | [diff] [blame] | 266 | DECLARE_EVENT_CLASS(amdgpu_vm_mapping, |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 267 | TP_PROTO(struct amdgpu_bo_va_mapping *mapping), |
| 268 | TP_ARGS(mapping), |
| 269 | TP_STRUCT__entry( |
| 270 | __field(u64, soffset) |
| 271 | __field(u64, eoffset) |
Christian König | 663ebbf | 2017-06-28 11:06:52 +0200 | [diff] [blame] | 272 | __field(u64, flags) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 273 | ), |
| 274 | |
| 275 | TP_fast_assign( |
Christian König | a9f87f6 | 2017-03-30 14:03:59 +0200 | [diff] [blame] | 276 | __entry->soffset = mapping->start; |
| 277 | __entry->eoffset = mapping->last + 1; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 278 | __entry->flags = mapping->flags; |
| 279 | ), |
Christian König | 663ebbf | 2017-06-28 11:06:52 +0200 | [diff] [blame] | 280 | TP_printk("soffs=%010llx, eoffs=%010llx, flags=%llx", |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 281 | __entry->soffset, __entry->eoffset, __entry->flags) |
| 282 | ); |
| 283 | |
Christian König | d6c10f6 | 2015-09-28 12:00:23 +0200 | [diff] [blame] | 284 | DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_update, |
| 285 | TP_PROTO(struct amdgpu_bo_va_mapping *mapping), |
| 286 | TP_ARGS(mapping) |
| 287 | ); |
| 288 | |
| 289 | DEFINE_EVENT(amdgpu_vm_mapping, amdgpu_vm_bo_mapping, |
| 290 | TP_PROTO(struct amdgpu_bo_va_mapping *mapping), |
| 291 | TP_ARGS(mapping) |
| 292 | ); |
| 293 | |
Christian König | ec2f05f | 2016-09-25 16:11:52 +0200 | [diff] [blame] | 294 | TRACE_EVENT(amdgpu_vm_set_ptes, |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 295 | TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, |
Christian König | 663ebbf | 2017-06-28 11:06:52 +0200 | [diff] [blame] | 296 | uint32_t incr, uint64_t flags), |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 297 | TP_ARGS(pe, addr, count, incr, flags), |
| 298 | TP_STRUCT__entry( |
| 299 | __field(u64, pe) |
| 300 | __field(u64, addr) |
| 301 | __field(u32, count) |
| 302 | __field(u32, incr) |
Christian König | 663ebbf | 2017-06-28 11:06:52 +0200 | [diff] [blame] | 303 | __field(u64, flags) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 304 | ), |
| 305 | |
| 306 | TP_fast_assign( |
| 307 | __entry->pe = pe; |
| 308 | __entry->addr = addr; |
| 309 | __entry->count = count; |
| 310 | __entry->incr = incr; |
| 311 | __entry->flags = flags; |
| 312 | ), |
Christian König | 663ebbf | 2017-06-28 11:06:52 +0200 | [diff] [blame] | 313 | TP_printk("pe=%010Lx, addr=%010Lx, incr=%u, flags=%llx, count=%u", |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 314 | __entry->pe, __entry->addr, __entry->incr, |
| 315 | __entry->flags, __entry->count) |
| 316 | ); |
| 317 | |
Christian König | ec2f05f | 2016-09-25 16:11:52 +0200 | [diff] [blame] | 318 | TRACE_EVENT(amdgpu_vm_copy_ptes, |
| 319 | TP_PROTO(uint64_t pe, uint64_t src, unsigned count), |
| 320 | TP_ARGS(pe, src, count), |
| 321 | TP_STRUCT__entry( |
| 322 | __field(u64, pe) |
| 323 | __field(u64, src) |
| 324 | __field(u32, count) |
| 325 | ), |
| 326 | |
| 327 | TP_fast_assign( |
| 328 | __entry->pe = pe; |
| 329 | __entry->src = src; |
| 330 | __entry->count = count; |
| 331 | ), |
| 332 | TP_printk("pe=%010Lx, src=%010Lx, count=%u", |
| 333 | __entry->pe, __entry->src, __entry->count) |
| 334 | ); |
| 335 | |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 336 | TRACE_EVENT(amdgpu_vm_flush, |
Christian König | 5f1bcf5 | 2017-04-07 17:43:19 +0200 | [diff] [blame] | 337 | TP_PROTO(struct amdgpu_ring *ring, unsigned vm_id, |
| 338 | uint64_t pd_addr), |
| 339 | TP_ARGS(ring, vm_id, pd_addr), |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 340 | TP_STRUCT__entry( |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 341 | __field(u32, ring) |
Christian König | 5f1bcf5 | 2017-04-07 17:43:19 +0200 | [diff] [blame] | 342 | __field(u32, vm_id) |
| 343 | __field(u32, vm_hub) |
| 344 | __field(u64, pd_addr) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 345 | ), |
| 346 | |
| 347 | TP_fast_assign( |
Christian König | 5f1bcf5 | 2017-04-07 17:43:19 +0200 | [diff] [blame] | 348 | __entry->ring = ring->idx; |
| 349 | __entry->vm_id = vm_id; |
| 350 | __entry->vm_hub = ring->funcs->vmhub; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 351 | __entry->pd_addr = pd_addr; |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 352 | ), |
Christian König | 5f1bcf5 | 2017-04-07 17:43:19 +0200 | [diff] [blame] | 353 | TP_printk("ring=%u, id=%u, hub=%u, pd_addr=%010Lx", |
| 354 | __entry->ring, __entry->vm_id, |
| 355 | __entry->vm_hub,__entry->pd_addr) |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 356 | ); |
| 357 | |
Christian König | ec74407 | 2015-06-10 14:45:21 +0200 | [diff] [blame] | 358 | TRACE_EVENT(amdgpu_bo_list_set, |
| 359 | TP_PROTO(struct amdgpu_bo_list *list, struct amdgpu_bo *bo), |
| 360 | TP_ARGS(list, bo), |
| 361 | TP_STRUCT__entry( |
| 362 | __field(struct amdgpu_bo_list *, list) |
| 363 | __field(struct amdgpu_bo *, bo) |
David Mao | 42ffb58 | 2016-06-07 17:43:51 +0800 | [diff] [blame] | 364 | __field(u64, bo_size) |
Christian König | ec74407 | 2015-06-10 14:45:21 +0200 | [diff] [blame] | 365 | ), |
| 366 | |
| 367 | TP_fast_assign( |
| 368 | __entry->list = list; |
| 369 | __entry->bo = bo; |
David Mao | 42ffb58 | 2016-06-07 17:43:51 +0800 | [diff] [blame] | 370 | __entry->bo_size = amdgpu_bo_size(bo); |
Christian König | ec74407 | 2015-06-10 14:45:21 +0200 | [diff] [blame] | 371 | ), |
Andres Rodriguez | 373eadf | 2017-03-09 21:25:51 -0500 | [diff] [blame] | 372 | TP_printk("list=%p, bo=%p, bo_size=%Ld", |
David Mao | 42ffb58 | 2016-06-07 17:43:51 +0800 | [diff] [blame] | 373 | __entry->list, |
| 374 | __entry->bo, |
| 375 | __entry->bo_size) |
Christian König | ec74407 | 2015-06-10 14:45:21 +0200 | [diff] [blame] | 376 | ); |
| 377 | |
David Mao | 15da301 | 2016-06-07 17:48:52 +0800 | [diff] [blame] | 378 | TRACE_EVENT(amdgpu_cs_bo_status, |
| 379 | TP_PROTO(uint64_t total_bo, uint64_t total_size), |
| 380 | TP_ARGS(total_bo, total_size), |
| 381 | TP_STRUCT__entry( |
| 382 | __field(u64, total_bo) |
| 383 | __field(u64, total_size) |
| 384 | ), |
| 385 | |
| 386 | TP_fast_assign( |
| 387 | __entry->total_bo = total_bo; |
| 388 | __entry->total_size = total_size; |
| 389 | ), |
Andres Rodriguez | 373eadf | 2017-03-09 21:25:51 -0500 | [diff] [blame] | 390 | TP_printk("total_bo_size=%Ld, total_bo_count=%Ld", |
David Mao | 15da301 | 2016-06-07 17:48:52 +0800 | [diff] [blame] | 391 | __entry->total_bo, __entry->total_size) |
| 392 | ); |
| 393 | |
| 394 | TRACE_EVENT(amdgpu_ttm_bo_move, |
| 395 | TP_PROTO(struct amdgpu_bo* bo, uint32_t new_placement, uint32_t old_placement), |
| 396 | TP_ARGS(bo, new_placement, old_placement), |
| 397 | TP_STRUCT__entry( |
| 398 | __field(struct amdgpu_bo *, bo) |
| 399 | __field(u64, bo_size) |
| 400 | __field(u32, new_placement) |
| 401 | __field(u32, old_placement) |
| 402 | ), |
| 403 | |
| 404 | TP_fast_assign( |
| 405 | __entry->bo = bo; |
| 406 | __entry->bo_size = amdgpu_bo_size(bo); |
| 407 | __entry->new_placement = new_placement; |
| 408 | __entry->old_placement = old_placement; |
| 409 | ), |
Andres Rodriguez | f8d5690 | 2017-02-24 13:20:57 -0500 | [diff] [blame] | 410 | TP_printk("bo=%p, from=%d, to=%d, size=%Ld", |
David Mao | 15da301 | 2016-06-07 17:48:52 +0800 | [diff] [blame] | 411 | __entry->bo, __entry->old_placement, |
| 412 | __entry->new_placement, __entry->bo_size) |
| 413 | ); |
| 414 | |
Andres Rodriguez | c98b5c9 | 2017-03-11 10:50:34 -0500 | [diff] [blame] | 415 | #undef AMDGPU_JOB_GET_TIMELINE_NAME |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 416 | #endif |
| 417 | |
| 418 | /* This part must be outside protection */ |
| 419 | #undef TRACE_INCLUDE_PATH |
Thierry Reding | 1430f73 | 2017-09-01 12:54:01 -0400 | [diff] [blame] | 420 | #define TRACE_INCLUDE_PATH ../../drivers/gpu/drm/amd/amdgpu |
Alex Deucher | d38ceaf | 2015-04-20 16:55:21 -0400 | [diff] [blame] | 421 | #include <trace/define_trace.h> |